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authorMark Kettenis <kettenis@cvs.openbsd.org>2020-01-06 19:12:40 +0000
committerMark Kettenis <kettenis@cvs.openbsd.org>2020-01-06 19:12:40 +0000
commitbc75862bef6af457e225ca8c054d70f3cf03eba0 (patch)
treed41af7251f5a2fc39cc9970cf8dc977a6b41ccca
parentba287d422397a9544ce3154879ba7d11c0b186d7 (diff)
Remove redundant BPIALL instructions (since ICIALLU already invalidates the
BP cache if necessary). ok patrick@
-rw-r--r--sys/arch/arm/arm/cpufunc_asm_armv7.S5
1 files changed, 1 insertions, 4 deletions
diff --git a/sys/arch/arm/arm/cpufunc_asm_armv7.S b/sys/arch/arm/arm/cpufunc_asm_armv7.S
index aa47b32b4c9..84b37962d17 100644
--- a/sys/arch/arm/arm/cpufunc_asm_armv7.S
+++ b/sys/arch/arm/arm/cpufunc_asm_armv7.S
@@ -1,4 +1,4 @@
-/* $OpenBSD: cpufunc_asm_armv7.S,v 1.17 2019/10/31 22:28:26 patrick Exp $ */
+/* $OpenBSD: cpufunc_asm_armv7.S,v 1.18 2020/01/06 19:12:39 kettenis Exp $ */
/*
* Copyright (c) 2008 Dale Rahn <drahn@openbsd.org>
*
@@ -43,7 +43,6 @@ ENTRY(armv7_periphbase)
*/
ENTRY(armv7_setttb)
mcr CP15_ICIALLU /* Flush I cache */
- mcr CP15_BPIALL /* Flush BP cache */
dsb sy
isb sy
@@ -126,7 +125,6 @@ ENTRY(armv7_icache_sync_all)
* into the Dcache cleaning code.
*/
mcr CP15_ICIALLU /* Flush I cache */
- mcr CP15_BPIALL /* Flush BP cache */
isb sy
mov pc, lr
@@ -228,7 +226,6 @@ ENTRY(armv7_context_switch)
* at this point. So no need to flush them again.
*/
mcr CP15_ICIALLU /* Flush I cache */
- mcr CP15_BPIALL /* Flush BP cache */
dsb sy
isb sy