diff options
author | Miod Vallat <miod@cvs.openbsd.org> | 2006-08-22 21:05:04 +0000 |
---|---|---|
committer | Miod Vallat <miod@cvs.openbsd.org> | 2006-08-22 21:05:04 +0000 |
commit | c5325697fe591a83bc6088f63b3ece302bef0fdd (patch) | |
tree | d64861313a016377b201555229034a5c6fe11592 | |
parent | a451e38437ed6f6c71bb5bc995921b3063ce478f (diff) |
More register defines.
-rw-r--r-- | sys/arch/vax/vsa/lcg.c | 19 | ||||
-rw-r--r-- | sys/arch/vax/vsa/lcgreg.h | 70 |
2 files changed, 76 insertions, 13 deletions
diff --git a/sys/arch/vax/vsa/lcg.c b/sys/arch/vax/vsa/lcg.c index f422a4e86fe..7629aa0a6c2 100644 --- a/sys/arch/vax/vsa/lcg.c +++ b/sys/arch/vax/vsa/lcg.c @@ -1,4 +1,4 @@ -/* $OpenBSD: lcg.c,v 1.8 2006/08/06 15:04:22 miod Exp $ */ +/* $OpenBSD: lcg.c,v 1.9 2006/08/22 21:05:03 miod Exp $ */ /* * Copyright (c) 2006 Miodrag Vallat. * @@ -66,10 +66,10 @@ #include <vax/vsa/lcgreg.h> +#define LCG_CONFIG_ADDR 0x200f0010 /* configuration register */ #define LCG_REG_ADDR 0x20100000 /* registers */ #define LCG_REG_SIZE 0x4000 -#define LCG_CONFIG_ADDR 0x200f0010 /* configuration register */ -#define LCG_LUT_ADDR 0x21800800 /* colormap */ +#define LCG_LUT_ADDR 0x21800000 /* colormap */ #define LCG_LUT_OFFSET 0x0800 #define LCG_LUT_SIZE 0x0800 #define LCG_FB_ADDR 0x21801000 /* frame buffer */ @@ -274,8 +274,8 @@ lcg_attach(struct device *parent, struct device *self, void *aux) goto fail2; } - ss->ss_lut = (u_int8_t *)vax_map_physmem(LCG_LUT_ADDR, - LCG_LUT_SIZE / VAX_NBPG); + ss->ss_lut = (volatile u_int8_t *)vax_map_physmem(LCG_LUT_ADDR + + LCG_LUT_OFFSET, LCG_LUT_SIZE / VAX_NBPG); if (ss->ss_lut == NULL) { printf(": can not map color LUT\n"); goto fail3; @@ -411,8 +411,6 @@ lcg_setup_screen(struct lcg_screen *ss) ri->ri_caps &= ~WSSCREEN_HILIT; } - lcg_resetcmap(ss); - lcg_stdscreen.ncols = ri->ri_cols; lcg_stdscreen.nrows = ri->ri_rows; lcg_stdscreen.textops = &ri->ri_ops; @@ -420,6 +418,8 @@ lcg_setup_screen(struct lcg_screen *ss) lcg_stdscreen.fontheight = ri->ri_font->fontheight; lcg_stdscreen.capabilities = ri->ri_caps; + lcg_resetcmap(ss); + return (0); } @@ -776,9 +776,10 @@ lcgcninit() virtual_avail += LCG_REG_SIZE; ioaccess(ss->ss_reg, LCG_REG_ADDR, LCG_REG_SIZE / VAX_NBPG); - ss->ss_lut = (u_int8_t *)virtual_avail; + ss->ss_lut = (volatile u_int8_t *)virtual_avail; virtual_avail += LCG_LUT_SIZE; - ioaccess((vaddr_t)ss->ss_lut, LCG_LUT_ADDR, LCG_LUT_SIZE / VAX_NBPG); + ioaccess((vaddr_t)ss->ss_lut, LCG_LUT_ADDR + LCG_LUT_OFFSET, + LCG_LUT_SIZE / VAX_NBPG); virtual_avail = round_page(virtual_avail); diff --git a/sys/arch/vax/vsa/lcgreg.h b/sys/arch/vax/vsa/lcgreg.h index aa0a2aeeb50..5f858f7250d 100644 --- a/sys/arch/vax/vsa/lcgreg.h +++ b/sys/arch/vax/vsa/lcgreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: lcgreg.h,v 1.2 2006/08/06 15:04:22 miod Exp $ */ +/* $OpenBSD: lcgreg.h,v 1.3 2006/08/22 21:05:03 miod Exp $ */ /* $NetBSD: lcgreg.h,v 1.4 2005/12/11 12:19:34 christos Exp $ */ /*- @@ -98,8 +98,8 @@ #define LCG_REG_CURSOR_X 0x000e84 #define LCG_REG_CURSOR_Y 0x000e84 #define LCG_REG_LUT_CONSOLE_SEL 0x000ee0 -#define LUT_SEL_CONSOLE 0x00 -#define LUT_SEL_COLOR 0x01 +#define LUT_SEL_CONSOLE 0x00000000 +#define LUT_SEL_COLOR 0x00000001 #define LCG_REG_LUT_COLOR_BASE_W 0x0006e4 #define LCG_REG_LUT_COLOR_BASE_R 0x0006e4 #define LCG_REG_LUT_CONTROL_BASE 0x000ee8 @@ -109,6 +109,9 @@ /* Graphics Control and VM Registers */ #define LCG_REG_LCG_GO 0x000c80 +#define GO_VM 0x00000008 +#define GO_AG 0x00000002 +#define GO_FIFO 0x00000001 #define LCG_REG_NEXT_ADDRESS 0x001334 #define LCG_REG_PA_SPTE_PTE 0x001338 #define LCG_REG_TB_INVALIDATE_SINGLE 0x001a00 @@ -136,7 +139,47 @@ #define LCG_REG_GRAPHICS_INT_SET_ENABLE 0x001c98 #define LCG_REG_GRAPHICS_INT_CLR_ENABLE 0x001c9c #define LCG_REG_GRAPHICS_SUB_STATUS 0x001ca0 +#define GSS_AG_BUSY 0x80000000 +#define GSS_SHORT_CIRCUIT 0x20000000 +#define GSS_VALID_PACKET 0x10000000 +#define GSS_1ST_LONGWORD 0x08000000 +#define GSS_FIFO_ARBITRATE 0x04000000 +#define GSS_FIFO_COMMANDER 0x03000000 +#define GSS_AG_BACKWARDS 0x00800000 +#define GSS_AG_VIRTUAL 0x00400000 +#define GSS_AG_ARBITRATE 0x00200000 +#define GSS_AG_READ_ID 0x00100000 +#define GSS_AG_ACCESS_TYPE 0x000c0000 +#define GSS_AG_ACCESS_SIZE 0x00030000 +#define GSS_RESIDUE_LW0 0x00008000 +#define GSS_RESIDUE_LW1 0x00004000 +#define GSS_RESIDUE_LW2 0x00002000 +#define GSS_FIFO_TAIL_BITS 0x00001800 +#define GSS_FIFO_IDU 0x00000400 +#define GSS_EXECUTING_CLIP 0x00000200 +#define GSS_FIFO_BPT_STALL 0x00000100 +#define GSS_FIFO_WFSYNC_STALL 0x00000080 +#define GSS_FIFO_AGBUSY_STALL 0x00000040 +#define GSS_ADRS_BPT_VIRTUAL 0x00000010 +#define GSS_VM 0x00000008 +#define GSS_FIFO_IDLE 0x00000004 +#define GSS_AG_ACCESS 0x00000002 +#define GSS_FIFO 0x00000001 #define LCG_REG_GRAPHICS_CONTROL 0x001ca4 +#define CTRL_RESET 0x80000000 +#define CTRL_AG 0x40000000 +#define CTRL_CLIP_LIST 0x20000000 +#define CTRL_FIFO 0x10000000 +#define CTRL_SHORT_CIRCUIT 0x08000000 +#define CTRL_VM 0x04000000 +#define CTRL_VM_PROTECTION 0x02000000 +#define CTRL_OPT_INTERFACE 0x01000000 +#define CTRL_OPT_TIMEOUT_SEL 0x00c00000 +#define CTRL_OPT_RESET 0x00200000 +#define CTRL_OPTION_NORESET 0x00100000 +#define CTRL_AG_ACCESS_BPT_ARM 0x00000800 +#define CTRL_PACKET_BPT_ARM 0x00000200 +#define CTRL_ADDRESS_BPT_ARM 0x00000100 #define LCG_REG_BREAKPT_ADDRESS 0x001cb0 #define LCG_REG_BREAKPT_VIRTUAL 0x001cb0 #define LCG_REG_WRITE_PROTECT_LOW_HIGH 0x001cc0 @@ -151,6 +194,25 @@ #define LCG_REG_CLIP_LIST_BASE 0x0004e4 #define LCG_REG_CLIP_LIST 0x0004e4 #define LCG_REG_FIFO_MASKS 0x000570 +#define FIFO_16K 0x00000000 +#define FIFO_32K 0x00004000 +#define FIFO_64K 0x0000c000 +#define FIFO_AFULL_AT_64 0x00000000 +#define FIFO_AFULL_AT_128 0x00002000 +#define FIFO_AFULL_AT_256 0x00003000 +#define FIFO_AFULL_AT_512 0x00003800 +#define FIFO_AFULL_AT_1024 0x00003c00 +#define FIFO_AFULL_AT_2048 0x00003e00 +#define FIFO_AFULL_AT_4096 0x00003f00 +#define FIFO_AEMPTY_AT_32 0x00000000 +#define FIFO_AEMPTY_AT_64 0x00000080 +#define FIFO_AEMPTY_AT_128 0x00000040 +#define FIFO_AEMPTY_AT_256 0x00000020 +#define FIFO_AEMPTY_AT_512 0x00000010 +#define FIFO_AEMPTY_AT_1024 0x00000008 +#define FIFO_AEMPTY_AT_2048 0x00000004 +#define FIFO_AEMPTY_AT_4096 0x00000002 +#define FIFO_AEMPTY_AT_8192 0x00000001 #define LCG_REG_FIFO_HEAD_OFFSET 0x000574 #define LCG_REG_FIFO_BASE 0x000574 #define LCG_REG_FIFO_HEAD 0x000574 @@ -224,4 +286,4 @@ * LUT data bits */ #define LUT_ADRS_REG 0x00 /* write to address register */ -#define LUT_COLOR_AUTOINC 0x01 /* write to LUT and autoincremen */ +#define LUT_COLOR_AUTOINC 0x01 /* write to LUT and autoincrement */ |