diff options
| author | Jonathan Gray <jsg@cvs.openbsd.org> | 2020-06-26 05:48:38 +0000 |
|---|---|---|
| committer | Jonathan Gray <jsg@cvs.openbsd.org> | 2020-06-26 05:48:38 +0000 |
| commit | c653a47975f212cbf09c863e5e4acc28a2a6da6d (patch) | |
| tree | c0b257fcaa44a9678c2dc1e8fad8ce6fb73d10b0 | |
| parent | c0d03ed9f9e0c160a7bc2097149bd28ace3e6402 (diff) | |
drm/i915/gt: Move ilk GT workarounds from init_clock_gating to workarounds
From Chris Wilson
f04e0b5884098b7805ddf40fbcd641c249f2fa88 in linux 5.7.y/5.7.6
eacf21040aa97fd1b3c6bb201bfd43820e1c49be in mainline linux
| -rw-r--r-- | sys/dev/pci/drm/i915/gt/intel_workarounds.c | 14 | ||||
| -rw-r--r-- | sys/dev/pci/drm/i915/intel_pm.c | 10 |
2 files changed, 14 insertions, 10 deletions
diff --git a/sys/dev/pci/drm/i915/gt/intel_workarounds.c b/sys/dev/pci/drm/i915/gt/intel_workarounds.c index ab115628ff0..a4a8a4dc539 100644 --- a/sys/dev/pci/drm/i915/gt/intel_workarounds.c +++ b/sys/dev/pci/drm/i915/gt/intel_workarounds.c @@ -704,6 +704,18 @@ int intel_engine_emit_ctx_wa(struct i915_request *rq) } static void +ilk_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) +{ + wa_masked_en(wal, _3D_CHICKEN2, _3D_CHICKEN2_WM_READ_PIPELINED); + + /* WaDisableRenderCachePipelinedFlush:ilk */ + wa_masked_en(wal, CACHE_MODE_0, CM0_PIPELINED_RENDER_FLUSH_DISABLE); + + /* WaDisable_RenderCache_OperationalFlush:ilk */ + wa_masked_dis(wal, CACHE_MODE_0, RC_OP_FLUSH_ENABLE); +} + +static void snb_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) { /* WaDisableHiZPlanesWhenMSAAEnabled:snb */ @@ -1125,6 +1137,8 @@ gt_init_workarounds(struct drm_i915_private *i915, struct i915_wa_list *wal) ivb_gt_workarounds_init(i915, wal); else if (IS_GEN(i915, 6)) snb_gt_workarounds_init(i915, wal); + else if (IS_GEN(i915, 5)) + ilk_gt_workarounds_init(i915, wal); else if (INTEL_GEN(i915) <= 8) return; else diff --git a/sys/dev/pci/drm/i915/intel_pm.c b/sys/dev/pci/drm/i915/intel_pm.c index 96fd391cba5..6fec2498255 100644 --- a/sys/dev/pci/drm/i915/intel_pm.c +++ b/sys/dev/pci/drm/i915/intel_pm.c @@ -6595,16 +6595,6 @@ static void ilk_init_clock_gating(struct drm_i915_private *dev_priv) I915_WRITE(ILK_DISPLAY_CHICKEN2, I915_READ(ILK_DISPLAY_CHICKEN2) | ILK_ELPIN_409_SELECT); - I915_WRITE(_3D_CHICKEN2, - _3D_CHICKEN2_WM_READ_PIPELINED << 16 | - _3D_CHICKEN2_WM_READ_PIPELINED); - - /* WaDisableRenderCachePipelinedFlush:ilk */ - I915_WRITE(CACHE_MODE_0, - _MASKED_BIT_ENABLE(CM0_PIPELINED_RENDER_FLUSH_DISABLE)); - - /* WaDisable_RenderCache_OperationalFlush:ilk */ - I915_WRITE(CACHE_MODE_0, _MASKED_BIT_DISABLE(RC_OP_FLUSH_ENABLE)); g4x_disable_trickle_feed(dev_priv); |