setup control register correctly and clear interrupts before attaching children

5 files changed, 43 insertions, 5 deletions

diff --git a/sys/arch/sparc64/dev/fhc.c b/sys/arch/sparc64/dev/fhc.c
index b596d2f31c2..0df9cfade7e 100644
--- a/sys/arch/sparc64/dev/fhc.c
+++ b/sys/arch/sparc64/dev/fhc.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: fhc.c,v 1.5 2004/09/27 17:28:03 jason Exp $	*/
+/*	$OpenBSD: fhc.c,v 1.6 2004/09/27 18:15:32 jason Exp $	*/
 
 /*
  * Copyright (c) 2004 Jason L. Wright (jason@thought.net)
@@ -62,11 +62,29 @@ void
 fhc_attach(struct fhc_softc *sc)
 {
 	int node0, node;
+	u_int32_t ctrl;
 
 	printf(": %s\n", getpropstring(sc->sc_node, "board-model"));
 
 	sc->sc_cbt = fhc_alloc_bus_tag(sc);
 
+	ctrl = bus_space_read_4(sc->sc_bt, sc->sc_preg, FHC_P_CTRL);
+	if (!sc->sc_is_central)
+		ctrl |= FHC_P_CTRL_IXIST;
+	ctrl &= ~(FHC_P_CTRL_AOFF | FHC_P_CTRL_BOFF | FHC_P_CTRL_SLINE);
+	bus_space_write_4(sc->sc_bt, sc->sc_preg, FHC_P_CTRL, ctrl);
+	bus_space_read_4(sc->sc_bt, sc->sc_preg, FHC_P_CTRL);
+
+	/* clear interrupts */
+	bus_space_write_4(sc->sc_bt, sc->sc_freg, FHC_F_ICLR, 0);
+	bus_space_read_4(sc->sc_bt, sc->sc_freg, FHC_F_ICLR);
+	bus_space_write_4(sc->sc_bt, sc->sc_sreg, FHC_S_ICLR, 0);
+	bus_space_read_4(sc->sc_bt, sc->sc_sreg, FHC_S_ICLR);
+	bus_space_write_4(sc->sc_bt, sc->sc_ureg, FHC_U_ICLR, 0);
+	bus_space_read_4(sc->sc_bt, sc->sc_ureg, FHC_U_ICLR);
+	bus_space_write_4(sc->sc_bt, sc->sc_treg, FHC_T_ICLR, 0);
+	bus_space_read_4(sc->sc_bt, sc->sc_treg, FHC_T_ICLR);
+
 	getprop(sc->sc_node, "ranges", sizeof(struct fhc_range),
 	    &sc->sc_nrange, (void **)&sc->sc_range);
 
diff --git a/sys/arch/sparc64/dev/fhc_central.c b/sys/arch/sparc64/dev/fhc_central.c
index ddc222de3ee..8b3dc347dbf 100644
--- a/sys/arch/sparc64/dev/fhc_central.c
+++ b/sys/arch/sparc64/dev/fhc_central.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: fhc_central.c,v 1.3 2004/09/24 20:48:26 jason Exp $	*/
+/*	$OpenBSD: fhc_central.c,v 1.4 2004/09/27 18:15:32 jason Exp $	*/
 
 /*
  * Copyright (c) 2004 Jason L. Wright (jason@thought.net).
@@ -71,6 +71,7 @@ fhc_central_attach(parent, self, aux)
 
 	sc->sc_node = ca->ca_node;
 	sc->sc_bt = ca->ca_bustag;
+	sc->sc_is_central = 1;
 
 	if (central_bus_map(sc->sc_bt, ca->ca_reg[0].cbr_slot,
 	    ca->ca_reg[0].cbr_offset, ca->ca_reg[0].cbr_size, 0,
diff --git a/sys/arch/sparc64/dev/fhc_mainbus.c b/sys/arch/sparc64/dev/fhc_mainbus.c
index d9692a8fd7d..dcc01f599cd 100644
--- a/sys/arch/sparc64/dev/fhc_mainbus.c
+++ b/sys/arch/sparc64/dev/fhc_mainbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: fhc_mainbus.c,v 1.2 2004/09/27 17:44:16 jason Exp $	*/
+/*	$OpenBSD: fhc_mainbus.c,v 1.3 2004/09/27 18:15:32 jason Exp $	*/
 
 /*
  * Copyright (c) 2004 Jason L. Wright (jason@thought.net).
@@ -69,6 +69,7 @@ fhc_mainbus_attach(parent, self, aux)
 
 	sc->sc_node = ma->ma_node;
 	sc->sc_bt = ma->ma_bustag;
+	sc->sc_is_central = 0;
 
 	if (bus_space_map(sc->sc_bt, ma->ma_reg[0].ur_paddr,
 	    ma->ma_reg[0].ur_len, 0, &sc->sc_preg)) {
diff --git a/sys/arch/sparc64/dev/fhcreg.h b/sys/arch/sparc64/dev/fhcreg.h
index 285f1d65588..47ce6d2ecbb 100644
--- a/sys/arch/sparc64/dev/fhcreg.h
+++ b/sys/arch/sparc64/dev/fhcreg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: fhcreg.h,v 1.1 2004/09/24 20:47:39 jason Exp $	*/
+/*	$OpenBSD: fhcreg.h,v 1.2 2004/09/27 18:15:32 jason Exp $	*/
 
 /*
  * Copyright (c) 2004 Jason L. Wright (jason@thought.net).
@@ -33,6 +33,23 @@
 #define	FHC_P_ECC	0x00000040		/* ECC control */
 #define	FHC_P_JCTRL	0x000000f0		/* JTAG control */
 
+#define	FHC_P_CTRL_ICS		0x00100000	/* ignore centerplane sigs */
+#define	FHC_P_CTRL_FRST		0x00080000	/* fatal error reset enable */
+#define	FHC_P_CTRL_LFAT		0x00080000	/* AC/DC local error */
+#define	FHC_P_CTRL_SLINE	0x00010000	/* firmware sync line */
+#define	FHC_P_CTRL_DCD		0x00008000	/* DC/DC converter disable */
+#define	FHC_P_CTRL_POFF		0x00004000	/* AC/DC ctlr PLL disable */
+#define	FHC_P_CTRL_FOFF		0x00002000	/* FHC ctlr PLL disable */
+#define	FHC_P_CTRL_AOFF		0x00001000	/* cpu a sram low pwr mode */
+#define	FHC_P_CTRL_BOFF		0x00000800	/* cpu b sram low pwr mode */
+#define	FHC_P_CTRL_PSOFF	0x00000400	/* disable fhc power supply */
+#define	FHC_P_CTRL_IXIST	0x00000200	/* fhc notifies clock-board */
+#define	FHC_P_CTRL_XMSTR	0x00000100	/* xir master enable */
+#define	FHC_P_CTRL_LLED		0x00000040	/* left led (reversed) */
+#define	FHC_P_CTRL_MLED		0x00000020	/* middle led */
+#define	FHC_P_CTRL_RLED		0x00000010	/* right led */
+#define	FHC_P_CTRL_BPINS	0x00000003	/* spare bidir pins */
+
 #define	FHC_I_IGN	0x00000000		/* IGN register */
 
 #define	FHC_F_IMAP	0x00000000		/* fanfail intr map */
diff --git a/sys/arch/sparc64/dev/fhcvar.h b/sys/arch/sparc64/dev/fhcvar.h
index f00c999d4bc..91298db9558 100644
--- a/sys/arch/sparc64/dev/fhcvar.h
+++ b/sys/arch/sparc64/dev/fhcvar.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: fhcvar.h,v 1.2 2004/09/24 20:50:49 jason Exp $	*/
+/*	$OpenBSD: fhcvar.h,v 1.3 2004/09/27 18:15:32 jason Exp $	*/
 
 /*
  * Copyright (c) 2004 Jason L. Wright (jason@thought.net).
@@ -43,6 +43,7 @@ struct fhc_range {
 struct fhc_softc {
 	struct device sc_dv;
 	int sc_node;
+	int sc_is_central;		/* parent is central */
 	bus_space_tag_t sc_bt;
 	bus_space_tag_t sc_cbt;
 	int sc_nrange;