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authorMike Larkin <mlarkin@cvs.openbsd.org>2017-03-02 03:21:45 +0000
committerMike Larkin <mlarkin@cvs.openbsd.org>2017-03-02 03:21:45 +0000
commite1d2f35b1ed88b00bf63b92e65c2597979b8972b (patch)
treefc021a369cadef2d68a46cae4f08b0a3007e84fb
parent087dfaca883e6a60fd17beffb342455a882351db (diff)
reduce some more differences in vmm between i386 and amd64 that didn't
get picked up previously. i386 gets some changes relating to EFER treatment and amd64 gets a whitespace fix.
-rw-r--r--sys/arch/amd64/amd64/vmm.c4
-rw-r--r--sys/arch/i386/i386/vmm.c20
2 files changed, 14 insertions, 10 deletions
diff --git a/sys/arch/amd64/amd64/vmm.c b/sys/arch/amd64/amd64/vmm.c
index 04a4d4fe7c0..aef0b79ba30 100644
--- a/sys/arch/amd64/amd64/vmm.c
+++ b/sys/arch/amd64/amd64/vmm.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: vmm.c,v 1.117 2017/03/02 02:57:35 mlarkin Exp $ */
+/* $OpenBSD: vmm.c,v 1.118 2017/03/02 03:21:44 mlarkin Exp $ */
/*
* Copyright (c) 2014 Mike Larkin <mlarkin@openbsd.org>
*
@@ -2570,7 +2570,7 @@ exit:
} else {
if (vmclear(&vcpu->vc_control_pa))
ret = EINVAL;
- }
+ }
return (ret);
}
diff --git a/sys/arch/i386/i386/vmm.c b/sys/arch/i386/i386/vmm.c
index c852deb05ee..6f1c9f8869b 100644
--- a/sys/arch/i386/i386/vmm.c
+++ b/sys/arch/i386/i386/vmm.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: vmm.c,v 1.22 2017/03/02 02:57:35 mlarkin Exp $ */
+/* $OpenBSD: vmm.c,v 1.23 2017/03/02 03:21:44 mlarkin Exp $ */
/*
* Copyright (c) 2014 Mike Larkin <mlarkin@openbsd.org>
*
@@ -1600,7 +1600,6 @@ vcpu_writeregs_svm(struct vcpu *vcpu, uint64_t regmask,
vmcb->v_tr.vs_lim = sregs[VCPU_REGS_TR].vsi_limit;
attr = sregs[VCPU_REGS_TR].vsi_ar;
vmcb->v_tr.vs_attr = (attr & 0xff) | ((attr >> 4) & 0xf00);
- vmcb->v_tr.vs_attr = sregs[VCPU_REGS_TR].vsi_ar;
vmcb->v_tr.vs_base = sregs[VCPU_REGS_TR].vsi_base;
vmcb->v_gdtr.vs_lim = vrs->vrs_gdtr.vsi_limit;
vmcb->v_gdtr.vs_base = vrs->vrs_gdtr.vsi_base;
@@ -1612,10 +1611,6 @@ vcpu_writeregs_svm(struct vcpu *vcpu, uint64_t regmask,
vmcb->v_cr0 = crs[VCPU_REGS_CR0];
vmcb->v_cr3 = crs[VCPU_REGS_CR3];
vmcb->v_cr4 = crs[VCPU_REGS_CR4];
-
- DPRINTF("%s: set vcpu CRs (cr0=0x%llx cr3=0x%llx "
- "cr4=0x%llx)\n", __func__, vmcb->v_cr0, vmcb->v_cr3,
- vmcb->v_cr4);
}
return (0);
@@ -1682,7 +1677,6 @@ vcpu_reset_regs_svm(struct vcpu *vcpu, struct vcpu_reg_state *vrs)
svm_setmsrbrw(vcpu, MSR_SYSENTER_CS);
svm_setmsrbrw(vcpu, MSR_SYSENTER_ESP);
svm_setmsrbrw(vcpu, MSR_SYSENTER_EIP);
- svm_setmsrbrw(vcpu, MSR_EFER);
svm_setmsrbrw(vcpu, MSR_STAR);
svm_setmsrbrw(vcpu, MSR_LSTAR);
svm_setmsrbrw(vcpu, MSR_CSTAR);
@@ -1691,6 +1685,9 @@ vcpu_reset_regs_svm(struct vcpu *vcpu, struct vcpu_reg_state *vrs)
svm_setmsrbrw(vcpu, MSR_GSBASE);
svm_setmsrbrw(vcpu, MSR_KERNELGSBASE);
+ /* EFER is R/O so we can ensure the guest always has SVME */
+ svm_setmsrbr(vcpu, MSR_EFER);
+
/* Guest VCPU ASID */
vmcb->v_asid = vcpu->vc_parent->vm_id;
@@ -1703,8 +1700,14 @@ vcpu_reset_regs_svm(struct vcpu *vcpu, struct vcpu_reg_state *vrs)
vmcb->v_n_cr3 = vcpu->vc_parent->vm_map->pmap->pm_pdirpa;
}
+ /* Enable SVME in EFER (must always be set) */
+ vmcb->v_efer |= EFER_SVME;
+
ret = vcpu_writeregs_svm(vcpu, VM_RWREGS_ALL, vrs);
+ vmcb->v_efer |= (EFER_LME | EFER_LMA);
+ vmcb->v_cr4 |= CR4_PAE;
+
return ret;
}
@@ -2328,7 +2331,7 @@ vcpu_reset_regs_vmx(struct vcpu *vcpu, struct vcpu_reg_state *vrs)
vmx_setmsrbrw(vcpu, MSR_FSBASE);
vmx_setmsrbrw(vcpu, MSR_GSBASE);
vmx_setmsrbrw(vcpu, MSR_KERNELGSBASE);
-
+
/* XXX CR0 shadow */
/* XXX CR4 shadow */
@@ -2349,6 +2352,7 @@ exit:
*
* This function allocates various per-VCPU memory regions, sets up initial
* VCPU VMCS controls, and sets initial register values.
+ *
* Parameters:
* vcpu: the VCPU structure being initialized
*