Better Raven PREP initialization, per the book, with an evil book mistake

corrected.

2 files changed, 106 insertions, 57 deletions

diff --git a/sys/arch/mvmeppc/dev/ravenreg.h b/sys/arch/mvmeppc/dev/ravenreg.h
index dff169b24d9..e69a9f008bc 100644
--- a/sys/arch/mvmeppc/dev/ravenreg.h
+++ b/sys/arch/mvmeppc/dev/ravenreg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ravenreg.h,v 1.3 2004/01/29 10:58:06 miod Exp $ */
+/*	$OpenBSD: ravenreg.h,v 1.4 2004/11/19 22:11:04 miod Exp $ */
 
 /*
  * Copyright (c) 2001 Steve Murphree, Jr.
@@ -37,7 +37,7 @@
 #ifndef _MACHINE_RAVENREG_H_
 #define _MACHINE_RAVENREG_H_
 
-#define RAVEN_BASE		0xFEFF0000
+#define RAVEN_BASE		0xfeff0000
 #define	RAVEN_SIZE		0x00001000
 
 #define RAVEN_VENDOR		0x00000000
@@ -45,26 +45,26 @@
 #define RAVEN_DEVICE		0x00000002
 #define RAVEN_REVID		0x00000005
 #define RAVEN_GCSR		0x00000008
-#define RAVEN_FEAT		0x0000000A
-#define RAVEN_MARB		0x0000000E
+#define RAVEN_FEAT		0x0000000a
+#define RAVEN_MARB		0x0000000e
 #define RAVEN_PIACK		0x00000030
 
-#define RAVEN_MSADD0		0x00000040 
-#define RAVEN_MSADD0_PREP	0xC000FCFF
+#define RAVEN_MSADD0		0x00000040
+#define RAVEN_MSADD0_PREP	0xc000fcff
 #define RAVEN_MSOFF0		0x00000044
-#define RAVEN_MSOFF0_PREP	0x400000C2
+#define RAVEN_MSOFF0_PREP	0x400000c2
 #define RAVEN_MSADD1		0x00000048
 #define RAVEN_MSADD1_PREP	0x00000000
-#define RAVEN_MSOFF1		0x0000004C
+#define RAVEN_MSOFF1		0x0000004c
 #define RAVEN_MSOFF1_PREP	0x00000002
 #define RAVEN_MSADD2		0x00000050
 #define RAVEN_MSADD2_PREP	0x00000000
 #define RAVEN_MSOFF2		0x00000054
 #define RAVEN_MSOFF2_PREP	0x00000002
 #define RAVEN_MSADD3		0x00000058
-#define RAVEN_MSADD3_PREP	0x8000BFFF
-#define RAVEN_MSOFF3		0x0000005C
-#define RAVEN_MSOFF3_PREP	0x800000C0
+#define RAVEN_MSADD3_PREP	0x8000bfff
+#define RAVEN_MSOFF3		0x0000005c
+#define RAVEN_MSOFF3_PREP	0x800000c0
 
 /* Where we map the PCI memory space - MAP A*/
 #define RAVEN_V_PCI_MEM_SPACE	0xc0000000	/* Virtual */
@@ -76,8 +76,8 @@
 #define RAVEN_V_PCI_IO_SPACE	0x80000000
 #define RAVEN_P_PCI_IO_SPACE	0x80000000
 
-#define PREP_CONFIG_ADD		0x80000CF8
-#define PREP_CONFIG_DAT		0x80000CFC
+#define PREP_CONFIG_ADD		0x80000cf8
+#define PREP_CONFIG_DAT		0x80000cfc
 
 /* Where we map the config space */
 #define RAVEN_PCI_CONF_SPACE	(RAVEN_V_ISA_IO_SPACE + 0x00800000)
@@ -101,14 +101,15 @@
 #define RAVEN_PCI_REVID		0x08
 #define RAVEN_PCI_IO		0x10
 #define RAVEN_PCI_MEM		0x14
+#define	RAVEN_PCI_MEM_VAL	0x3c000000	/* PREP PCI memory space */
 #define RAVEN_PCI_PSADD0	0x80
-#define RAVEN_PCI_PSADD0_VAL	0x8000FBFF
+#define RAVEN_PCI_PSADD0_VAL	0x8000fbff
 #define RAVEN_PCI_PSOFF0	0x84
-#define RAVEN_PCI_PSOFF0_VAL	0x800000F0
+#define RAVEN_PCI_PSOFF0_VAL	0x800000f0
 #define RAVEN_PCI_PSADD1	0x88
-#define RAVEN_PCI_PSADD1_VAL	0xC000FCFF
+#define RAVEN_PCI_PSADD1_VAL	0x00000000
 #define RAVEN_PCI_PSOFF1	0x8C
-#define RAVEN_PCI_PSOFF1_VAL	0x400000F0
+#define RAVEN_PCI_PSOFF1_VAL	0x00000000
 #define RAVEN_PCI_PSADD2	0x90
 #define RAVEN_PCI_PSADD2_VAL	0x00000000
 #define RAVEN_PCI_PSOFF2	0x94
diff --git a/sys/arch/mvmeppc/pci/mpcpcibr.c b/sys/arch/mvmeppc/pci/mpcpcibr.c
index ecc306c8be4..f914df01a43 100644
--- a/sys/arch/mvmeppc/pci/mpcpcibr.c
+++ b/sys/arch/mvmeppc/pci/mpcpcibr.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: mpcpcibr.c,v 1.15 2004/01/29 20:27:37 miod Exp $ */
+/*	$OpenBSD: mpcpcibr.c,v 1.16 2004/11/19 22:11:07 miod Exp $ */
 
 /*
  * Copyright (c) 2001 Steve Murphree, Jr.
@@ -119,6 +119,65 @@ struct powerpc_bus_dma_tag pci_bus_dma_tag = {
 extern u_int8_t *ravenregs;
 extern vaddr_t isaspace_va;
 
+struct raven_setup {
+	unsigned int	pci_reg;
+	u_int32_t	value;
+};
+
+const struct raven_setup raven_prep_setup[] = {
+	/* PCI registers */
+	{ RAVEN_PCI_MEM, RAVEN_PCI_MEM_VAL },
+	{ RAVEN_PCI_PSADD0, RAVEN_PCI_PSADD0_VAL },
+	{ RAVEN_PCI_PSOFF0, RAVEN_PCI_PSOFF0_VAL },
+	{ RAVEN_PCI_PSADD1, RAVEN_PCI_PSADD1_VAL },
+	{ RAVEN_PCI_PSOFF1, RAVEN_PCI_PSOFF1_VAL },
+	{ RAVEN_PCI_PSADD2, RAVEN_PCI_PSADD2_VAL },
+	{ RAVEN_PCI_PSOFF2, RAVEN_PCI_PSOFF2_VAL },
+	{ RAVEN_PCI_PSADD3, RAVEN_PCI_PSADD3_VAL },
+	{ RAVEN_PCI_PSOFF3, RAVEN_PCI_PSOFF3_VAL },
+
+#ifdef notyet
+	/* Universe PCI registers */
+	{ 0x100, 0xc0825100 },
+	{ 0x104, 0x01000000 },
+	{ 0x108, 0x30000000 },
+	{ 0x10c, 0x00000000 },
+	{ 0x114, 0xc0425100 },
+	{ 0x118, 0x30000000 },
+	{ 0x11c, 0x38000000 },
+	{ 0x120, 0x00000000 },
+	{ 0x128, 0x00000000 },
+	{ 0x12c, 0x00000000 },
+	{ 0x130, 0x00000000 },
+	{ 0x134, 0x00000000 },
+	{ 0x13c, 0x00000000 },
+	{ 0x140, 0x00000000 },
+	{ 0x144, 0x00000000 },
+	{ 0x148, 0x00000000 },
+	{ 0x188, 0xc0a05338 },
+
+	/* Default Universe VME Slave Map */
+	{ 0xf00, 0xc0f20001 },
+	{ 0xf04, 0x40000000 },
+	{ 0xf08, 0x40001000 },
+	{ 0xf0c, 0xc0001000 },
+	{ 0xf14, 0xe0f200c0 },
+	{ 0xf18, 0x10000000 },
+	{ 0xf1c, 0x20000000 },
+	{ 0xf20, 0x70000000 },
+	{ 0xf28, 0x00000000 },
+	{ 0xf2c, 0x00000000 },
+	{ 0xf30, 0x00000000 },
+	{ 0xf34, 0x00000000 },
+	{ 0xf3c, 0x00000000 },
+	{ 0xf40, 0x00000000 },
+	{ 0xf44, 0x00000000 },
+	{ 0xf48, 0x00000000 },
+#endif
+
+	{ 0, 0 },
+};
+
 int
 mpcpcibrmatch(parent, match, aux)
 	struct device *parent;
@@ -139,6 +198,7 @@ mpcpcibrattach(parent, self, aux)
 	struct pcibr_softc *sc = (struct pcibr_softc *)self;
 	struct pcibr_config *lcp;
 	struct pcibus_attach_args pba;
+	const struct raven_setup *rs;
 
 	lcp = sc->sc_pcibr = &mpc_config;
 
@@ -180,8 +240,10 @@ mpcpcibrattach(parent, self, aux)
 	pba.pba_pc = &lcp->lc_pc;
 	pba.pba_bus = 0; 
 
-#if 0
-	/* set up prep environment */
+	/*
+	 * Set up PREP environment
+	 */
+
 	*(u_int32_t *)(ravenregs + RAVEN_MSADD0) = RAVEN_MSADD0_PREP;
 	*(u_int32_t *)(ravenregs + RAVEN_MSOFF0) = RAVEN_MSOFF0_PREP;
 	*(u_int32_t *)(ravenregs + RAVEN_MSADD1) = RAVEN_MSADD1_PREP;
@@ -191,32 +253,13 @@ mpcpcibrattach(parent, self, aux)
 	*(u_int32_t *)(ravenregs + RAVEN_MSADD3) = RAVEN_MSADD3_PREP;
 	*(u_int32_t *)(ravenregs + RAVEN_MSOFF3) = RAVEN_MSOFF3_PREP;
 
-	/* set up PCI local bus */
-	mpc_cfg_write_4(lcp, RAVEN_PCI_MEM, MPCIC_BASE);
-	mpc_cfg_write_4(lcp, RAVEN_PCI_PSADD0, RAVEN_PCI_PSADD0_VAL);
-	mpc_cfg_write_4(lcp, RAVEN_PCI_PSOFF0, RAVEN_PCI_PSOFF0_VAL);
-	mpc_cfg_write_4(lcp, RAVEN_PCI_PSADD1, RAVEN_PCI_PSADD1_VAL);
-	mpc_cfg_write_4(lcp, RAVEN_PCI_PSOFF1, RAVEN_PCI_PSOFF1_VAL);
-	mpc_cfg_write_4(lcp, RAVEN_PCI_PSADD2, RAVEN_PCI_PSADD2_VAL);
-	mpc_cfg_write_4(lcp, RAVEN_PCI_PSOFF2, RAVEN_PCI_PSOFF2_VAL);
-	mpc_cfg_write_4(lcp, RAVEN_PCI_PSADD3, RAVEN_PCI_PSADD3_VAL);
-	mpc_cfg_write_4(lcp, RAVEN_PCI_PSOFF3, RAVEN_PCI_PSOFF3_VAL);
-
-	/* set up VME -> PCI local bus */
-
-	mpc_cfg_write_4(lcp, 0x100, 0x0);
-	mpc_cfg_write_4(lcp, 0x114, 0x0);
-	mpc_cfg_write_4(lcp, 0x128, 0x0);
-	mpc_cfg_write_4(lcp, 0x13C, 0x0);
-
-	mpc_cfg_write_4(lcp, 0xF00, 0x0);
-	mpc_cfg_write_4(lcp, 0xF14, 0x0);
-	mpc_cfg_write_4(lcp, 0xF28, 0x0);
-	mpc_cfg_write_4(lcp, 0xF3C, 0x0);
-#endif 
+	for (rs = raven_prep_setup; rs->pci_reg != 0; rs++) {
+		mpc_cfg_write_4(lcp, rs->pci_reg, rs->value);
+	}
+
 	/* enable mem and io mapping, and bus master */
 	mpc_cfg_write_2(lcp, RAVEN_PCI_CMD, 
-	    RAVEN_CMD_IOSP|RAVEN_CMD_MEMSP|RAVEN_CMD_MASTR);
+	    RAVEN_CMD_IOSP | RAVEN_CMD_MEMSP | RAVEN_CMD_MASTR);
 
 	config_found(self, &pba, mpcpcibrprint);
 }
@@ -239,17 +282,14 @@ mpcpcibrprint(aux, pnp)
  *  XXX Note that cross page boundaries are *not* guaranteed to work!
  */
 paddr_t
-vtophys(paddr_t pa)
+vtophys(vaddr_t va)
 {
-	vaddr_t va = (vaddr_t) pa;
+	paddr_t pa;
 
-	if (va < VM_MIN_KERNEL_ADDRESS)
-		pa = va;
-	else
-		if (pmap_extract(pmap_kernel(), va, &pa) != 0)
-			return NULL;
+	if (pmap_extract(pmap_kernel(), va, &pa) == FALSE)
+		return NULL;
 
-	return pa;
+	return PHYS_TO_PCI_MEM(pa);
 }
 
 void
@@ -308,10 +348,13 @@ mpc_gen_config_reg(cpv, tag, offset)
 	pcitag_t tag;
 	int offset;
 {
+#if 0
 	struct pcibr_config *cp = cpv;
 	unsigned int bus, dev, fcn;
+#endif
 	u_int32_t reg;
 
+#if 0
 	mpc_decompose_tag(cpv, tag, &bus, &dev, &fcn);
 
 	if (cp->config_type & 1) {
@@ -339,6 +382,9 @@ mpc_gen_config_reg(cpv, tag, offset)
 
 		}
 	} else {
+#else
+	{
+#endif
 		/* config mechanism #2, type 0 */
 		/* standard cf8/cfc config */
 		reg =  0x80000000 | tag  | offset;
@@ -519,7 +565,7 @@ void
 mpc_intr_disestablish(lcv, cookie)
 	void *lcv, *cookie;
 {
-	/* XXX We should probably do something clever here.... later */
+	(*intr_disestablish_func)(lcv, cookie);
 }
 
 u_int32_t
@@ -541,6 +587,7 @@ mpc_cfg_write_1(cp, reg, val)
 	u_int8_t val;
 {
 	int s;
+
 	s = splhigh();
 	bus_space_write_4(cp->lc_iot, cp->ioh_cf8, 0, RAVEN_REGOFFS(reg));
 	bus_space_write_1(cp->lc_iot, cp->ioh_cfc, 0, val);
@@ -554,6 +601,7 @@ mpc_cfg_write_2(cp, reg, val)
 	u_int16_t val;
 {
 	int s;
+
 	s = splhigh();
 	bus_space_write_4(cp->lc_iot, cp->ioh_cf8, 0, RAVEN_REGOFFS(reg));
 	bus_space_write_2(cp->lc_iot, cp->ioh_cfc, 0, val);
@@ -566,8 +614,8 @@ mpc_cfg_write_4(cp, reg, val)
 	u_int32_t reg;
 	u_int32_t val;
 {
-
 	int s;
+
 	s = splhigh();
 	bus_space_write_4(cp->lc_iot, cp->ioh_cf8, 0, RAVEN_REGOFFS(reg));
 	bus_space_write_4(cp->lc_iot, cp->ioh_cfc, 0, val);
@@ -580,8 +628,8 @@ mpc_cfg_read_1(cp, reg)
 	u_int32_t reg;
 {
 	u_int8_t _v_;
-
 	int s;
+
 	s = splhigh();
 	bus_space_write_4(cp->lc_iot, cp->ioh_cf8, 0, RAVEN_REGOFFS(reg));
 	_v_ = bus_space_read_1(cp->lc_iot, cp->ioh_cfc, 0);
@@ -595,8 +643,8 @@ mpc_cfg_read_2(cp, reg)
 	u_int32_t reg;
 {
 	u_int16_t _v_;
-
 	int s;
+
 	s = splhigh();
 	bus_space_write_4(cp->lc_iot, cp->ioh_cf8, 0, RAVEN_REGOFFS(reg));
 	_v_ = bus_space_read_2(cp->lc_iot, cp->ioh_cfc, 0);
@@ -610,8 +658,8 @@ mpc_cfg_read_4(cp, reg)
 	u_int32_t reg;
 {
 	u_int32_t _v_;
-
 	int s;
+
 	s = splhigh();
 	bus_space_write_4(cp->lc_iot, cp->ioh_cf8, 0, RAVEN_REGOFFS(reg));
 	_v_ = bus_space_read_4(cp->lc_iot, cp->ioh_cfc, 0);