diff options
| author | Mark Kettenis <kettenis@cvs.openbsd.org> | 2016-08-11 00:28:07 +0000 |
|---|---|---|
| committer | Mark Kettenis <kettenis@cvs.openbsd.org> | 2016-08-11 00:28:07 +0000 |
| commit | 84f45aab4c78d25c3fd9f890d0aa2245722fe3cd (patch) | |
| tree | 74c56a602a29bcdd29471eb623b6b4ad0920e6b7 /bin | |
| parent | 08a5fbe425befb167b985c367a7a2b0f11c92f5d (diff) | |
The ARMv7 ARM says that the TLB may hold translation table entries at any
level of the translation table, including entries that point to further
levels of the tables. This means that we have to do a TLB flush whenever
we invalidate an L1 slot too. Doing so fixes the pmap_fault_fixup
issue on Cortex-A7 processors.
Diffstat (limited to 'bin')
0 files changed, 0 insertions, 0 deletions