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authorJonathan Gray <jsg@cvs.openbsd.org>2019-01-29 05:51:31 +0000
committerJonathan Gray <jsg@cvs.openbsd.org>2019-01-29 05:51:31 +0000
commit09cb1063a99b711d222f0052c0b5fdb2729cbaa5 (patch)
tree5fc5366c635a91e647c226e8ef3064791c31f7df /gnu/usr.bin/clang
parentc3cfdceec34a48f85ed689ee5c36b5c1dfec1c46 (diff)
add AMDGPUCodeGen
Diffstat (limited to 'gnu/usr.bin/clang')
-rw-r--r--gnu/usr.bin/clang/libLLVMAMDGPUCodeGen/Makefile102
1 files changed, 102 insertions, 0 deletions
diff --git a/gnu/usr.bin/clang/libLLVMAMDGPUCodeGen/Makefile b/gnu/usr.bin/clang/libLLVMAMDGPUCodeGen/Makefile
new file mode 100644
index 00000000000..b73a4c35a9c
--- /dev/null
+++ b/gnu/usr.bin/clang/libLLVMAMDGPUCodeGen/Makefile
@@ -0,0 +1,102 @@
+# $OpenBSD: Makefile,v 1.1 2019/01/29 05:51:30 jsg Exp $
+
+LIB= LLVMAMDGPUCodeGen
+NOPIC=
+NOPROFILE=
+
+CPPFLAGS+= -I${.OBJDIR}/../include/llvm/AMDGPU \
+ -I${LLVM_SRCS}/lib/Target/AMDGPU
+
+.include <bsd.own.mk>
+SRCS= AMDGPUAliasAnalysis.cpp \
+ AMDGPUAlwaysInlinePass.cpp \
+ AMDGPUAnnotateKernelFeatures.cpp \
+ AMDGPUAnnotateUniformValues.cpp \
+ AMDGPUArgumentUsageInfo.cpp \
+ AMDGPUAsmPrinter.cpp \
+ AMDGPUCallLowering.cpp \
+ AMDGPUCodeGenPrepare.cpp \
+ AMDGPUFrameLowering.cpp \
+ AMDGPUHSAMetadataStreamer.cpp \
+ AMDGPUInstrInfo.cpp \
+ AMDGPUInstructionSelector.cpp \
+ AMDGPUIntrinsicInfo.cpp \
+ AMDGPUISelDAGToDAG.cpp \
+ AMDGPUISelLowering.cpp \
+ AMDGPULegalizerInfo.cpp \
+ AMDGPULibCalls.cpp \
+ AMDGPULibFunc.cpp \
+ AMDGPULowerIntrinsics.cpp \
+ AMDGPULowerKernelArguments.cpp \
+ AMDGPULowerKernelAttributes.cpp \
+ AMDGPUMachineCFGStructurizer.cpp \
+ AMDGPUMachineFunction.cpp \
+ AMDGPUMachineModuleInfo.cpp \
+ AMDGPUMacroFusion.cpp \
+ AMDGPUMCInstLower.cpp \
+ AMDGPUOpenCLEnqueuedBlockLowering.cpp \
+ AMDGPUPromoteAlloca.cpp \
+ AMDGPURegAsmNames.inc.cpp \
+ AMDGPURegisterBankInfo.cpp \
+ AMDGPURegisterInfo.cpp \
+ AMDGPURewriteOutArguments.cpp \
+ AMDGPUSubtarget.cpp \
+ AMDGPUTargetMachine.cpp \
+ AMDGPUTargetObjectFile.cpp \
+ AMDGPUTargetTransformInfo.cpp \
+ AMDGPUUnifyDivergentExitNodes.cpp \
+ AMDGPUUnifyMetadata.cpp \
+ AMDGPUInline.cpp \
+ AMDGPUPerfHintAnalysis.cpp \
+ AMDILCFGStructurizer.cpp \
+ GCNHazardRecognizer.cpp \
+ GCNIterativeScheduler.cpp \
+ GCNMinRegStrategy.cpp \
+ GCNRegPressure.cpp \
+ GCNSchedStrategy.cpp \
+ R600AsmPrinter.cpp \
+ R600ClauseMergePass.cpp \
+ R600ControlFlowFinalizer.cpp \
+ R600EmitClauseMarkers.cpp \
+ R600ExpandSpecialInstrs.cpp \
+ R600FrameLowering.cpp \
+ R600InstrInfo.cpp \
+ R600ISelLowering.cpp \
+ R600MachineFunctionInfo.cpp \
+ R600MachineScheduler.cpp \
+ R600OpenCLImageTypeLoweringPass.cpp \
+ R600OptimizeVectorRegisters.cpp \
+ R600Packetizer.cpp \
+ R600RegisterInfo.cpp \
+ SIAnnotateControlFlow.cpp \
+ SIDebuggerInsertNops.cpp \
+ SIFixSGPRCopies.cpp \
+ SIFixVGPRCopies.cpp \
+ SIFixWWMLiveness.cpp \
+ SIFoldOperands.cpp \
+ SIFormMemoryClauses.cpp \
+ SIFrameLowering.cpp \
+ SIInsertSkips.cpp \
+ SIInsertWaitcnts.cpp \
+ SIInstrInfo.cpp \
+ SIISelLowering.cpp \
+ SILoadStoreOptimizer.cpp \
+ SILowerControlFlow.cpp \
+ SILowerI1Copies.cpp \
+ SIMachineFunctionInfo.cpp \
+ SIMachineScheduler.cpp \
+ SIMemoryLegalizer.cpp \
+ SIOptimizeExecMasking.cpp \
+ SIOptimizeExecMaskingPreRA.cpp \
+ SIPeepholeSDWA.cpp \
+ SIRegisterInfo.cpp \
+ SIShrinkInstructions.cpp \
+ SIWholeQuadMode.cpp \
+ GCNILPSched.cpp
+
+.PATH: ${.CURDIR}/../../../llvm/lib/Target/AMDGPU
+
+install:
+ @# Nothing here so far ...
+
+.include <bsd.lib.mk>