Import LLVM 10.0.0 release including clang, lld and lldb.

ok hackroom
tested by plenty

1 files changed, 27 insertions, 57 deletions

diff --git a/gnu/llvm/lld/ELF/Arch/RISCV.cpp b/gnu/llvm/lld/ELF/Arch/RISCV.cpp
index dad23fff91c..527f9db0ef2 100644
--- a/gnu/llvm/lld/ELF/Arch/RISCV.cpp
+++ b/gnu/llvm/lld/ELF/Arch/RISCV.cpp
@@ -15,8 +15,9 @@ using namespace llvm;
 using namespace llvm::object;
 using namespace llvm::support::endian;
 using namespace llvm::ELF;
-using namespace lld;
-using namespace lld::elf;
+
+namespace lld {
+namespace elf {
 
 namespace {
 
@@ -24,18 +25,15 @@ class RISCV final : public TargetInfo {
 public:
   RISCV();
   uint32_t calcEFlags() const override;
-  int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override;
   void writeGotHeader(uint8_t *buf) const override;
   void writeGotPlt(uint8_t *buf, const Symbol &s) const override;
-  void writeIgotPlt(uint8_t *buf, const Symbol &s) const override;
   void writePltHeader(uint8_t *buf) const override;
   void writePlt(uint8_t *buf, const Symbol &sym,
                 uint64_t pltEntryAddr) const override;
   RelType getDynRel(RelType type) const override;
   RelExpr getRelExpr(RelType type, const Symbol &s,
                      const uint8_t *loc) const override;
-  void relocate(uint8_t *loc, const Relocation &rel,
-                uint64_t val) const override;
+  void relocateOne(uint8_t *loc, RelType type, uint64_t val) const override;
 };
 
 } // end anonymous namespace
@@ -78,7 +76,6 @@ RISCV::RISCV() {
   noneRel = R_RISCV_NONE;
   pltRel = R_RISCV_JUMP_SLOT;
   relativeRel = R_RISCV_RELATIVE;
-  iRelativeRel = R_RISCV_IRELATIVE;
   if (config->is64) {
     symbolicRel = R_RISCV_64;
     tlsModuleIndexRel = R_RISCV_TLS_DTPMOD64;
@@ -106,8 +103,8 @@ RISCV::RISCV() {
 
 static uint32_t getEFlags(InputFile *f) {
   if (config->is64)
-    return cast<ObjFile<ELF64LE>>(f)->getObj().getHeader().e_flags;
-  return cast<ObjFile<ELF32LE>>(f)->getObj().getHeader().e_flags;
+    return cast<ObjFile<ELF64LE>>(f)->getObj().getHeader()->e_flags;
+  return cast<ObjFile<ELF32LE>>(f)->getObj().getHeader()->e_flags;
 }
 
 uint32_t RISCV::calcEFlags() const {
@@ -135,28 +132,6 @@ uint32_t RISCV::calcEFlags() const {
   return target;
 }
 
-int64_t RISCV::getImplicitAddend(const uint8_t *buf, RelType type) const {
-  switch (type) {
-  default:
-    internalLinkerError(getErrorLocation(buf),
-                        "cannot read addend for relocation " + toString(type));
-    return 0;
-  case R_RISCV_32:
-  case R_RISCV_TLS_DTPMOD32:
-  case R_RISCV_TLS_DTPREL32:
-    return SignExtend64<32>(read32le(buf));
-  case R_RISCV_64:
-    return read64le(buf);
-  case R_RISCV_RELATIVE:
-  case R_RISCV_IRELATIVE:
-    return config->is64 ? read64le(buf) : read32le(buf);
-  case R_RISCV_NONE:
-  case R_RISCV_JUMP_SLOT:
-    // These relocations are defined as not having an implicit addend.
-    return 0;
-  }
-}
-
 void RISCV::writeGotHeader(uint8_t *buf) const {
   if (config->is64)
     write64le(buf, mainPart->dynamic->getVA());
@@ -171,15 +146,6 @@ void RISCV::writeGotPlt(uint8_t *buf, const Symbol &s) const {
     write32le(buf, in.plt->getVA());
 }
 
-void RISCV::writeIgotPlt(uint8_t *buf, const Symbol &s) const {
-  if (config->writeAddends) {
-    if (config->is64)
-      write64le(buf, s.getVA());
-    else
-      write32le(buf, s.getVA());
-  }
-}
-
 void RISCV::writePltHeader(uint8_t *buf) const {
   // 1: auipc t2, %pcrel_hi(.got.plt)
   // sub t1, t1, t3
@@ -268,7 +234,7 @@ RelExpr RISCV::getRelExpr(const RelType type, const Symbol &s,
   case R_RISCV_TPREL_HI20:
   case R_RISCV_TPREL_LO12_I:
   case R_RISCV_TPREL_LO12_S:
-    return R_TPREL;
+    return R_TLS;
   case R_RISCV_RELAX:
   case R_RISCV_TPREL_ADD:
     return R_NONE;
@@ -291,10 +257,11 @@ static uint32_t extractBits(uint64_t v, uint32_t begin, uint32_t end) {
   return (v & ((1ULL << (begin + 1)) - 1)) >> end;
 }
 
-void RISCV::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
+void RISCV::relocateOne(uint8_t *loc, const RelType type,
+                        const uint64_t val) const {
   const unsigned bits = config->wordsize * 8;
 
-  switch (rel.type) {
+  switch (type) {
   case R_RISCV_32:
     write32le(loc, val);
     return;
@@ -303,8 +270,8 @@ void RISCV::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
     return;
 
   case R_RISCV_RVC_BRANCH: {
-    checkInt(loc, static_cast<int64_t>(val) >> 1, 8, rel);
-    checkAlignment(loc, val, 2, rel);
+    checkInt(loc, static_cast<int64_t>(val) >> 1, 8, type);
+    checkAlignment(loc, val, 2, type);
     uint16_t insn = read16le(loc) & 0xE383;
     uint16_t imm8 = extractBits(val, 8, 8) << 12;
     uint16_t imm4_3 = extractBits(val, 4, 3) << 10;
@@ -318,8 +285,8 @@ void RISCV::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
   }
 
   case R_RISCV_RVC_JUMP: {
-    checkInt(loc, static_cast<int64_t>(val) >> 1, 11, rel);
-    checkAlignment(loc, val, 2, rel);
+    checkInt(loc, static_cast<int64_t>(val) >> 1, 11, type);
+    checkAlignment(loc, val, 2, type);
     uint16_t insn = read16le(loc) & 0xE003;
     uint16_t imm11 = extractBits(val, 11, 11) << 12;
     uint16_t imm4 = extractBits(val, 4, 4) << 11;
@@ -337,7 +304,7 @@ void RISCV::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
 
   case R_RISCV_RVC_LUI: {
     int64_t imm = SignExtend64(val + 0x800, bits) >> 12;
-    checkInt(loc, imm, 6, rel);
+    checkInt(loc, imm, 6, type);
     if (imm == 0) { // `c.lui rd, 0` is illegal, convert to `c.li rd, 0`
       write16le(loc, (read16le(loc) & 0x0F83) | 0x4000);
     } else {
@@ -349,8 +316,8 @@ void RISCV::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
   }
 
   case R_RISCV_JAL: {
-    checkInt(loc, static_cast<int64_t>(val) >> 1, 20, rel);
-    checkAlignment(loc, val, 2, rel);
+    checkInt(loc, static_cast<int64_t>(val) >> 1, 20, type);
+    checkAlignment(loc, val, 2, type);
 
     uint32_t insn = read32le(loc) & 0xFFF;
     uint32_t imm20 = extractBits(val, 20, 20) << 31;
@@ -364,8 +331,8 @@ void RISCV::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
   }
 
   case R_RISCV_BRANCH: {
-    checkInt(loc, static_cast<int64_t>(val) >> 1, 12, rel);
-    checkAlignment(loc, val, 2, rel);
+    checkInt(loc, static_cast<int64_t>(val) >> 1, 12, type);
+    checkAlignment(loc, val, 2, type);
 
     uint32_t insn = read32le(loc) & 0x1FFF07F;
     uint32_t imm12 = extractBits(val, 12, 12) << 31;
@@ -382,10 +349,10 @@ void RISCV::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
   case R_RISCV_CALL:
   case R_RISCV_CALL_PLT: {
     int64_t hi = SignExtend64(val + 0x800, bits) >> 12;
-    checkInt(loc, hi, 20, rel);
+    checkInt(loc, hi, 20, type);
     if (isInt<20>(hi)) {
-      relocateNoSym(loc, R_RISCV_PCREL_HI20, val);
-      relocateNoSym(loc + 4, R_RISCV_PCREL_LO12_I, val);
+      relocateOne(loc, R_RISCV_PCREL_HI20, val);
+      relocateOne(loc + 4, R_RISCV_PCREL_LO12_I, val);
     }
     return;
   }
@@ -397,7 +364,7 @@ void RISCV::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
   case R_RISCV_TPREL_HI20:
   case R_RISCV_HI20: {
     uint64_t hi = val + 0x800;
-    checkInt(loc, SignExtend64(hi, bits) >> 12, 20, rel);
+    checkInt(loc, SignExtend64(hi, bits) >> 12, 20, type);
     write32le(loc, (read32le(loc) & 0xFFF) | (hi & 0xFFFFF000));
     return;
   }
@@ -478,7 +445,10 @@ void RISCV::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
   }
 }
 
-TargetInfo *elf::getRISCVTargetInfo() {
+TargetInfo *getRISCVTargetInfo() {
   static RISCV target;
   return &target;
 }
+
+} // namespace elf
+} // namespace lld