Sync with NetBSD 961207

34 files changed, 2139 insertions, 661 deletions

diff --git a/sys/arch/alpha/pci/apecs.c b/sys/arch/alpha/pci/apecs.c
index 516164eec5d..c4ee4f99b73 100644
--- a/sys/arch/alpha/pci/apecs.c
+++ b/sys/arch/alpha/pci/apecs.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: apecs.c,v 1.7 1996/12/08 00:20:30 niklas Exp $	*/
-/*	$NetBSD: apecs.c,v 1.13 1996/10/23 04:12:22 cgd Exp $	*/
+/*	$OpenBSD: apecs.c,v 1.8 1997/01/24 19:57:32 niklas Exp $	*/
+/*	$NetBSD: apecs.c,v 1.16 1996/12/05 01:39:34 cgd Exp $	*/
 
 /*
  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
@@ -49,7 +49,11 @@
 #include <alpha/pci/pci_2100_a50.h>
 #endif
 
+#ifdef __BROKEN_INDIRECT_CONFIG
 int	apecsmatch __P((struct device *, void *, void *));
+#else
+int	apecsmatch __P((struct device *, struct cfdata *, void *));
+#endif
 void	apecsattach __P((struct device *, struct device *, void *));
 
 struct cfattach apecs_ca = {
@@ -69,7 +73,12 @@ struct apecs_config apecs_configuration;
 int
 apecsmatch(parent, match, aux)
 	struct device *parent;
-	void *match, *aux;
+#ifdef __BROKEN_INDIRECT_CONFIG
+	void *match;
+#else
+	struct cfdata *match;
+#endif
+	void *aux;
 {
 	struct confargs *ca = aux;
 
@@ -87,10 +96,10 @@ apecsmatch(parent, match, aux)
  * Set up the chipset's function pointers.
  */
 void
-apecs_init(acp)
+apecs_init(acp, mallocsafe)
 	struct apecs_config *acp;
+	int mallocsafe;
 {
-
 	acp->ac_comanche_pass2 =
 	    (REGVAL(COMANCHE_ED) & COMANCHE_ED_PASS2) != 0;
 	acp->ac_memwidth =
@@ -98,12 +107,21 @@ apecs_init(acp)
 	acp->ac_epic_pass2 =
 	    (REGVAL(EPIC_DCSR) & EPIC_DCSR_PASS2) != 0;
 
+	acp->ac_haxr1 = REGVAL(EPIC_HAXR1);
+	acp->ac_haxr2 = REGVAL(EPIC_HAXR2);
+
 	/*
 	 * Can't set up SGMAP data here; can be called before malloc().
+	 * XXX THIS COMMENT NO LONGER MAKES SENSE.
 	 */
 
-	acp->ac_iot = apecs_lca_bus_io_init(acp);
-	acp->ac_memt = apecs_lca_bus_mem_init(acp);
+	if (!acp->ac_initted) {
+		/* don't do these twice since they set up extents */
+		acp->ac_iot = apecs_bus_io_init(acp);
+		acp->ac_memt = apecs_bus_mem_init(acp);
+	}
+	acp->ac_mallocsafe = mallocsafe;
+
 	apecs_pci_init(&acp->ac_pc, acp);
 
 	/* Turn off DMA window enables in PCI Base Reg 1. */
@@ -118,6 +136,8 @@ apecs_init(acp)
 		alpha_XXX_dmamap_or = 0x40000000;		/* XXX */
 	}							/* XXX */
 	/* XXX XXX END XXX XXX */
+
+	acp->ac_initted = 1;
 }
 
 void
@@ -137,7 +157,7 @@ apecsattach(parent, self, aux)
 	 * (maybe), but doesn't hurt to do twice.
 	 */
 	acp = sc->sc_acp = &apecs_configuration;
-	apecs_init(acp);
+	apecs_init(acp, 1);
 
 	/* XXX SGMAP FOO */
 
@@ -158,6 +178,7 @@ apecsattach(parent, self, aux)
 		pci_2100_a50_pickintr(acp);
 		break;
 #endif
+
 	default:
 		panic("apecsattach: shouldn't be here, really...");
 	}
@@ -175,7 +196,7 @@ apecsprint(aux, pnp)
 	void *aux;
 	const char *pnp;
 {
-        register struct pcibus_attach_args *pba = aux;
+	register struct pcibus_attach_args *pba = aux;
 
 	/* only PCIs can attach to APECSes; easy. */
 	if (pnp)
diff --git a/sys/arch/alpha/pci/apecs_bus_io.c b/sys/arch/alpha/pci/apecs_bus_io.c
new file mode 100644
index 00000000000..4469938b47a
--- /dev/null
+++ b/sys/arch/alpha/pci/apecs_bus_io.c
@@ -0,0 +1,63 @@
+/*	$NetBSD: apecs_bus_io.c,v 1.1 1996/11/25 03:42:09 cgd Exp $	*/
+
+/*
+ * Copyright (c) 1996 Carnegie-Mellon University.
+ * All rights reserved.
+ *
+ * Author: Chris G. Demetriou
+ *
+ * Permission to use, copy, modify and distribute this software and
+ * its documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/malloc.h>
+#include <sys/syslog.h>
+#include <sys/device.h>
+#include <vm/vm.h>
+
+#include <machine/bus.h>
+
+#include <alpha/pci/apecsreg.h>
+#include <alpha/pci/apecsvar.h>
+
+#define	CHIP		apecs
+
+#define	CHIP_EX_MALLOC_SAFE(v)	(((struct apecs_config *)(v))->ac_mallocsafe)
+#define	CHIP_IO_EXTENT(v)	(((struct apecs_config *)(v))->ac_io_ex)
+
+/* IO region 1 */
+#define	CHIP_IO_W1_BUS_START(v)	0x00000000UL
+#define	CHIP_IO_W1_BUS_END(v)	0x0003ffffUL
+#define	CHIP_IO_W1_SYS_START(v)	APECS_PCI_SIO
+#define	CHIP_IO_W1_SYS_END(v)	(APECS_PCI_SIO + (0x00040000UL << 5) - 1)
+
+/* IO region 2 */
+#define	CHIP_IO_W2_BUS_START(v)						\
+    ((((struct apecs_config *)(v))->ac_haxr2 & EPIC_HAXR2_EADDR) +	\
+      0x00040000UL)
+#define	CHIP_IO_W2_BUS_END(v)						\
+    ((((struct apecs_config *)(v))->ac_haxr2 & EPIC_HAXR2_EADDR) +	\
+      0x00ffffffUL)
+#define	CHIP_IO_W2_SYS_START(v)	(APECS_PCI_SIO + (0x00040000UL << 5))
+#define	CHIP_IO_W2_SYS_END(v)	(APECS_PCI_SIO + (0x01000000UL << 5) - 1)
+
+#include "pcs_bus_io_common.c"
diff --git a/sys/arch/alpha/pci/apecs_bus_mem.c b/sys/arch/alpha/pci/apecs_bus_mem.c
new file mode 100644
index 00000000000..c355cb18e41
--- /dev/null
+++ b/sys/arch/alpha/pci/apecs_bus_mem.c
@@ -0,0 +1,73 @@
+/*	$NetBSD: apecs_bus_mem.c,v 1.1 1996/11/25 03:42:11 cgd Exp $	*/
+
+/*
+ * Copyright (c) 1996 Carnegie-Mellon University.
+ * All rights reserved.
+ *
+ * Author: Chris G. Demetriou
+ *
+ * Permission to use, copy, modify and distribute this software and
+ * its documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/malloc.h>
+#include <sys/syslog.h>
+#include <sys/device.h>
+#include <vm/vm.h>
+
+#include <machine/bus.h>
+
+#include <alpha/pci/apecsreg.h>
+#include <alpha/pci/apecsvar.h>
+
+#define	CHIP	apecs
+
+#define	CHIP_EX_MALLOC_SAFE(v)	(((struct apecs_config *)(v))->ac_mallocsafe)
+#define	CHIP_D_MEM_EXTENT(v)	(((struct apecs_config *)(v))->ac_d_mem_ex)
+#define	CHIP_S_MEM_EXTENT(v)	(((struct apecs_config *)(v))->ac_s_mem_ex)
+
+/* Dense region 1 */
+#define	CHIP_D_MEM_W1_BUS_START(v)	0x00000000UL
+#define	CHIP_D_MEM_W1_BUS_END(v)	0xffffffffUL
+#define	CHIP_D_MEM_W1_SYS_START(v)	APECS_PCI_DENSE
+#define	CHIP_D_MEM_W1_SYS_END(v)	(APECS_PCI_DENSE + 0xffffffffUL)
+
+/* Sparse region 1 */
+#define	CHIP_S_MEM_W1_BUS_START(v)	0x00000000UL
+#define	CHIP_S_MEM_W1_BUS_END(v)	0x00ffffffUL
+#define	CHIP_S_MEM_W1_SYS_START(v)	APECS_PCI_SPARSE
+#define	CHIP_S_MEM_W1_SYS_END(v)					\
+    (APECS_PCI_SPARSE + (0x01000000UL << 5) - 1)
+
+/* Sparse region 2 */
+#define	CHIP_S_MEM_W2_BUS_START(v)					\
+    ((((struct apecs_config *)(v))->ac_haxr1 & EPIC_HAXR1_EADDR) +	\
+      0x01000000UL)
+#define	CHIP_S_MEM_W2_BUS_END(v)					\
+    ((((struct apecs_config *)(v))->ac_haxr1 & EPIC_HAXR1_EADDR) +	\
+      0x07ffffffUL)
+#define	CHIP_S_MEM_W2_SYS_START(v)					\
+    (APECS_PCI_SPARSE + (0x01000000UL << 5))
+#define	CHIP_S_MEM_W2_SYS_END(v)					\
+    (APECS_PCI_SPARSE + (0x08000000UL << 5) - 1)
+
+#include "pcs_bus_mem_common.c"
diff --git a/sys/arch/alpha/pci/apecs_pci.c b/sys/arch/alpha/pci/apecs_pci.c
index c61fed79b98..6fd68da1cdd 100644
--- a/sys/arch/alpha/pci/apecs_pci.c
+++ b/sys/arch/alpha/pci/apecs_pci.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: apecs_pci.c,v 1.5 1996/10/30 22:39:49 niklas Exp $	*/
-/*	$NetBSD: apecs_pci.c,v 1.9 1996/10/13 03:00:02 christos Exp $	*/
+/*	$OpenBSD: apecs_pci.c,v 1.6 1997/01/24 19:57:34 niklas Exp $	*/
+/*	$NetBSD: apecs_pci.c,v 1.10 1996/11/13 21:13:25 cgd Exp $	*/
 
 /*
  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
@@ -116,6 +116,11 @@ apecs_conf_read(cpv, tag, offset)
 	int s, secondary, ba;
 	int32_t old_haxr2;					/* XXX */
 
+#ifdef DIAGNOSTIC
+	s = 0;					/* XXX gcc -Wuninitialized */
+	old_haxr2 = 0;				/* XXX gcc -Wuninitialized */
+#endif
+
 	/* secondary if bus # != 0 */
 	pci_decompose_tag(&acp->ac_pc, tag, &secondary, 0, 0);
 	if (secondary) {
@@ -162,6 +167,11 @@ apecs_conf_write(cpv, tag, offset, data)
 	int s, secondary;
 	int32_t old_haxr2;					/* XXX */
 
+#ifdef DIAGNOSTIC
+	s = 0;					/* XXX gcc -Wuninitialized */
+	old_haxr2 = 0;				/* XXX gcc -Wuninitialized */
+#endif
+
 	/* secondary if bus # != 0 */
 	pci_decompose_tag(&acp->ac_pc, tag, &secondary, 0, 0);
 	if (secondary) {
diff --git a/sys/arch/alpha/pci/apecsvar.h b/sys/arch/alpha/pci/apecsvar.h
index d43c23d0b97..a9653702ee5 100644
--- a/sys/arch/alpha/pci/apecsvar.h
+++ b/sys/arch/alpha/pci/apecsvar.h
@@ -1,5 +1,5 @@
-/*	$OpenBSD: apecsvar.h,v 1.5 1996/12/08 00:20:34 niklas Exp $	*/
-/*	$NetBSD: apecsvar.h,v 1.4 1996/10/23 04:12:23 cgd Exp $	*/
+/*	$OpenBSD: apecsvar.h,v 1.6 1997/01/24 19:57:35 niklas Exp $	*/
+/*	$NetBSD: apecsvar.h,v 1.5 1996/11/25 03:49:36 cgd Exp $	*/
 
 /*
  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
@@ -38,12 +38,19 @@
  * do their dirty work (and more!).
  */
 struct apecs_config {
+	int	ac_initted;
+
 	int	ac_comanche_pass2;
 	int	ac_epic_pass2;
 	int	ac_memwidth;
 
 	bus_space_tag_t ac_iot, ac_memt;
 	struct alpha_pci_chipset ac_pc;
+
+	u_int32_t ac_haxr1, ac_haxr2;
+
+	struct extent *ac_io_ex, *ac_d_mem_ex, *ac_s_mem_ex;
+	int	ac_mallocsafe;
 };
 
 struct apecs_softc {
@@ -52,8 +59,8 @@ struct apecs_softc {
 	struct	apecs_config *sc_acp;
 };
 
-void	apecs_init __P((struct apecs_config *));
+void	apecs_init __P((struct apecs_config *, int));
 void	apecs_pci_init __P((pci_chipset_tag_t, void *));
 
-bus_space_tag_t apecs_lca_bus_io_init __P((void *iov));
-bus_space_tag_t apecs_lca_bus_mem_init __P((void *memv));
+bus_space_tag_t apecs_bus_io_init __P((void *));
+bus_space_tag_t apecs_bus_mem_init __P((void *));
diff --git a/sys/arch/alpha/pci/cia.c b/sys/arch/alpha/pci/cia.c
index 2a8731824de..556058a511e 100644
--- a/sys/arch/alpha/pci/cia.c
+++ b/sys/arch/alpha/pci/cia.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: cia.c,v 1.6 1996/12/08 00:20:34 niklas Exp $	*/
-/*	$NetBSD: cia.c,v 1.12 1996/10/23 04:12:24 cgd Exp $	*/
+/*	$OpenBSD: cia.c,v 1.7 1997/01/24 19:57:36 niklas Exp $	*/
+/*	$NetBSD: cia.c,v 1.15 1996/12/05 01:39:35 cgd Exp $	*/
 
 /*
  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
@@ -48,8 +48,15 @@
 #if defined(DEC_KN20AA)
 #include <alpha/pci/pci_kn20aa.h>
 #endif
+#if defined(DEC_EB164)
+#include <alpha/pci/pci_eb164.h>
+#endif
 
+#ifdef __BROKEN_INDIRECT_CONFIG
 int	ciamatch __P((struct device *, void *, void *));
+#else
+int	ciamatch __P((struct device *, struct cfdata *, void *));
+#endif
 void	ciaattach __P((struct device *, struct device *, void *));
 
 struct cfattach cia_ca = {
@@ -69,7 +76,12 @@ struct cia_config cia_configuration;
 int
 ciamatch(parent, match, aux)
 	struct device *parent;
-	void *match, *aux;
+#ifdef __BROKEN_INDIRECT_CONFIG
+	void *match;
+#else
+	struct cfdata *match;
+#endif
+	void *aux;
 {
 	struct confargs *ca = aux;
 
@@ -87,27 +99,36 @@ ciamatch(parent, match, aux)
  * Set up the chipset's function pointers.
  */
 void
-cia_init(ccp)
+cia_init(ccp, mallocsafe)
 	struct cia_config *ccp;
+	int mallocsafe;
 {
 
 	/*
 	 * Can't set up SGMAP data here; can be called before malloc().
+	 * XXX THIS COMMENT NO LONGER MAKES SENSE.
 	 */
 
-        ccp->cc_iot = cia_bus_io_init(ccp);
-        ccp->cc_memt = cia_bus_mem_init(ccp);
-        cia_pci_init(&ccp->cc_pc, ccp);
-
 	ccp->cc_hae_mem = REGVAL(CIA_CSR_HAE_MEM);
 	ccp->cc_hae_io = REGVAL(CIA_CSR_HAE_IO);
 
+	if (!ccp->cc_initted) {
+		/* don't do these twice since they set up extents */
+		ccp->cc_iot = cia_bus_io_init(ccp);
+		ccp->cc_memt = cia_bus_mem_init(ccp);
+	}
+	ccp->cc_mallocsafe = mallocsafe;
+
+	cia_pci_init(&ccp->cc_pc, ccp);
+
 	/* XXX XXX BEGIN XXX XXX */
 	{							/* XXX */
 		extern vm_offset_t alpha_XXX_dmamap_or;		/* XXX */
 		alpha_XXX_dmamap_or = 0x40000000;		/* XXX */
 	}							/* XXX */
 	/* XXX XXX END XXX XXX */
+
+	ccp->cc_initted = 1;
 }
 
 void
@@ -127,7 +148,7 @@ ciaattach(parent, self, aux)
 	 * (maybe), but doesn't hurt to do twice.
 	 */
 	ccp = sc->sc_ccp = &cia_configuration;
-	cia_init(ccp);
+	cia_init(ccp, 1);
 
 	/* XXX print chipset information */
 	printf("\n");
@@ -141,6 +162,16 @@ ciaattach(parent, self, aux)
 #endif
 		break;
 #endif
+
+#if defined(DEC_EB164)
+	case ST_EB164:
+		pci_eb164_pickintr(ccp);
+#ifdef EVCNT_COUNTERS
+		evcnt_attach(self, "intr", &eb164_intr_evcnt);
+#endif
+		break;
+#endif
+
 	default:
 		panic("ciaattach: shouldn't be here, really...");
 	}
diff --git a/sys/arch/alpha/pci/cia_bus_io.c b/sys/arch/alpha/pci/cia_bus_io.c
index b0352ddea0f..ea36a7382bf 100644
--- a/sys/arch/alpha/pci/cia_bus_io.c
+++ b/sys/arch/alpha/pci/cia_bus_io.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: cia_bus_io.c,v 1.5 1996/12/08 00:20:35 niklas Exp $	*/
-/*	$NetBSD: cia_bus_io.c,v 1.5 1996/08/27 16:29:25 cgd Exp $	*/
+/*	$OpenBSD: cia_bus_io.c,v 1.6 1997/01/24 19:57:37 niklas Exp $	*/
+/*	$NetBSD: cia_bus_io.c,v 1.6 1996/11/25 03:46:07 cgd Exp $	*/
 
 /*
  * Copyright (c) 1996 Carnegie-Mellon University.
@@ -42,24 +42,27 @@
 
 #define	CHIP		cia
 
+#define	CHIP_EX_MALLOC_SAFE(v)	(((struct cia_config *)(v))->cc_mallocsafe)
+#define	CHIP_IO_EXTENT(v)	(((struct cia_config *)(v))->cc_io_ex)
+
 /* IO region 1 */
-#define CHIP_IO_W1_START(v)						\
+#define CHIP_IO_W1_BUS_START(v)						\
 	    HAE_IO_REG1_START(((struct cia_config *)(v))->cc_hae_io)
-#define CHIP_IO_W1_END(v)						\
-	    (CHIP_IO_W1_START(v) + HAE_IO_REG1_MASK)
-#define CHIP_IO_W1_BASE(v)						\
+#define CHIP_IO_W1_BUS_END(v)						\
+	    (CHIP_IO_W1_BUS_START(v) + HAE_IO_REG1_MASK)
+#define CHIP_IO_W1_SYS_START(v)						\
 	    CIA_PCI_SIO1
-#define CHIP_IO_W1_MASK(v)						\
-	    HAE_IO_REG1_MASK
+#define CHIP_IO_W1_SYS_END(v)						\
+	    (CIA_PCI_SIO1 + ((HAE_IO_REG1_MASK + 1) << 5) - 1)
 
 /* IO region 2 */
-#define CHIP_IO_W2_START(v)						\
+#define CHIP_IO_W2_BUS_START(v)						\
 	    HAE_IO_REG2_START(((struct cia_config *)(v))->cc_hae_io)
-#define CHIP_IO_W2_END(v)						\
-	    (CHIP_IO_W2_START(v) + HAE_IO_REG2_MASK)
-#define CHIP_IO_W2_BASE(v)						\
+#define CHIP_IO_W2_BUS_END(v)						\
+	    (CHIP_IO_W2_BUS_START(v) + HAE_IO_REG2_MASK)
+#define CHIP_IO_W2_SYS_START(v)						\
 	    CIA_PCI_SIO2
-#define CHIP_IO_W2_MASK(v)						\
-	    HAE_IO_REG2_MASK
+#define CHIP_IO_W2_SYS_END(v)						\
+	    (CIA_PCI_SIO2 + ((HAE_IO_REG2_MASK + 1) << 5) - 1)
 
 #include "pcs_bus_io_common.c"
diff --git a/sys/arch/alpha/pci/cia_bus_mem.c b/sys/arch/alpha/pci/cia_bus_mem.c
index e69819e946f..38b5956e659 100644
--- a/sys/arch/alpha/pci/cia_bus_mem.c
+++ b/sys/arch/alpha/pci/cia_bus_mem.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: cia_bus_mem.c,v 1.5 1996/12/08 00:20:36 niklas Exp $	*/
-/*	$NetBSD: cia_bus_mem.c,v 1.5 1996/08/27 16:29:26 cgd Exp $	*/
+/*	$OpenBSD: cia_bus_mem.c,v 1.6 1997/01/24 19:57:38 niklas Exp $	*/
+/*	$NetBSD: cia_bus_mem.c,v 1.7 1996/11/25 03:46:09 cgd Exp $	*/
 
 /*
  * Copyright (c) 1996 Carnegie-Mellon University.
@@ -42,40 +42,44 @@
 
 #define	CHIP		cia
 
+#define	CHIP_EX_MALLOC_SAFE(v)	(((struct cia_config *)(v))->cc_mallocsafe)
+#define	CHIP_D_MEM_EXTENT(v)	(((struct cia_config *)(v))->cc_d_mem_ex)
+#define	CHIP_S_MEM_EXTENT(v)	(((struct cia_config *)(v))->cc_s_mem_ex)
+
 /* Dense region 1 */
-#define	CHIP_D_MEM_W1_START(v)	0x00000000
-#define	CHIP_D_MEM_W1_END(v)	0xffffffff
-#define	CHIP_D_MEM_W1_BASE(v)	CIA_PCI_DENSE
-#define	CHIP_D_MEM_W1_MASK(v)	0xffffffff
+#define	CHIP_D_MEM_W1_BUS_START(v)	0x00000000UL
+#define	CHIP_D_MEM_W1_BUS_END(v)	0xffffffffUL
+#define	CHIP_D_MEM_W1_SYS_START(v)	CIA_PCI_DENSE
+#define	CHIP_D_MEM_W1_SYS_END(v)	(CIA_PCI_DENSE + 0xffffffffUL)
 
 /* Sparse region 1 */
-#define	CHIP_S_MEM_W1_START(v)						\
+#define	CHIP_S_MEM_W1_BUS_START(v)					\
 	    HAE_MEM_REG1_START(((struct cia_config *)(v))->cc_hae_mem)
-#define	CHIP_S_MEM_W1_END(v)						\
-	    (CHIP_S_MEM_W1_START(v) + HAE_MEM_REG1_MASK)
-#define	CHIP_S_MEM_W1_BASE(v)						\
+#define	CHIP_S_MEM_W1_BUS_END(v)					\
+	    (CHIP_S_MEM_W1_BUS_START(v) + HAE_MEM_REG1_MASK)
+#define	CHIP_S_MEM_W1_SYS_START(v)					\
 	    CIA_PCI_SMEM1
-#define	CHIP_S_MEM_W1_MASK(v)						\
-	    HAE_MEM_REG1_MASK
+#define	CHIP_S_MEM_W1_SYS_END(v)					\
+	    (CIA_PCI_SMEM1 + ((HAE_MEM_REG1_MASK + 1) << 5) - 1)
 
 /* Sparse region 2 */
-#define	CHIP_S_MEM_W2_START(v)						\
+#define	CHIP_S_MEM_W2_BUS_START(v)					\
 	    HAE_MEM_REG2_START(((struct cia_config *)(v))->cc_hae_mem)
-#define	CHIP_S_MEM_W2_END(v)						\
-	    (CHIP_S_MEM_W2_START(v) + HAE_MEM_REG2_MASK)
-#define	CHIP_S_MEM_W2_BASE(v)						\
+#define	CHIP_S_MEM_W2_BUS_END(v)					\
+	    (CHIP_S_MEM_W2_BUS_START(v) + HAE_MEM_REG2_MASK)
+#define	CHIP_S_MEM_W2_SYS_START(v)					\
 	    CIA_PCI_SMEM2
-#define	CHIP_S_MEM_W2_MASK(v)						\
-	    HAE_MEM_REG2_MASK
+#define	CHIP_S_MEM_W2_SYS_END(v)					\
+	    (CIA_PCI_SMEM2 + ((HAE_MEM_REG2_MASK + 1) << 5) - 1)
 
 /* Sparse region 3 */
-#define	CHIP_S_MEM_W3_START(v)						\
+#define	CHIP_S_MEM_W3_BUS_START(v)					\
 	    HAE_MEM_REG3_START(((struct cia_config *)(v))->cc_hae_mem)
-#define	CHIP_S_MEM_W3_END(v)						\
-	    (CHIP_S_MEM_W3_START(v) + HAE_MEM_REG3_MASK)
-#define	CHIP_S_MEM_W3_BASE(v)						\
+#define	CHIP_S_MEM_W3_BUS_END(v)					\
+	    (CHIP_S_MEM_W3_BUS_START(v) + HAE_MEM_REG3_MASK)
+#define	CHIP_S_MEM_W3_SYS_START(v)					\
 	    CIA_PCI_SMEM3
-#define	CHIP_S_MEM_W3_MASK(v)						\
-	    HAE_MEM_REG3_MASK
+#define	CHIP_S_MEM_W3_SYS_END(v)					\
+	    (CIA_PCI_SMEM3 + ((HAE_MEM_REG3_MASK + 1) << 5) - 1)
 
 #include "pcs_bus_mem_common.c"
diff --git a/sys/arch/alpha/pci/cia_pci.c b/sys/arch/alpha/pci/cia_pci.c
index ac66d48a0ea..353c5615a21 100644
--- a/sys/arch/alpha/pci/cia_pci.c
+++ b/sys/arch/alpha/pci/cia_pci.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: cia_pci.c,v 1.4 1996/10/30 22:39:56 niklas Exp $	*/
-/*	$NetBSD: cia_pci.c,v 1.5 1996/10/13 03:00:04 christos Exp $	*/
+/*	$OpenBSD: cia_pci.c,v 1.5 1997/01/24 19:57:39 niklas Exp $	*/
+/*	$NetBSD: cia_pci.c,v 1.7 1996/11/23 06:46:50 cgd Exp $	*/
 
 /*
  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
@@ -41,6 +41,9 @@
 #include <alpha/pci/ciareg.h>
 #include <alpha/pci/ciavar.h>
 
+#include <machine/rpb.h>	/* XXX for eb164 CIA firmware workarounds. */
+#include "dec_eb164.h"		/* XXX for eb164 CIA firmware workarounds. */
+
 void		cia_attach_hook __P((struct device *, struct device *,
 		    struct pcibus_attach_args *));
 int		cia_bus_maxdevs __P((void *, int));
@@ -115,6 +118,34 @@ cia_conf_read(cpv, tag, offset)
 	pcireg_t *datap, data;
 	int s, secondary, ba;
 	int32_t old_haxr2;					/* XXX */
+#if NDEC_EB164
+	extern int cputype;					/* XXX */
+#endif
+
+#ifdef DIAGNOSTIC
+	s = 0;					/* XXX gcc -Wuninitialized */
+	old_haxr2 = 0;				/* XXX gcc -Wuninitialized */
+#endif
+
+#if NDEC_EB164
+	/*
+	 * Some (apparently-common) revisions of EB164 firmware do the
+	 * Wrong thing with PCI master aborts, which are caused by
+	 * accesing the configuration space of devices that don't
+	 * exist (for example).
+	 *
+	 * On EB164's we clear the CIA error register's PCI master
+	 * abort bit before touching PCI configuration space and
+	 * check it afterwards.  If it indicates a master abort,
+	 * the device wasn't there so we return 0xffffffff.
+	 */
+	if (cputype == ST_EB164) {
+		/* clear the PCI master abort bit in CIA error register */
+		REGVAL(CIA_CSR_CIA_ERR) = 0x00000080;		/* XXX */
+		alpha_mb();
+		alpha_pal_draina();	
+	}
+#endif
 
 	/* secondary if bus # != 0 */
 	pci_decompose_tag(&ccp->cc_pc, tag, &secondary, 0, 0);
@@ -142,6 +173,17 @@ cia_conf_read(cpv, tag, offset)
 		splx(s);
 	}
 
+#if NDEC_EB164
+	if (cputype == ST_EB164) {
+		alpha_pal_draina();	
+		/* check CIA error register for PCI master abort */
+		if (REGVAL(CIA_CSR_CIA_ERR) & 0x00000080) {	/* XXX */
+			ba = 1;
+			data = 0xffffffff;
+		}
+	}
+#endif
+
 #if 0
 	printf("cia_conf_read: tag 0x%lx, reg 0x%lx -> %x @ %p%s\n", tag, reg,
 	    data, datap, ba ? " (badaddr)" : "");
@@ -162,6 +204,11 @@ cia_conf_write(cpv, tag, offset, data)
 	int s, secondary;
 	int32_t old_haxr2;					/* XXX */
 
+#ifdef DIAGNOSTIC
+	s = 0;					/* XXX gcc -Wuninitialized */
+	old_haxr2 = 0;				/* XXX gcc -Wuninitialized */
+#endif
+
 	/* secondary if bus # != 0 */
 	pci_decompose_tag(&ccp->cc_pc, tag, &secondary, 0, 0);
 	if (secondary) {
diff --git a/sys/arch/alpha/pci/ciareg.h b/sys/arch/alpha/pci/ciareg.h
index aa33bf767ae..442e8008820 100644
--- a/sys/arch/alpha/pci/ciareg.h
+++ b/sys/arch/alpha/pci/ciareg.h
@@ -1,5 +1,5 @@
-/*	$OpenBSD: ciareg.h,v 1.4 1996/10/30 22:39:57 niklas Exp $	*/
-/*	$NetBSD: ciareg.h,v 1.5 1996/07/09 00:54:44 cgd Exp $	*/
+/*	$OpenBSD: ciareg.h,v 1.5 1997/01/24 19:57:40 niklas Exp $	*/
+/*	$NetBSD: ciareg.h,v 1.7 1996/11/23 06:42:55 cgd Exp $	*/
 
 /*
  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
@@ -39,17 +39,17 @@
 /*
  * Base addresses
  */
-#define	CIA_PCI_SMEM1	0x8000000000L
-#define	CIA_PCI_SMEM2	0x8400000000L
-#define	CIA_PCI_SMEM3	0x8500000000L
-#define	CIA_PCI_SIO1	0x8580000000L
-#define	CIA_PCI_SIO2	0x85c0000000L
-#define	CIA_PCI_DENSE	0x8600000000L
-#define	CIA_PCI_CONF	0x8700000000L
-#define	CIA_PCI_IACK	0x8720000000L
-#define	CIA_CSRS	0x8740000000L
-#define	CIA_PCI_MC_CSRS	0x8750000000L
-#define	CIA_PCI_ATRANS	0x8760000000L
+#define	CIA_PCI_SMEM1	0x8000000000UL
+#define	CIA_PCI_SMEM2	0x8400000000UL
+#define	CIA_PCI_SMEM3	0x8500000000UL
+#define	CIA_PCI_SIO1	0x8580000000UL
+#define	CIA_PCI_SIO2	0x85c0000000UL
+#define	CIA_PCI_DENSE	0x8600000000UL
+#define	CIA_PCI_CONF	0x8700000000UL
+#define	CIA_PCI_IACK	0x8720000000UL
+#define	CIA_CSRS	0x8740000000UL
+#define	CIA_PCI_MC_CSRS	0x8750000000UL
+#define	CIA_PCI_ATRANS	0x8760000000UL
 
 /*
  * General CSRs
@@ -57,16 +57,18 @@
 
 #define	CIA_CSR_HAE_MEM	(CIA_CSRS + 0x400)
 
-#define		HAE_MEM_REG1_START(x)	(((u_int32_t)(x) & 0xe0000000) << 0)
-#define		HAE_MEM_REG1_MASK	0x1fffffff
-#define		HAE_MEM_REG2_START(x)	(((u_int32_t)(x) & 0x0000f800) << 16)
-#define		HAE_MEM_REG2_MASK	0x07ffffff
-#define		HAE_MEM_REG3_START(x)	(((u_int32_t)(x) & 0x000000fc) << 16)
-#define		HAE_MEM_REG3_MASK	0x03ffffff
+#define		HAE_MEM_REG1_START(x)	(((u_int32_t)(x) & 0xe0000000UL) << 0)
+#define		HAE_MEM_REG1_MASK	0x1fffffffUL
+#define		HAE_MEM_REG2_START(x)	(((u_int32_t)(x) & 0x0000f800UL) << 16)
+#define		HAE_MEM_REG2_MASK	0x07ffffffUL
+#define		HAE_MEM_REG3_START(x)	(((u_int32_t)(x) & 0x000000fcUL) << 24)
+#define		HAE_MEM_REG3_MASK	0x03ffffffUL
 
 #define	CIA_CSR_HAE_IO	(CIA_CSRS + 0x440)
 
-#define		HAE_IO_REG1_START(x)	0
-#define		HAE_IO_REG1_MASK	0x01ffffff
-#define		HAE_IO_REG2_START(x)	(((u_int32_t)(x) & 0xfe000000) << 0)
-#define		HAE_IO_REG2_MASK	0x01ffffff
+#define		HAE_IO_REG1_START(x)	0UL
+#define		HAE_IO_REG1_MASK	0x01ffffffUL
+#define		HAE_IO_REG2_START(x)	(((u_int32_t)(x) & 0xfe000000UL) << 0)
+#define		HAE_IO_REG2_MASK	0x01ffffffUL
+
+#define	CIA_CSR_CIA_ERR	(CIA_CSRS + 0x8200)
diff --git a/sys/arch/alpha/pci/ciavar.h b/sys/arch/alpha/pci/ciavar.h
index 37ae618659d..0a5aea714a8 100644
--- a/sys/arch/alpha/pci/ciavar.h
+++ b/sys/arch/alpha/pci/ciavar.h
@@ -1,5 +1,5 @@
-/*	$OpenBSD: ciavar.h,v 1.5 1996/12/08 00:20:37 niklas Exp $	*/
-/*	$NetBSD: ciavar.h,v 1.5 1996/10/23 04:12:24 cgd Exp $	*/
+/*	$OpenBSD: ciavar.h,v 1.6 1997/01/24 19:57:40 niklas Exp $	*/
+/*	$NetBSD: ciavar.h,v 1.6 1996/11/25 03:49:11 cgd Exp $	*/
 
 /*
  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
@@ -38,11 +38,16 @@
  * do their dirty work (and more!).
  */
 struct cia_config {
+	int	cc_initted;
+
 	bus_space_tag_t cc_iot, cc_memt;
 	struct alpha_pci_chipset cc_pc;
 
 	u_int32_t cc_hae_mem;
 	u_int32_t cc_hae_io;
+
+	struct extent *cc_io_ex, *cc_d_mem_ex, *cc_s_mem_ex;
+	int	cc_mallocsafe;
 };
 
 struct cia_softc {
@@ -52,8 +57,8 @@ struct cia_softc {
 	/* XXX SGMAP info */
 };
 
-void	cia_init __P((struct cia_config *));
+void	cia_init __P((struct cia_config *, int));
 void	cia_pci_init __P((pci_chipset_tag_t, void *));
 
-bus_space_tag_t	cia_bus_io_init __P((void *iov));
-bus_space_tag_t	cia_bus_mem_init __P((void *memv));
+bus_space_tag_t	cia_bus_io_init __P((void *));
+bus_space_tag_t	cia_bus_mem_init __P((void *));
diff --git a/sys/arch/alpha/pci/lca.c b/sys/arch/alpha/pci/lca.c
index 8ef53fda822..469bbb115e1 100644
--- a/sys/arch/alpha/pci/lca.c
+++ b/sys/arch/alpha/pci/lca.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: lca.c,v 1.6 1996/12/08 00:20:37 niklas Exp $	*/
-/*	$NetBSD: lca.c,v 1.11 1996/10/23 04:12:25 cgd Exp $	*/
+/*	$OpenBSD: lca.c,v 1.7 1997/01/24 19:57:41 niklas Exp $	*/
+/*	$NetBSD: lca.c,v 1.14 1996/12/05 01:39:35 cgd Exp $	*/
 
 /*
  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
@@ -49,7 +49,11 @@
 #include <alpha/pci/pci_axppci_33.h>
 #endif
 
+#ifdef __BROKEN_INDIRECT_CONFIG
 int	lcamatch __P((struct device *, void *, void *));
+#else
+int	lcamatch __P((struct device *, struct cfdata *, void *));
+#endif
 void	lcaattach __P((struct device *, struct device *, void *));
 
 struct cfattach lca_ca = {
@@ -69,7 +73,12 @@ struct lca_config lca_configuration;
 int
 lcamatch(parent, match, aux)
 	struct device *parent;
-	void *match, *aux;
+#ifdef __BROKEN_INDIRECT_CONFIG
+	void *match;
+#else
+	struct cfdata *match;
+#endif
+	void *aux;
 {
 	struct confargs *ca = aux;
 
@@ -87,16 +96,30 @@ lcamatch(parent, match, aux)
  * Set up the chipset's function pointers.
  */
 void
-lca_init(lcp)
+lca_init(lcp, mallocsafe)
 	struct lca_config *lcp;
+	int mallocsafe;
 {
 
 	/*
 	 * Can't set up SGMAP data here; can be called before malloc().
 	 */
 
-	lcp->lc_iot = apecs_lca_bus_io_init(lcp);
-	lcp->lc_memt = apecs_lca_bus_mem_init(lcp);
+	/*
+	 * The LCA HAE register is WRITE-ONLY, so we can't tell where
+	 * the second sparse window is actually mapped.  Therefore,
+	 * we have to guess where it is.  This seems to be the normal
+	 * address.
+	 */
+	lcp->lc_s_mem_w2_masked_base = 0x80000000;
+
+	if (!lcp->lc_initted) {
+		/* don't do these twice since they set up extents */
+		lcp->lc_iot = lca_bus_io_init(lcp);
+		lcp->lc_memt = lca_bus_mem_init(lcp);
+	}
+	lcp->lc_mallocsafe = mallocsafe;
+
 	lca_pci_init(&lcp->lc_pc, lcp);
 
 	/*
@@ -135,6 +158,8 @@ lca_init(lcp)
 		alpha_XXX_dmamap_or = 0x40000000;		/* XXX */
 	}							/* XXX */
 	/* XXX XXX END XXX XXX */
+
+	lcp->lc_initted = 1;
 }
 
 #ifdef notdef
@@ -152,14 +177,14 @@ lca_init_sgmap(lcp)
 
 	/* Set up Translated Base Register 1; translate to sybBus addr 0. */
 	/* check size against APEC XXX JH */
-        REGVAL(LCA_IOC_T_BASE_0) = vtophys(lcp->lc_sgmap) >> 1;
+	REGVAL(LCA_IOC_T_BASE_0) = vtophys(lcp->lc_sgmap) >> 1;
 
-        /* Set up PCI mask register 1; map 8MB space. */
-        REGVAL(LCA_IOC_W_MASK0) = 0x00700000;
+	/* Set up PCI mask register 1; map 8MB space. */
+	REGVAL(LCA_IOC_W_MASK0) = 0x00700000;
 
-        /* Enable window 1; from PCI address 8MB, direct mapped. */
-        REGVAL(LCA_IOC_W_BASE0) = 0x300800000;
-        alpha_mb();
+	/* Enable window 1; from PCI address 8MB, direct mapped. */
+	REGVAL(LCA_IOC_W_BASE0) = 0x300800000;
+	alpha_mb();
 }
 #endif
 
@@ -181,7 +206,7 @@ lcaattach(parent, self, aux)
 	 * (maybe), but doesn't hurt to do twice.
 	 */
 	lcp = sc->sc_lcp = &lca_configuration;
-	lca_init(lcp);
+	lca_init(lcp, 1);
 #ifdef notdef
 	lca_init_sgmap(lcp);
 #endif
@@ -195,6 +220,7 @@ lcaattach(parent, self, aux)
 		pci_axppci_33_pickintr(lcp);
 		break;
 #endif
+
 	default:
 		panic("lcaattach: shouldn't be here, really...");
 	}
@@ -212,7 +238,7 @@ lcaprint(aux, pnp)
 	void *aux;
 	const char *pnp;
 {
-        register struct pcibus_attach_args *pba = aux;
+	register struct pcibus_attach_args *pba = aux;
 
 	/* only PCIs can attach to LCAes; easy. */
 	if (pnp)
diff --git a/sys/arch/alpha/pci/lca_bus_io.c b/sys/arch/alpha/pci/lca_bus_io.c
new file mode 100644
index 00000000000..0ccf7d9953d
--- /dev/null
+++ b/sys/arch/alpha/pci/lca_bus_io.c
@@ -0,0 +1,53 @@
+/*	$NetBSD: lca_bus_io.c,v 1.1 1996/11/25 03:42:14 cgd Exp $	*/
+
+/*
+ * Copyright (c) 1996 Carnegie-Mellon University.
+ * All rights reserved.
+ *
+ * Author: Chris G. Demetriou
+ *
+ * Permission to use, copy, modify and distribute this software and
+ * its documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/malloc.h>
+#include <sys/syslog.h>
+#include <sys/device.h>
+#include <vm/vm.h>
+
+#include <machine/bus.h>
+
+#include <alpha/pci/lcareg.h>
+#include <alpha/pci/lcavar.h>
+
+#define	CHIP		lca
+
+#define	CHIP_EX_MALLOC_SAFE(v)	(((struct lca_config *)(v))->lc_mallocsafe)
+#define	CHIP_IO_EXTENT(v)	(((struct lca_config *)(v))->lc_io_ex)
+
+/* IO region 1 */
+#define	CHIP_IO_W1_BUS_START(v)	0x00000000UL
+#define	CHIP_IO_W1_BUS_END(v)	0x00ffffffUL
+#define	CHIP_IO_W1_SYS_START(v)	LCA_PCI_SIO
+#define	CHIP_IO_W1_SYS_END(v)	(LCA_PCI_SIO + ((0x00ffffffUL + 1) << 5) - 1)
+
+#include "pcs_bus_io_common.c"
diff --git a/sys/arch/alpha/pci/lca_bus_mem.c b/sys/arch/alpha/pci/lca_bus_mem.c
new file mode 100644
index 00000000000..53fd0f689a8
--- /dev/null
+++ b/sys/arch/alpha/pci/lca_bus_mem.c
@@ -0,0 +1,73 @@
+/*	$NetBSD: lca_bus_mem.c,v 1.1 1996/11/25 03:42:15 cgd Exp $	*/
+
+/*
+ * Copyright (c) 1996 Carnegie-Mellon University.
+ * All rights reserved.
+ *
+ * Author: Chris G. Demetriou
+ *
+ * Permission to use, copy, modify and distribute this software and
+ * its documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/malloc.h>
+#include <sys/syslog.h>
+#include <sys/device.h>
+#include <vm/vm.h>
+
+#include <machine/bus.h>
+
+#include <alpha/pci/lcareg.h>
+#include <alpha/pci/lcavar.h>
+
+#define	CHIP	lca
+
+#define	CHIP_EX_MALLOC_SAFE(v)	(((struct lca_config *)(v))->lc_mallocsafe)
+#define	CHIP_D_MEM_EXTENT(v)	(((struct lca_config *)(v))->lc_d_mem_ex)
+#define	CHIP_S_MEM_EXTENT(v)	(((struct lca_config *)(v))->lc_s_mem_ex)
+
+/* Dense region 1 */
+#define	CHIP_D_MEM_W1_BUS_START(v)	0x00000000UL
+#define	CHIP_D_MEM_W1_BUS_END(v)	0xffffffffUL
+#define	CHIP_D_MEM_W1_SYS_START(v)	LCA_PCI_DENSE
+#define	CHIP_D_MEM_W1_SYS_END(v)	(LCA_PCI_DENSE + 0xffffffffUL)
+
+/* Sparse region 1 */
+#define	CHIP_S_MEM_W1_BUS_START(v)	0x00000000UL
+#define	CHIP_S_MEM_W1_BUS_END(v)	0x00ffffffUL
+#define	CHIP_S_MEM_W1_SYS_START(v)	LCA_PCI_SPARSE
+#define	CHIP_S_MEM_W1_SYS_END(v)					\
+    (LCA_PCI_SPARSE + (0x01000000UL << 5) - 1)
+
+/* Sparse region 2 */
+#define CHIP_S_MEM_W2_BUS_START(v)					\
+    ((((struct lca_config *)(v))->lc_s_mem_w2_masked_base) +		\
+      0x01000000UL)
+#define CHIP_S_MEM_W2_BUS_END(v)					\
+    ((((struct lca_config *)(v))->lc_s_mem_w2_masked_base) +		\
+      0x07ffffffUL)
+#define CHIP_S_MEM_W2_SYS_START(v)					\
+    (LCA_PCI_SPARSE + (0x01000000UL << 5))
+#define CHIP_S_MEM_W2_SYS_END(v)					\
+    (LCA_PCI_SPARSE + (0x08000000UL << 5) - 1)
+
+#include "pcs_bus_mem_common.c"
diff --git a/sys/arch/alpha/pci/lca_pci.c b/sys/arch/alpha/pci/lca_pci.c
index 837fbec97be..e166c228a01 100644
--- a/sys/arch/alpha/pci/lca_pci.c
+++ b/sys/arch/alpha/pci/lca_pci.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: lca_pci.c,v 1.4 1996/10/30 22:40:00 niklas Exp $	*/
-/*	$NetBSD: lca_pci.c,v 1.6 1996/10/13 03:00:08 christos Exp $	*/
+/*	$OpenBSD: lca_pci.c,v 1.5 1997/01/24 19:57:44 niklas Exp $	*/
+/*	$NetBSD: lca_pci.c,v 1.7 1996/11/13 21:13:28 cgd Exp $	*/
 
 /*
  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
@@ -118,6 +118,10 @@ lca_conf_read(cpv, tag, offset)
 	pcireg_t *datap, data;
 	int s, secondary, device, ba;
 
+#ifdef DIAGNOSTIC
+	s = 0;					/* XXX gcc -Wuninitialized */
+#endif
+
 	/* secondary if bus # != 0 */
 	pci_decompose_tag(&lcp->lc_pc, tag, &secondary, &device, 0);
 	if (secondary) {
@@ -170,6 +174,10 @@ lca_conf_write(cpv, tag, offset, data)
 	pcireg_t *datap;
 	int s, secondary, device;
 
+#ifdef DIAGNOSTIC
+	s = 0;					/* XXX gcc -Wuninitialized */
+#endif
+
 	/* secondary if bus # != 0 */
 	pci_decompose_tag(&lcp->lc_pc, tag, &secondary, &device, 0);
 	if (secondary) {
diff --git a/sys/arch/alpha/pci/lcareg.h b/sys/arch/alpha/pci/lcareg.h
index d9e9bffd448..d8fc88d3f46 100644
--- a/sys/arch/alpha/pci/lcareg.h
+++ b/sys/arch/alpha/pci/lcareg.h
@@ -1,5 +1,5 @@
-/*	$OpenBSD: lcareg.h,v 1.4 1996/10/30 22:40:00 niklas Exp $	*/
-/*	$NetBSD: lcareg.h,v 1.3 1996/07/09 00:54:51 cgd Exp $	*/
+/*	$OpenBSD: lcareg.h,v 1.5 1997/01/24 19:57:45 niklas Exp $	*/
+/*	$NetBSD: lcareg.h,v 1.4 1996/11/23 06:41:00 cgd Exp $	*/
 
 /*
  * Copyright (c) 1995 Carnegie-Mellon University.
@@ -33,6 +33,7 @@
  */
 
 #define REGVAL(r)	(*(int32_t *)ALPHA_PHYS_TO_K0SEG(r))
+#define REGVAL64(r)	(*(int64_t *)ALPHA_PHYS_TO_K0SEG(r))
 
 /*
  * Base addresses
@@ -43,7 +44,9 @@
 #define LCA_PCI_SPARSE	0x200000000L		/* PCI Sparse Space */
 #define LCA_PCI_DENSE	0x300000000L		/* PCI Dense Space */
 
-#define LCA_IOC_HAE	LCA_IOC_BASE		/* Host Address Extension */
+#define LCA_IOC_HAE	LCA_IOC_BASE		/* Host Address Ext. (64) */
+#define	IOC_HAE_ADDREXT	0x00000000f8000000UL
+#define	IOC_HAE_RSVSD	0xffffffff07ffffffUL
 
 #define LCA_IOC_CONF	(LCA_IOC_BASE + 0x020)	/* Configuration Cycle Type */
 #define LCA_IOC_STAT0	(LCA_IOC_BASE + 0x040)	/* Status 0 */
diff --git a/sys/arch/alpha/pci/lcavar.h b/sys/arch/alpha/pci/lcavar.h
index d09596a0d5d..597e783eb34 100644
--- a/sys/arch/alpha/pci/lcavar.h
+++ b/sys/arch/alpha/pci/lcavar.h
@@ -1,5 +1,5 @@
-/*	$OpenBSD: lcavar.h,v 1.5 1996/12/08 00:20:38 niklas Exp $	*/
-/*	$NetBSD: lcavar.h,v 1.4 1996/10/23 04:12:26 cgd Exp $	*/
+/*	$OpenBSD: lcavar.h,v 1.6 1997/01/24 19:57:46 niklas Exp $	*/
+/*	$NetBSD: lcavar.h,v 1.5 1996/11/25 03:49:38 cgd Exp $	*/
 
 /*
  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
@@ -38,8 +38,15 @@
  * do their dirty work (and more!).
  */
 struct lca_config {
+	int	lc_initted;
+
 	bus_space_tag_t lc_iot, lc_memt;
 	struct alpha_pci_chipset lc_pc;
+
+	bus_addr_t lc_s_mem_w2_masked_base;
+
+	struct extent *lc_io_ex, *lc_d_mem_ex, *lc_s_mem_ex;
+	int	lc_mallocsafe;
 };
 
 struct lca_softc {
@@ -48,8 +55,8 @@ struct lca_softc {
 	struct	lca_config *sc_lcp;
 };
 
-void	lca_init __P((struct lca_config *));
+void	lca_init __P((struct lca_config *, int));
 void	lca_pci_init __P((pci_chipset_tag_t, void *));
 
-bus_space_tag_t apecs_lca_bus_io_init __P((void *));
-bus_space_tag_t apecs_lca_bus_mem_init __P((void *));
+bus_space_tag_t lca_bus_io_init __P((void *));
+bus_space_tag_t lca_bus_mem_init __P((void *));
diff --git a/sys/arch/alpha/pci/pci_2100_a50.c b/sys/arch/alpha/pci/pci_2100_a50.c
index e4be2215526..0deeac43f6a 100644
--- a/sys/arch/alpha/pci/pci_2100_a50.c
+++ b/sys/arch/alpha/pci/pci_2100_a50.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: pci_2100_a50.c,v 1.9 1996/12/08 00:20:39 niklas Exp $	*/
-/*	$NetBSD: pci_2100_a50.c,v 1.11 1996/10/23 04:12:26 cgd Exp $	*/
+/*	$OpenBSD: pci_2100_a50.c,v 1.10 1997/01/24 19:57:47 niklas Exp $	*/
+/*	$NetBSD: pci_2100_a50.c,v 1.12 1996/11/13 21:13:29 cgd Exp $	*/
 
 /*
  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
@@ -109,7 +109,8 @@ dec_2100_a50_intr_map(acv, bustag, buspin, line, ihp)
                 return 1;
         }
         if (buspin > 4) {
-                printf("pci_map_int: bad interrupt pin %d\n", buspin);
+                printf("dec_2100_a50_intr_map: bad interrupt pin %d\n",
+		    buspin);
                 return 1;
         }
 
@@ -133,6 +134,11 @@ dec_2100_a50_intr_map(acv, bustag, buspin, line, ihp)
 		case PCI_INTERRUPT_PIN_C:
 			pirq = 1;
 			break;
+#ifdef DIAGNOSTIC
+		default:			/* XXX gcc -Wuninitialized */
+			panic("dec_2100_a50_intr_map bogus PCI pin %d\n",
+			    buspin);
+#endif
 		};
 		break;
 
@@ -148,6 +154,11 @@ dec_2100_a50_intr_map(acv, bustag, buspin, line, ihp)
 		case PCI_INTERRUPT_PIN_C:
 			pirq = 2;
 			break;
+#ifdef DIAGNOSTIC
+		default:			/* XXX gcc -Wuninitialized */
+			panic("dec_2100_a50_intr_map bogus PCI pin %d\n",
+			    buspin);
+#endif
 		};
 		break;
 
@@ -163,8 +174,18 @@ dec_2100_a50_intr_map(acv, bustag, buspin, line, ihp)
 		case PCI_INTERRUPT_PIN_C:
 			pirq = 0;
 			break;
+#ifdef DIAGNOSTIC
+		default:			/* XXX gcc -Wuninitialized */
+			panic("dec_2100_a50_intr_map bogus PCI pin %d\n",
+			    buspin);
+#endif
 		};
 		break;
+
+	default:
+                printf("dec_2100_a50_intr_map: weird device number %d\n",
+		    device);
+                return 1;
 	}
 
 	pirqreg = pci_conf_read(pc, pci_make_tag(pc, 0, APECS_SIO_DEVICE, 0),
diff --git a/sys/arch/alpha/pci/pci_axppci_33.c b/sys/arch/alpha/pci/pci_axppci_33.c
index 27bd21b0d8a..07bb01096db 100644
--- a/sys/arch/alpha/pci/pci_axppci_33.c
+++ b/sys/arch/alpha/pci/pci_axppci_33.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: pci_axppci_33.c,v 1.8 1996/12/08 00:20:40 niklas Exp $	*/
-/*	$NetBSD: pci_axppci_33.c,v 1.9 1996/10/23 04:12:27 cgd Exp $	*/
+/*	$OpenBSD: pci_axppci_33.c,v 1.9 1997/01/24 19:57:48 niklas Exp $	*/
+/*	$NetBSD: pci_axppci_33.c,v 1.10 1996/11/13 21:13:29 cgd Exp $	*/
 
 /*
  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
@@ -133,6 +133,11 @@ dec_axppci_33_intr_map(lcv, bustag, buspin, line, ihp)
 		case PCI_INTERRUPT_PIN_C:
 			pirq = 1;
 			break;
+#ifdef DIAGNOSTIC
+		default:			/* XXX gcc -Wuninitialized */
+			panic("dec_axppci_33_intr_map bogus PCI pin %d\n",
+			    buspin);
+#endif
 		};
 		break;
 
@@ -148,6 +153,11 @@ dec_axppci_33_intr_map(lcv, bustag, buspin, line, ihp)
 		case PCI_INTERRUPT_PIN_C:
 			pirq = 2;
 			break;
+#ifdef DIAGNOSTIC
+		default:			/* XXX gcc -Wuninitialized */
+			panic("dec_axppci_33_intr_map bogus PCI pin %d\n",
+			    buspin);
+#endif
 		};
 		break;
 
@@ -163,12 +173,18 @@ dec_axppci_33_intr_map(lcv, bustag, buspin, line, ihp)
 		case PCI_INTERRUPT_PIN_C:
 			pirq = 0;
 			break;
+#ifdef DIAGNOSTIC
+		default:			/* XXX gcc -Wuninitialized */
+			panic("dec_axppci_33_intr_map bogus PCI pin %d\n",
+			    buspin);
+#endif
 		};
 		break;
+
 	default:
-		printf("dec_axppci_33_pci_map_int: unknown device %d\n",
-			device);
-		panic("dec_axppci_33_pci_map_int: bad device number");
+                printf("dec_axppci_33_intr_map: weird device number %d\n",
+		    device);
+                return 1;
 	}
 
 	pirqreg = pci_conf_read(pc, pci_make_tag(pc, 0, LCA_SIO_DEVICE, 0),
diff --git a/sys/arch/alpha/pci/pci_eb164.c b/sys/arch/alpha/pci/pci_eb164.c
new file mode 100644
index 00000000000..90c9e6c2661
--- /dev/null
+++ b/sys/arch/alpha/pci/pci_eb164.c
@@ -0,0 +1,317 @@
+/*	$OpenBSD: pci_eb164.c,v 1.1 1997/01/24 19:57:48 niklas Exp $	*/
+/*	$NetBSD: pci_eb164.c,v 1.4 1996/11/25 03:47:05 cgd Exp $	*/
+
+/*
+ * Copyright (c) 1995, 1996 Carnegie-Mellon University.
+ * All rights reserved.
+ *
+ * Author: Chris G. Demetriou
+ * 
+ * Permission to use, copy, modify and distribute this software and
+ * its documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ * 
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ * 
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+
+#include <sys/types.h>
+#include <sys/param.h>
+#include <sys/time.h>
+#include <sys/systm.h>
+#include <sys/errno.h>
+#include <sys/malloc.h>
+#include <sys/device.h>
+#include <sys/syslog.h>
+
+#include <vm/vm.h>
+
+#include <machine/autoconf.h>
+
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcivar.h>
+
+#include <alpha/pci/ciareg.h>
+#include <alpha/pci/ciavar.h>
+
+#include <alpha/pci/pci_eb164.h>
+
+#ifndef EVCNT_COUNTERS
+#include <machine/intrcnt.h>
+#endif
+
+#include "sio.h"
+#if NSIO
+#include <alpha/pci/siovar.h>
+#endif
+
+int	dec_eb164_intr_map __P((void *, pcitag_t, int, int,
+	    pci_intr_handle_t *));
+const char *dec_eb164_intr_string __P((void *, pci_intr_handle_t));
+void	*dec_eb164_intr_establish __P((void *, pci_intr_handle_t,
+	    int, int (*)(void *), void *, char *));
+void	dec_eb164_intr_disestablish __P((void *, void *));
+
+#define	EB164_SIO_IRQ	4  
+#define	EB164_MAX_IRQ	24
+#define	PCI_STRAY_MAX	5
+
+struct alpha_shared_intr *eb164_pci_intr;
+#ifdef EVCNT_COUNTERS
+struct evcnt eb164_intr_evcnt;
+#endif
+
+bus_space_tag_t eb164_intrgate_iot;
+bus_space_handle_t eb164_intrgate_ioh;
+
+void	eb164_iointr __P((void *framep, unsigned long vec));
+extern void	eb164_intr_enable __P((int irq));	/* pci_eb164_intr.S */
+extern void	eb164_intr_disable __P((int irq));	/* pci_eb164_intr.S */
+
+void
+pci_eb164_pickintr(ccp)
+	struct cia_config *ccp;
+{
+	bus_space_tag_t iot = ccp->cc_iot;
+	pci_chipset_tag_t pc = &ccp->cc_pc;
+	int i;
+
+        pc->pc_intr_v = ccp;
+        pc->pc_intr_map = dec_eb164_intr_map;
+        pc->pc_intr_string = dec_eb164_intr_string;
+        pc->pc_intr_establish = dec_eb164_intr_establish;
+        pc->pc_intr_disestablish = dec_eb164_intr_disestablish;
+
+	eb164_intrgate_iot = iot;
+	if (bus_space_map(eb164_intrgate_iot, 0x804, 3, 0,
+	    &eb164_intrgate_ioh) != 0)
+		panic("pci_eb164_pickintr: couldn't map interrupt PLD");
+	for (i = 0; i < EB164_MAX_IRQ; i++)
+		eb164_intr_disable(i);	
+
+	eb164_pci_intr = alpha_shared_intr_alloc(EB164_MAX_IRQ);
+	for (i = 0; i < EB164_MAX_IRQ; i++)
+		alpha_shared_intr_set_maxstrays(eb164_pci_intr, i,
+			PCI_STRAY_MAX);
+
+#if NSIO
+	sio_intr_setup(iot);
+	eb164_intr_enable(EB164_SIO_IRQ);
+#endif
+
+	set_iointr(eb164_iointr);
+}
+
+int     
+dec_eb164_intr_map(ccv, bustag, buspin, line, ihp)
+        void *ccv;
+        pcitag_t bustag; 
+        int buspin, line;
+        pci_intr_handle_t *ihp;
+{
+	struct cia_config *ccp = ccv;
+	pci_chipset_tag_t pc = &ccp->cc_pc;
+	int device;
+	int eb164_irq, pinbase, pinoff;
+
+        if (buspin == 0) {
+                /* No IRQ used. */
+                return 1;
+        }
+        if (buspin > 4) {
+                printf("pci_map_int: bad interrupt pin %d\n", buspin);
+                return 1;
+        }
+
+	pci_decompose_tag(pc, bustag, NULL, &device, NULL);
+	switch (device) {
+#if 0	/* THIS CODE SHOULD NEVER BE CALLED FOR THE SIO */
+	case 8: 					/* SIO */
+		eb164_irq = 4;
+		break;
+#endif
+
+	case 11:
+		eb164_irq = 5;				/* IDE */
+		break;
+
+	case 5:
+	case 6:
+	case 7:
+	case 9:
+		switch (buspin) {
+		case 1:
+			pinbase = 0;
+			break;
+		case 2:
+		case 3:
+		case 4:
+			pinbase = (buspin * 4) - 1;
+			break;
+#ifdef DIAGNOSTIC
+		default:
+			panic("dec_eb164_intr_map: slot buspin switch");
+#endif
+		};
+		switch (device) {
+		case 5:
+			pinoff = 2;
+			break;
+
+		case 6:
+		case 7:
+		case 9:
+			pinoff = device - 6;
+			break;
+#ifdef DIAGNOSTIC
+		default:
+			panic("dec_eb164_intr_map: slot device switch");
+#endif
+		}
+		eb164_irq = pinoff + pinbase;
+		break;
+	default:
+		panic("pci_eb164_map_int: invalid device number %d\n",
+		    device);
+	}
+
+	if (eb164_irq > EB164_MAX_IRQ)
+		panic("pci_eb164_map_int: eb164_irq too large (%d)\n",
+		    eb164_irq);
+
+	*ihp = eb164_irq;
+	return (0);
+}
+
+const char *
+dec_eb164_intr_string(ccv, ih)
+	void *ccv;
+	pci_intr_handle_t ih;
+{
+#if 0
+	struct cia_config *ccp = ccv;
+#endif
+        static char irqstr[15];          /* 11 + 2 + NULL + sanity */
+
+        if (ih > EB164_MAX_IRQ)
+                panic("dec_eb164_intr_string: bogus eb164 IRQ 0x%x\n", ih);
+        sprintf(irqstr, "eb164 irq %d", ih);
+        return (irqstr);
+}
+
+void *
+dec_eb164_intr_establish(ccv, ih, level, func, arg, name)
+        void *ccv, *arg;
+        pci_intr_handle_t ih;
+        int level;
+        int (*func) __P((void *));
+	char *name;
+{
+	void *cookie;
+
+	if (ih > EB164_MAX_IRQ)
+		panic("dec_eb164_intr_establish: bogus eb164 IRQ 0x%x\n", ih);
+
+	cookie = alpha_shared_intr_establish(eb164_pci_intr, ih, IST_LEVEL,
+	    level, func, arg, name);
+
+	if (cookie != NULL && alpha_shared_intr_isactive(eb164_pci_intr, ih))
+		eb164_intr_enable(ih);
+	return (cookie);
+}
+
+void
+dec_eb164_intr_disestablish(ccv, cookie)
+        void *ccv, *cookie;
+{
+#if 0
+	struct cia_config *ccp = ccv;
+#endif
+
+	panic("dec_eb164_intr_disestablish not implemented"); /* XXX */
+}
+
+void
+eb164_iointr(framep, vec)
+	void *framep;
+	unsigned long vec;
+{
+	int irq; 
+
+	if (vec >= 0x900) {
+		if (vec >= 0x900 + (EB164_MAX_IRQ << 4))
+			panic("eb164_iointr: vec 0x%x out of range\n", vec);
+		irq = (vec - 0x900) >> 4;
+
+#ifdef EVCNT_COUNTERS
+		eb164_intr_evcnt.ev_count++;
+#else
+		if (EB164_MAX_IRQ != INTRCNT_EB164_IRQ_LEN)
+			panic("eb164 interrupt counter sizes inconsistent");
+		intrcnt[INTRCNT_EB164_IRQ + irq]++;
+#endif
+
+		if (!alpha_shared_intr_dispatch(eb164_pci_intr, irq)) {
+			alpha_shared_intr_stray(eb164_pci_intr, irq,
+			    "eb164 irq");
+			if (eb164_pci_intr[irq].intr_nstrays ==
+			    eb164_pci_intr[irq].intr_maxstrays)
+				eb164_intr_disable(irq);
+		}
+		return;
+	}
+#if NSIO
+	if (vec >= 0x800) {
+		sio_iointr(framep, vec);
+		return;
+	}
+#endif
+	panic("eb164_iointr: weird vec 0x%x\n", vec);
+}
+
+#if 0		/* THIS DOES NOT WORK!  see pci_eb164_intr.S. */
+u_int8_t eb164_intr_mask[3] = { 0xff, 0xff, 0xff };
+
+void
+eb164_intr_enable(irq)
+	int irq;
+{
+	int byte = (irq / 8), bit = (irq % 8);
+
+#if 1
+	printf("eb164_intr_enable: enabling %d (%d:%d)\n", irq, byte, bit);
+#endif
+	eb164_intr_mask[byte] &= ~(1 << bit);
+
+	bus_space_write_1(eb164_intrgate_iot, eb164_intrgate_ioh, byte,
+	    eb164_intr_mask[byte]);
+}
+
+void
+eb164_intr_disable(irq)
+	int irq;
+{
+	int byte = (irq / 8), bit = (irq % 8);
+
+#if 1
+	printf("eb164_intr_disable: disabling %d (%d:%d)\n", irq, byte, bit);
+#endif
+	eb164_intr_mask[byte] |= (1 << bit);
+
+	bus_space_write_1(eb164_intrgate_iot, eb164_intrgate_ioh, byte,
+	    eb164_intr_mask[byte]);
+}
+#endif
diff --git a/sys/arch/alpha/pci/pci_eb164.h b/sys/arch/alpha/pci/pci_eb164.h
new file mode 100644
index 00000000000..dd1700753e7
--- /dev/null
+++ b/sys/arch/alpha/pci/pci_eb164.h
@@ -0,0 +1,34 @@
+/*	$NetBSD: pci_eb164.h,v 1.1 1996/11/11 21:08:13 cgd Exp $	*/
+
+/*
+ * Copyright (c) 1995, 1996 Carnegie-Mellon University.
+ * All rights reserved.
+ *
+ * Author: Chris G. Demetriou
+ *
+ * Permission to use, copy, modify and distribute this software and
+ * its documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+
+void	pci_eb164_pickintr __P((struct cia_config *));
+
+#ifdef EVCNT_COUNTERS
+extern struct evcnt eb164_intr_evcnt;
+#endif
diff --git a/sys/arch/alpha/pci/pci_eb164_intr.s b/sys/arch/alpha/pci/pci_eb164_intr.s
new file mode 100644
index 00000000000..83fa4979b79
--- /dev/null
+++ b/sys/arch/alpha/pci/pci_eb164_intr.s
@@ -0,0 +1,62 @@
+/*	$NetBSD: pci_eb164_intr.s,v 1.1 1996/11/25 03:47:07 cgd Exp $	*/
+
+/*
+ * Copyright (c) 1996 Carnegie-Mellon University.
+ * All rights reserved.
+ *
+ * Author: Chris G. Demetriou
+ * 
+ * Permission to use, copy, modify and distribute this software and
+ * its documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ * 
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ * 
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+
+/*
+ * The description of how to enable and disable interrupts in the
+ * AlphaPC 164 motherboard technical reference manual is incorrect,
+ * at least for the OSF/1 PALcode.
+ *
+ * These functions were written by disassembling a Digital UNIX kernel's
+ * eb164_intrdsabl and eb164_intrenabl functions (because they had
+ * interesting names), and then playing with them to see how to call
+ * them correctly.
+ *
+ * It looks like the right thing to do is to call them with the interrupt
+ * request that you want to enable or disable (presumably in the range
+ * 0 -> 23, since there are 3 8-bit interrupt-enable bits in the
+ * interrupt mask PLD).
+ */
+
+#include <machine/asm.h>
+
+	.text
+LEAF(eb164_intr_enable,1)
+	mov	a0, a1
+	ldiq	a0, 0x34
+	call_pal PAL_cserve
+	RET
+	END(eb164_intr_enable)
+
+	.text
+LEAF(eb164_intr_disable,1)
+	mov	a0, a1
+	ldiq	a0, 0x35
+	call_pal PAL_cserve
+	RET
+	END(eb164_intr_enable)
diff --git a/sys/arch/alpha/pci/pci_kn20aa.c b/sys/arch/alpha/pci/pci_kn20aa.c
index ab9683c31fa..1f46fb45ca4 100644
--- a/sys/arch/alpha/pci/pci_kn20aa.c
+++ b/sys/arch/alpha/pci/pci_kn20aa.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: pci_kn20aa.c,v 1.8 1996/12/08 00:20:41 niklas Exp $	*/
-/*	$NetBSD: pci_kn20aa.c,v 1.19 1996/10/23 04:12:28 cgd Exp $	*/
+/*	$OpenBSD: pci_kn20aa.c,v 1.9 1997/01/24 19:57:51 niklas Exp $	*/
+/*	$NetBSD: pci_kn20aa.c,v 1.21 1996/11/17 02:05:27 cgd Exp $	*/
 
 /*
  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
@@ -69,27 +69,14 @@ void	dec_kn20aa_intr_disestablish __P((void *, void *));
 #define	KN20AA_MAX_IRQ	32
 #define	PCI_STRAY_MAX	5
 
-struct kn20aa_intrhand {
-	TAILQ_ENTRY(kn20aa_intrhand) ih_q;
-        int     (*ih_fun) __P((void *));
-        void    *ih_arg;
-        u_long  ih_count;
-        int     ih_level;
-};
-TAILQ_HEAD(kn20aa_intrchain, kn20aa_intrhand);
-
-struct kn20aa_intrchain kn20aa_pci_intrs[KN20AA_MAX_IRQ];
-int	kn20aa_pci_strayintrcnt[KN20AA_MAX_IRQ];
+struct alpha_shared_intr *kn20aa_pci_intr;
 #ifdef EVCNT_COUNTERS
 struct evcnt kn20aa_intr_evcnt;
 #endif
 
-void	kn20aa_pci_strayintr __P((int irq));
 void	kn20aa_iointr __P((void *framep, unsigned long vec));
 void	kn20aa_enable_intr __P((int irq));
 void	kn20aa_disable_intr __P((int irq));
-struct kn20aa_intrhand *kn20aa_attach_intr __P((struct kn20aa_intrchain *,
-			    int, int (*) (void *), void *));
 
 void
 pci_kn20aa_pickintr(ccp)
@@ -99,27 +86,23 @@ pci_kn20aa_pickintr(ccp)
 	bus_space_tag_t iot = ccp->cc_iot;
 	pci_chipset_tag_t pc = &ccp->cc_pc;
 
-	for (i = 0; i < KN20AA_MAX_IRQ; i++)
-		TAILQ_INIT(&kn20aa_pci_intrs[i]);
-
         pc->pc_intr_v = ccp;
         pc->pc_intr_map = dec_kn20aa_intr_map;
         pc->pc_intr_string = dec_kn20aa_intr_string;
         pc->pc_intr_establish = dec_kn20aa_intr_establish;
         pc->pc_intr_disestablish = dec_kn20aa_intr_disestablish;
 
+	kn20aa_pci_intr = alpha_shared_intr_alloc(KN20AA_MAX_IRQ);
+	for (i = 0; i < KN20AA_MAX_IRQ; i++)
+		alpha_shared_intr_set_maxstrays(kn20aa_pci_intr, i,
+		    PCI_STRAY_MAX);
+
 #if NSIO
 	sio_intr_setup(iot);
+	kn20aa_enable_intr(KN20AA_PCEB_IRQ);
 #endif
 
 	set_iointr(kn20aa_iointr);
-
-#if NSIO
-	kn20aa_enable_intr(KN20AA_PCEB_IRQ);
-#if 0 /* XXX init PCEB interrupt handler? */
-	kn20aa_attach_intr(&kn20aa_pci_intrs[KN20AA_PCEB_IRQ], ???, ???, ???);
-#endif
-#endif
 }
 
 int     
@@ -174,14 +157,9 @@ dec_kn20aa_intr_map(ccv, bustag, buspin, line, ihp)
 		break;
 
 	default:
-#ifdef KN20AA_BOGUS_IRQ_FROB
-		*ihp = 0xdeadbeef;
-		printf("\n\n BOGUS INTERRUPT MAPPING: dev %d, pin %d\n",
-		    device, buspin);
-		return (0);
-#endif
-		panic("pci_kn20aa_map_int: invalid device number %d\n",
+                printf("dec_kn20aa_intr_map: weird device number %d\n",
 		    device);
+                return 1;
 	}
 
 	kn20aa_irq += buspin - 1;
@@ -200,17 +178,10 @@ dec_kn20aa_intr_string(ccv, ih)
 {
         static char irqstr[15];          /* 11 + 2 + NULL + sanity */
 
-#ifdef KN20AA_BOGUS_IRQ_FROB
-	if (ih == 0xdeadbeef) {
-		sprintf(irqstr, "BOGUS");
-		return (irqstr);
-	}
-#endif
         if (ih > KN20AA_MAX_IRQ)
-                panic("dec_kn20aa_a50_intr_string: bogus kn20aa IRQ 0x%x\n",
-		    ih);
+		panic("dec_kn20aa_intr_string: bogus kn20aa IRQ 0x%x\n", ih);
 
-        sprintf(irqstr, "kn20aa irq %d", ih);
+        sprintf(irqstr, "kn20aa irq %ld", ih);
         return (irqstr);
 }
 
@@ -224,28 +195,16 @@ dec_kn20aa_intr_establish(ccv, ih, level, func, arg, name)
 {           
 	void *cookie;
 
-#ifdef KN20AA_BOGUS_IRQ_FROB
-	if (ih == 0xdeadbeef) {
-		int i;
-		char chars[10];
-
-		printf("dec_kn20aa_intr_establish: BOGUS IRQ\n");
-		do {
-			printf("IRQ to enable? ");
-			getstr(chars, 10);
-			i = atoi(chars);
-		} while (i < 0 || i > 32);
-		printf("ENABLING IRQ %d\n", i);
-		kn20aa_enable_intr(i);
-		return ((void *)0xbabefacedeadbeef);
-	}
-#endif
         if (ih > KN20AA_MAX_IRQ)
                 panic("dec_kn20aa_intr_establish: bogus kn20aa IRQ 0x%x\n",
 		    ih);
 
-	cookie = kn20aa_attach_intr(&kn20aa_pci_intrs[ih], level, func, arg);
-	kn20aa_enable_intr(ih);
+	cookie = alpha_shared_intr_establish(kn20aa_pci_intr, ih, IST_LEVEL,
+	    level, func, arg, name);
+
+	if (cookie != NULL &&
+	    alpha_shared_intr_isactive(kn20aa_pci_intr, ih))
+		kn20aa_enable_intr(ih);
 	return (cookie);
 }
 
@@ -256,30 +215,12 @@ dec_kn20aa_intr_disestablish(ccv, cookie)
 	panic("dec_kn20aa_intr_disestablish not implemented"); /* XXX */
 }
 
-/*
- * caught a stray interrupt; notify if not too many seen already.
- */
-void
-kn20aa_pci_strayintr(irq)
-	int irq;
-{
-
-	kn20aa_pci_strayintrcnt[irq]++;
-	if (kn20aa_pci_strayintrcnt[irq] == PCI_STRAY_MAX)
-		kn20aa_disable_intr(irq);
-
-	log(LOG_ERR, "stray kn20aa irq %d\n", irq);
-	if (kn20aa_pci_strayintrcnt[irq] == PCI_STRAY_MAX)
-		log(LOG_ERR, "disabling interrupts on kn20aa irq %d\n", irq);
-}
-
 void
 kn20aa_iointr(framep, vec)
 	void *framep;
 	unsigned long vec;
 {
-	struct kn20aa_intrhand *ih;
-	int irq, handled;
+	int irq;
 
 	if (vec >= 0x900) {
 		if (vec >= 0x900 + (KN20AA_MAX_IRQ << 4))
@@ -294,25 +235,21 @@ kn20aa_iointr(framep, vec)
 		intrcnt[INTRCNT_KN20AA_IRQ + irq]++;
 #endif
 
-		for (ih = kn20aa_pci_intrs[irq].tqh_first, handled = 0;
-		    ih != NULL; ih = ih->ih_q.tqe_next) {
-			int rv;
-
-			rv = (*ih->ih_fun)(ih->ih_arg);
-
-			ih->ih_count++;
-			handled = handled || (rv != 0);
+		if (!alpha_shared_intr_dispatch(kn20aa_pci_intr, irq)) {
+			alpha_shared_intr_stray(kn20aa_pci_intr, irq,
+			    "kn20aa irq");
+			if (kn20aa_pci_intr[irq].intr_nstrays ==
+			    kn20aa_pci_intr[irq].intr_maxstrays)
+				kn20aa_disable_intr(irq);
 		}
-		if (!handled)
-			kn20aa_pci_strayintr(irq);
 		return;
 	}
-	if (vec >= 0x800) {
 #if NSIO
+	if (vec >= 0x800) {
 		sio_iointr(framep, vec);
-#endif
 		return;
 	} 
+#endif
 	panic("kn20aa_iointr: weird vec 0x%x\n", vec);
 }
 
@@ -341,24 +278,3 @@ kn20aa_disable_intr(irq)
 	REGVAL(0x8780000000L + 0x40L) &= ~(1 << irq);	/* XXX */
 	alpha_mb();
 }
-
-struct kn20aa_intrhand *
-kn20aa_attach_intr(chain, level, func, arg)
-	struct kn20aa_intrchain *chain;
-	int level;
-	int (*func) __P((void *));
-	void *arg;
-{
-	struct kn20aa_intrhand *nintrhand;
-
-	nintrhand = (struct kn20aa_intrhand *)
-	    malloc(sizeof *nintrhand, M_DEVBUF, M_WAITOK);
-
-        nintrhand->ih_fun = func;
-        nintrhand->ih_arg = arg;
-        nintrhand->ih_count = 0;
-        nintrhand->ih_level = level;
-	TAILQ_INSERT_TAIL(chain, nintrhand, ih_q);
-	
-	return (nintrhand);
-}
diff --git a/sys/arch/alpha/pci/pci_machdep.c b/sys/arch/alpha/pci/pci_machdep.c
index 128fcc2676e..f24271a68c3 100644
--- a/sys/arch/alpha/pci/pci_machdep.c
+++ b/sys/arch/alpha/pci/pci_machdep.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: pci_machdep.c,v 1.6 1996/12/08 00:20:42 niklas Exp $	*/
-/*	$NetBSD: pci_machdep.c,v 1.6 1996/10/23 04:12:29 cgd Exp $	*/
+/*	$OpenBSD: pci_machdep.c,v 1.7 1997/01/24 19:57:52 niklas Exp $	*/
+/*	$NetBSD: pci_machdep.c,v 1.7 1996/11/19 04:57:32 cgd Exp $	*/
 
 /*
  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
@@ -45,9 +45,9 @@
 #include <dev/pci/pcivar.h>
 #include <dev/pci/pcidevs.h>
 
-#include "pcivga.h"
-#if NPCIVGA
-#include <alpha/pci/pcivgavar.h>
+#include "vga_pci.h"
+#if NVGA_PCI
+#include <alpha/pci/vga_pcivar.h>
 #endif
 
 #include "tga.h"
@@ -77,11 +77,11 @@ pci_display_console(iot, memt, pc, bus, device, function)
 	match = 0;
 	fn = NULL;
 
-#if NPCIVGA
-	nmatch = DEVICE_IS_PCIVGA(class, id);
+#if NVGA_PCI
+	nmatch = DEVICE_IS_VGA_PCI(class, id);
 	if (nmatch > match) {
 		match = nmatch;
-		fn = pcivga_console;
+		fn = vga_pci_console;
 	}
 #endif
 #if NTGA
diff --git a/sys/arch/alpha/pci/pci_machdep.h b/sys/arch/alpha/pci/pci_machdep.h
index d706b1c2e92..2fbd929e9d7 100644
--- a/sys/arch/alpha/pci/pci_machdep.h
+++ b/sys/arch/alpha/pci/pci_machdep.h
@@ -1,5 +1,5 @@
-/*	$OpenBSD: pci_machdep.h,v 1.6 1996/12/08 00:20:43 niklas Exp $	*/
-/*	$NetBSD: pci_machdep.h,v 1.4 1996/04/12 06:08:52 cgd Exp $	*/
+/*	$OpenBSD: pci_machdep.h,v 1.7 1997/01/24 19:57:53 niklas Exp $	*/
+/*	$NetBSD: pci_machdep.h,v 1.6 1996/11/19 04:49:21 cgd Exp $	*/
 
 /*
  * Copyright (c) 1996 Carnegie-Mellon University.
@@ -87,6 +87,13 @@ struct alpha_pci_chipset {
 #define	pci_intr_disestablish(c, iv)					\
     (*(c)->pc_intr_disestablish)((c)->pc_intr_v, (iv))
 
+/*
+ * alpha-specific PCI functions.
+ * NOT TO BE USED DIRECTLY BY MACHINE INDEPENDENT CODE.
+ */
+void	pci_display_console __P((bus_space_tag_t, bus_space_tag_t,
+	    pci_chipset_tag_t, int, int, int));
+
 #ifdef _KERNEL
 void pci_display_console
     __P((bus_space_tag_t, bus_space_tag_t, pci_chipset_tag_t, int, int, int));
diff --git a/sys/arch/alpha/pci/pcivgavar.h b/sys/arch/alpha/pci/pcivgavar.h
index 4783a47cc14..b909a0ab412 100644
--- a/sys/arch/alpha/pci/pcivgavar.h
+++ b/sys/arch/alpha/pci/pcivgavar.h
@@ -1,62 +1 @@
-/*	$OpenBSD: pcivgavar.h,v 1.6 1996/12/08 00:20:44 niklas Exp $	*/
-/*	$NetBSD: pcivgavar.h,v 1.6 1996/10/23 04:12:30 cgd Exp $	*/
-
-/*
- * Copyright (c) 1995, 1996 Carnegie-Mellon University.
- * All rights reserved.
- *
- * Author: Chris G. Demetriou
- * 
- * Permission to use, copy, modify and distribute this software and
- * its documentation is hereby granted, provided that both the copyright
- * notice and this permission notice appear in all copies of the
- * software, derivative works or modified versions, and any portions
- * thereof, and that both notices appear in supporting documentation.
- * 
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
- * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
- * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- * 
- * Carnegie Mellon requests users of this software to return to
- *
- *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
- *  School of Computer Science
- *  Carnegie Mellon University
- *  Pittsburgh PA 15213-3890
- *
- * any improvements or extensions that they make and grant Carnegie the
- * rights to redistribute these changes.
- */
-
-struct pcivga_devconfig {
-	bus_space_tag_t	dc_iot;
-	bus_space_tag_t	dc_memt;
-	pci_chipset_tag_t dc_pc;
-
-	pcitag_t	dc_pcitag;	/* PCI tag */
-
-	bus_space_handle_t dc_ioh, dc_memh;
-
-	int		dc_ncol, dc_nrow; /* screen width & height */
-	int		dc_ccol, dc_crow; /* current cursor position */
-
-	char		dc_so;		/* in standout mode? */
-	char		dc_at;		/* normal attributes */
-	char		dc_so_at;	/* standout attributes */
-};
-	
-struct pcivga_softc {
-	struct	device sc_dev;
-
-	struct	pcivga_devconfig *sc_dc; /* device configuration */
-	void	*sc_intr;		/* interrupt handler info */
-};
-
-#define	DEVICE_IS_PCIVGA(class, id)					\
-	    (((PCI_CLASS(class) == PCI_CLASS_DISPLAY &&			\
-	      PCI_SUBCLASS(class) == PCI_SUBCLASS_DISPLAY_VGA) ||	\
-	     (PCI_CLASS(class) == PCI_CLASS_PREHISTORIC &&		\
-	      PCI_SUBCLASS(class) == PCI_SUBCLASS_PREHISTORIC_VGA)) ? 1 : 0)
-
-void    pcivga_console __P((bus_space_tag_t, bus_space_tag_t,
-	    pci_chipset_tag_t, int, int, int));
+/*	$OpenBSD: pcivgavar.h,v 1.7 1997/01/24 19:57:54 niklas Exp $	*/
diff --git a/sys/arch/alpha/pci/pcs_bus_io_common.c b/sys/arch/alpha/pci/pcs_bus_io_common.c
index bec40a2f12e..89cc1418cd1 100644
--- a/sys/arch/alpha/pci/pcs_bus_io_common.c
+++ b/sys/arch/alpha/pci/pcs_bus_io_common.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: pcs_bus_io_common.c,v 1.4 1996/12/08 00:20:45 niklas Exp $	*/
-/*	$NetBSD: pcs_bus_io_common.c,v 1.9 1996/10/23 04:12:31 cgd Exp $	*/
+/*	$OpenBSD: pcs_bus_io_common.c,v 1.5 1997/01/24 19:57:55 niklas Exp $	*/
+/*	$NetBSD: pcs_bus_io_common.c,v 1.14 1996/12/02 22:19:35 cgd Exp $	*/
 
 /*
  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
@@ -37,6 +37,8 @@
  *	CHIP_IO_BASE	Sparse I/O space base to use.
  */
 
+#include <sys/extent.h>
+
 #define	__C(A,B)	__CONCAT(A,B)
 #define	__S(S)		__STRING(S)
 
@@ -55,14 +57,18 @@ int		__C(CHIP,_io_alloc) __P((void *, bus_addr_t, bus_addr_t,
 void		__C(CHIP,_io_free) __P((void *, bus_space_handle_t,
 		    bus_size_t));
 
+/* barrier */
+inline void	__C(CHIP,_io_barrier) __P((void *, bus_space_handle_t,
+		    bus_size_t, bus_size_t, int));
+
 /* read (single) */
-u_int8_t	__C(CHIP,_io_read_1) __P((void *, bus_space_handle_t,
+inline u_int8_t	__C(CHIP,_io_read_1) __P((void *, bus_space_handle_t,
 		    bus_size_t));
-u_int16_t	__C(CHIP,_io_read_2) __P((void *, bus_space_handle_t,
+inline u_int16_t __C(CHIP,_io_read_2) __P((void *, bus_space_handle_t,
 		    bus_size_t));
-u_int32_t	__C(CHIP,_io_read_4) __P((void *, bus_space_handle_t,
+inline u_int32_t __C(CHIP,_io_read_4) __P((void *, bus_space_handle_t,
 		    bus_size_t));
-u_int64_t	__C(CHIP,_io_read_8) __P((void *, bus_space_handle_t,
+inline u_int64_t __C(CHIP,_io_read_8) __P((void *, bus_space_handle_t,
 		    bus_size_t));
 
 /* read multiple */
@@ -86,13 +92,13 @@ void		__C(CHIP,_io_read_region_8) __P((void *, bus_space_handle_t,
 		    bus_size_t, u_int64_t *, bus_size_t));
 
 /* write (single) */
-void		__C(CHIP,_io_write_1) __P((void *, bus_space_handle_t,
+inline void	__C(CHIP,_io_write_1) __P((void *, bus_space_handle_t,
 		    bus_size_t, u_int8_t));
-void		__C(CHIP,_io_write_2) __P((void *, bus_space_handle_t,
+inline void	__C(CHIP,_io_write_2) __P((void *, bus_space_handle_t,
 		    bus_size_t, u_int16_t));
-void		__C(CHIP,_io_write_4) __P((void *, bus_space_handle_t,
+inline void	__C(CHIP,_io_write_4) __P((void *, bus_space_handle_t,
 		    bus_size_t, u_int32_t));
-void		__C(CHIP,_io_write_8) __P((void *, bus_space_handle_t,
+inline void	__C(CHIP,_io_write_8) __P((void *, bus_space_handle_t,
 		    bus_size_t, u_int64_t));
 
 /* write multiple */
@@ -115,9 +121,38 @@ void		__C(CHIP,_io_write_region_4) __P((void *, bus_space_handle_t,
 void		__C(CHIP,_io_write_region_8) __P((void *, bus_space_handle_t,
 		    bus_size_t, const u_int64_t *, bus_size_t));
 
-/* barrier */
-void		__C(CHIP,_io_barrier) __P((void *, bus_space_handle_t,
-		    bus_size_t, bus_size_t, int));
+/* set multiple */
+void		__C(CHIP,_io_set_multi_1) __P((void *, bus_space_handle_t,
+		    bus_size_t, u_int8_t, bus_size_t));
+void		__C(CHIP,_io_set_multi_2) __P((void *, bus_space_handle_t,
+		    bus_size_t, u_int16_t, bus_size_t));
+void		__C(CHIP,_io_set_multi_4) __P((void *, bus_space_handle_t,
+		    bus_size_t, u_int32_t, bus_size_t));
+void		__C(CHIP,_io_set_multi_8) __P((void *, bus_space_handle_t,
+		    bus_size_t, u_int64_t, bus_size_t));
+
+/* set region */
+void		__C(CHIP,_io_set_region_1) __P((void *, bus_space_handle_t,
+		    bus_size_t, u_int8_t, bus_size_t));
+void		__C(CHIP,_io_set_region_2) __P((void *, bus_space_handle_t,
+		    bus_size_t, u_int16_t, bus_size_t));
+void		__C(CHIP,_io_set_region_4) __P((void *, bus_space_handle_t,
+		    bus_size_t, u_int32_t, bus_size_t));
+void		__C(CHIP,_io_set_region_8) __P((void *, bus_space_handle_t,
+		    bus_size_t, u_int64_t, bus_size_t));
+
+/* copy */
+void		__C(CHIP,_io_copy_1) __P((void *, bus_space_handle_t,
+		    bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t));
+void		__C(CHIP,_io_copy_2) __P((void *, bus_space_handle_t,
+		    bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t));
+void		__C(CHIP,_io_copy_4) __P((void *, bus_space_handle_t,
+		    bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t));
+void		__C(CHIP,_io_copy_8) __P((void *, bus_space_handle_t,
+		    bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t));
+
+static long
+    __C(CHIP,_io_ex_storage)[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)];
 
 static struct alpha_bus_space __C(CHIP,_io_space) = {
 	/* cookie */
@@ -131,6 +166,9 @@ static struct alpha_bus_space __C(CHIP,_io_space) = {
 	/* allocation/deallocation */
 	__C(CHIP,_io_alloc),
 	__C(CHIP,_io_free),
+
+	/* barrier */
+	__C(CHIP,_io_barrier),
 	
 	/* read (single) */
 	__C(CHIP,_io_read_1),
@@ -138,7 +176,7 @@ static struct alpha_bus_space __C(CHIP,_io_space) = {
 	__C(CHIP,_io_read_4),
 	__C(CHIP,_io_read_8),
 	
-	/* read multi */
+	/* read multiple */
 	__C(CHIP,_io_read_multi_1),
 	__C(CHIP,_io_read_multi_2),
 	__C(CHIP,_io_read_multi_4),
@@ -156,7 +194,7 @@ static struct alpha_bus_space __C(CHIP,_io_space) = {
 	__C(CHIP,_io_write_4),
 	__C(CHIP,_io_write_8),
 	
-	/* write multi */
+	/* write multiple */
 	__C(CHIP,_io_write_multi_1),
 	__C(CHIP,_io_write_multi_2),
 	__C(CHIP,_io_write_multi_4),
@@ -168,27 +206,63 @@ static struct alpha_bus_space __C(CHIP,_io_space) = {
 	__C(CHIP,_io_write_region_4),
 	__C(CHIP,_io_write_region_8),
 
-	/* set multi */
-	/* XXX IMPLEMENT */
-
+	/* set multiple */
+	__C(CHIP,_io_set_multi_1),
+	__C(CHIP,_io_set_multi_2),
+	__C(CHIP,_io_set_multi_4),
+	__C(CHIP,_io_set_multi_8),
+	
 	/* set region */
-	/* XXX IMPLEMENT */
+	__C(CHIP,_io_set_region_1),
+	__C(CHIP,_io_set_region_2),
+	__C(CHIP,_io_set_region_4),
+	__C(CHIP,_io_set_region_8),
 
 	/* copy */
-	/* XXX IMPLEMENT */
-
-	/* barrier */
-	__C(CHIP,_io_barrier),
+	__C(CHIP,_io_copy_1),
+	__C(CHIP,_io_copy_2),
+	__C(CHIP,_io_copy_4),
+	__C(CHIP,_io_copy_8),
 };
 
 bus_space_tag_t
-__C(CHIP,_bus_io_init)(iov)
-	void *iov;
+__C(CHIP,_bus_io_init)(v)
+	void *v;
 {
-        bus_space_tag_t h = &__C(CHIP,_io_space);;
+        bus_space_tag_t t = &__C(CHIP,_io_space);
+	struct extent *ex;
+
+	t->abs_cookie = v;
+
+	/* XXX WE WANT EXTENT_NOCOALESCE, BUT WE CAN'T USE IT. XXX */
+	ex = extent_create(__S(__C(CHIP,_bus_io)), 0x0UL, 0xffffffffUL,
+	    M_DEVBUF, (caddr_t)__C(CHIP,_io_ex_storage),
+	    sizeof(__C(CHIP,_io_ex_storage)), EX_NOWAIT);
+	extent_alloc_region(ex, 0, 0xffffffffUL, EX_NOWAIT);
+
+#ifdef CHIP_IO_W1_BUS_START
+#ifdef EXTENT_DEBUG
+	printf("io: freeing from 0x%lx to 0x%lx\n", CHIP_IO_W1_BUS_START(v),
+	    CHIP_IO_W1_BUS_END(v));
+#endif
+	extent_free(ex, CHIP_IO_W1_BUS_START(v),
+	    CHIP_IO_W1_BUS_END(v) - CHIP_IO_W1_BUS_START(v) + 1, EX_NOWAIT);
+#endif
+#ifdef CHIP_IO_W2_BUS_START
+#ifdef EXTENT_DEBUG
+	printf("io: freeing from 0x%lx to 0x%lx\n", CHIP_IO_W2_BUS_START(v),
+	    CHIP_IO_W2_BUS_END(v));
+#endif
+	extent_free(ex, CHIP_IO_W2_BUS_START(v),
+	    CHIP_IO_W2_BUS_END(v) - CHIP_IO_W2_BUS_START(v) + 1, EX_NOWAIT);
+#endif
 
-	h->abs_cookie = iov;
-	return (h);
+#ifdef EXTENT_DEBUG
+	extent_print(ex);
+#endif
+	CHIP_IO_EXTENT(v) = ex;
+
+	return (t);
 }
 
 int
@@ -199,38 +273,51 @@ __C(CHIP,_io_map)(v, ioaddr, iosize, cacheable, iohp)
 	int cacheable;
 	bus_space_handle_t *iohp;
 {
+	int error;
 
-#ifdef CHIP_IO_W1_START
-	if (ioaddr >= CHIP_IO_W1_START(v) &&
-	    ioaddr <= CHIP_IO_W1_END(v)) {
-		*iohp = (ALPHA_PHYS_TO_K0SEG(CHIP_IO_W1_BASE(v)) >> 5) +
-		    (ioaddr & CHIP_IO_W1_MASK(v));
+#ifdef EXTENT_DEBUG
+	printf("io: allocating 0x%lx to 0x%lx\n", ioaddr, ioaddr + iosize - 1);
+#endif
+        error = extent_alloc_region(CHIP_IO_EXTENT(v), ioaddr, iosize,
+            EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0));
+	if (error) {
+#ifdef EXTENT_DEBUG
+		printf("io: allocation failed (%d)\n", error);
+		extent_print(CHIP_IO_EXTENT(v));
+#endif
+		return (error);
+	}
+
+#ifdef CHIP_IO_W1_BUS_START
+	if (ioaddr >= CHIP_IO_W1_BUS_START(v) &&
+	    ioaddr <= CHIP_IO_W1_BUS_END(v)) {
+		*iohp = (ALPHA_PHYS_TO_K0SEG(CHIP_IO_W1_SYS_START(v)) >> 5) +
+		    (ioaddr - CHIP_IO_W1_BUS_START(v));
 	} else
 #endif
-#ifdef CHIP_IO_W2_START
-	if (ioaddr >= CHIP_IO_W2_START(v) &&
-	    ioaddr <= CHIP_IO_W2_END(v)) {
-		*iohp = (ALPHA_PHYS_TO_K0SEG(CHIP_IO_W2_BASE(v)) >> 5) +
-		    (ioaddr & CHIP_IO_W2_MASK(v));
+#ifdef CHIP_IO_W2_BUS_START
+	if (ioaddr >= CHIP_IO_W2_BUS_START(v) &&
+	    ioaddr <= CHIP_IO_W2_BUS_END(v)) {
+		*iohp = (ALPHA_PHYS_TO_K0SEG(CHIP_IO_W2_SYS_START(v)) >> 5) +
+		    (ioaddr - CHIP_IO_W2_BUS_START(v));
 	} else
 #endif
 	{
 		printf("\n");
-#ifdef CHIP_IO_W1_START
+#ifdef CHIP_IO_W1_BUS_START
 		printf("%s: window[1]=0x%lx-0x%lx\n",
-		    __S(__C(CHIP,_io_map)), CHIP_IO_W1_START(v),
-		    CHIP_IO_W1_END(v)-1);
+		    __S(__C(CHIP,_io_map)), CHIP_IO_W1_BUS_START(v),
+		    CHIP_IO_W1_BUS_END(v));
 #endif
-#ifdef CHIP_IO_W2_START
+#ifdef CHIP_IO_W2_BUS_START
 		printf("%s: window[2]=0x%lx-0x%lx\n",
-		    __S(__C(CHIP,_io_map)), CHIP_IO_W2_START(v),
-		    CHIP_IO_W2_END(v)-1);
+		    __S(__C(CHIP,_io_map)), CHIP_IO_W2_BUS_START(v),
+		    CHIP_IO_W2_BUS_END(v));
 #endif
-		panic("%s: don't know how to map %lx non-cacheable",
+		panic("%s: don't know how to map %lx",
 		    __S(__C(CHIP,_io_map)), ioaddr);
 	}
 
-	/* XXX XXX XXX XXX XXX XXX */
 	return (0);
 }
 
@@ -240,9 +327,58 @@ __C(CHIP,_io_unmap)(v, ioh, iosize)
 	bus_space_handle_t ioh;
 	bus_size_t iosize;
 {
+	bus_addr_t ioaddr;
+	int error;
 
-	/* XXX nothing to do. */
-	/* XXX XXX XXX XXX XXX XXX */
+#ifdef EXTENT_DEBUG
+	printf("io: freeing handle 0x%lx for 0x%lx\n", ioh, iosize);
+#endif
+
+	ioh = ALPHA_K0SEG_TO_PHYS(ioh << 5) >> 5;
+
+#ifdef CHIP_IO_W1_BUS_START
+	if ((ioh << 5) >= CHIP_IO_W1_SYS_START(v) &&
+	    (ioh << 5) <= CHIP_IO_W1_SYS_END(v)) {
+		ioaddr = CHIP_IO_W1_BUS_START(v) +
+		    (ioh - (CHIP_IO_W1_SYS_START(v) >> 5));
+	} else
+#endif
+#ifdef CHIP_IO_W2_BUS_START
+	if ((ioh << 5) >= CHIP_IO_W2_SYS_START(v) &&
+	    (ioh << 5) <= CHIP_IO_W2_SYS_END(v)) {
+		ioaddr = CHIP_IO_W2_BUS_START(v) +
+		    (ioh - (CHIP_IO_W2_SYS_START(v) >> 5));
+	} else
+#endif
+	{
+		printf("\n");
+#ifdef CHIP_IO_W1_BUS_START
+		printf("%s: sys window[1]=0x%lx-0x%lx\n",
+		    __S(__C(CHIP,_io_map)), CHIP_IO_W1_SYS_START(v),
+		    CHIP_IO_W1_SYS_END(v));
+#endif
+#ifdef CHIP_IO_W2_BUS_START
+		printf("%s: sys window[2]=0x%lx-0x%lx\n",
+		    __S(__C(CHIP,_io_map)), CHIP_IO_W2_SYS_START(v),
+		    CHIP_IO_W2_SYS_END(v));
+#endif
+		panic("%s: don't know how to unmap %lx",
+		    __S(__C(CHIP,_io_unmap)), (ioh << 5));
+	}
+
+#ifdef EXTENT_DEBUG
+	printf("io: freeing 0x%lx to 0x%lx\n", ioaddr, ioaddr + iosize - 1);
+#endif
+        error = extent_free(CHIP_IO_EXTENT(v), ioaddr, iosize,
+            EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0));
+	if (error) {
+		printf("%s: WARNING: could not unmap 0x%lx-0x%lx (error %d)\n",
+		   __S(__C(CHIP,_io_unmap)), ioaddr, ioaddr + iosize - 1,
+		   error);
+#ifdef EXTENT_DEBUG
+		extent_print(CHIP_IO_EXTENT(v));
+#endif
+	}	
 }
 
 int
@@ -281,7 +417,21 @@ __C(CHIP,_io_free)(v, bsh, size)
 	panic("%s not implemented", __S(__C(CHIP,_io_free)));
 }
 
-u_int8_t
+inline void
+__C(CHIP,_io_barrier)(v, h, o, l, f)
+	void *v;
+	bus_space_handle_t h;
+	bus_size_t o, l;
+	int f;
+{
+
+	if ((f & BUS_BARRIER_READ) != 0)
+		alpha_mb();
+	else if ((f & BUS_BARRIER_WRITE) != 0)
+		alpha_wmb();
+}
+
+inline u_int8_t
 __C(CHIP,_io_read_1)(v, ioh, off)
 	void *v;
 	bus_space_handle_t ioh;
@@ -303,7 +453,7 @@ __C(CHIP,_io_read_1)(v, ioh, off)
 	return rval;
 }
 
-u_int16_t
+inline u_int16_t
 __C(CHIP,_io_read_2)(v, ioh, off)
 	void *v;
 	bus_space_handle_t ioh;
@@ -325,7 +475,7 @@ __C(CHIP,_io_read_2)(v, ioh, off)
 	return rval;
 }
 
-u_int32_t
+inline u_int32_t
 __C(CHIP,_io_read_4)(v, ioh, off)
 	void *v;
 	bus_space_handle_t ioh;
@@ -351,7 +501,7 @@ __C(CHIP,_io_read_4)(v, ioh, off)
 	return rval;
 }
 
-u_int64_t
+inline u_int64_t
 __C(CHIP,_io_read_8)(v, ioh, off)
 	void *v;
 	bus_space_handle_t ioh;
@@ -401,7 +551,7 @@ CHIP_io_read_region_N(2,u_int16_t)
 CHIP_io_read_region_N(4,u_int32_t)
 CHIP_io_read_region_N(8,u_int64_t)
 
-void
+inline void
 __C(CHIP,_io_write_1)(v, ioh, off, val)
 	void *v;
 	bus_space_handle_t ioh;
@@ -420,7 +570,7 @@ __C(CHIP,_io_write_1)(v, ioh, off, val)
         alpha_mb();
 }
 
-void
+inline void
 __C(CHIP,_io_write_2)(v, ioh, off, val)
 	void *v;
 	bus_space_handle_t ioh;
@@ -439,7 +589,7 @@ __C(CHIP,_io_write_2)(v, ioh, off, val)
         alpha_mb();
 }
 
-void
+inline void
 __C(CHIP,_io_write_4)(v, ioh, off, val)
 	void *v;
 	bus_space_handle_t ioh;
@@ -458,7 +608,7 @@ __C(CHIP,_io_write_4)(v, ioh, off, val)
         alpha_mb();
 }
 
-void
+inline void
 __C(CHIP,_io_write_8)(v, ioh, off, val)
 	void *v;
 	bus_space_handle_t ioh;
@@ -510,16 +660,59 @@ CHIP_io_write_region_N(2,u_int16_t)
 CHIP_io_write_region_N(4,u_int32_t)
 CHIP_io_write_region_N(8,u_int64_t)
 
-void
-__C(CHIP,_io_barrier)(v, h, o, l, f)
-	void *v;
-	bus_space_handle_t h;
-	bus_size_t o, l;
-	int f;
-{
+#define CHIP_io_set_multi_N(BYTES,TYPE)					\
+void									\
+__C(__C(CHIP,_io_set_multi_),BYTES)(v, h, o, val, c)			\
+	void *v;							\
+	bus_space_handle_t h;						\
+	bus_size_t o, c;						\
+	TYPE val;							\
+{									\
+									\
+	while (c-- > 0) {						\
+		__C(__C(CHIP,_io_write_),BYTES)(v, h, o, val);		\
+		__C(CHIP,_io_barrier)(v, h, o, sizeof val,		\
+		    BUS_BARRIER_WRITE);					\
+	}								\
+}
+CHIP_io_set_multi_N(1,u_int8_t)
+CHIP_io_set_multi_N(2,u_int16_t)
+CHIP_io_set_multi_N(4,u_int32_t)
+CHIP_io_set_multi_N(8,u_int64_t)
 
-	if ((f & BUS_BARRIER_READ) != 0)
-		alpha_mb();
-	else if ((f & BUS_BARRIER_WRITE) != 0)
-		alpha_wmb();
+#define CHIP_io_set_region_N(BYTES,TYPE)				\
+void									\
+__C(__C(CHIP,_io_set_region_),BYTES)(v, h, o, val, c)			\
+	void *v;							\
+	bus_space_handle_t h;						\
+	bus_size_t o, c;						\
+	TYPE val;							\
+{									\
+									\
+	while (c-- > 0) {						\
+		__C(__C(CHIP,_io_write_),BYTES)(v, h, o, val);		\
+		o += sizeof val;					\
+	}								\
+}
+CHIP_io_set_region_N(1,u_int8_t)
+CHIP_io_set_region_N(2,u_int16_t)
+CHIP_io_set_region_N(4,u_int32_t)
+CHIP_io_set_region_N(8,u_int64_t)
+
+#define	CHIP_io_copy_N(BYTES)						\
+void									\
+__C(__C(CHIP,_io_copy_),BYTES)(v, h1, o1, h2, o2, c)			\
+	void *v;							\
+	bus_space_handle_t h1, h2;					\
+	bus_size_t o1, o2, c;						\
+{									\
+	bus_size_t i, o;						\
+									\
+	for (i = 0, o = 0; i < c; i++, o += BYTES)			\
+		__C(__C(CHIP,_io_write_),BYTES)(v, h2, o2 + o,		\
+		    __C(__C(CHIP,_io_read_),BYTES)(v, h1, o1 + o));	\
 }
+CHIP_io_copy_N(1)
+CHIP_io_copy_N(2)
+CHIP_io_copy_N(4)
+CHIP_io_copy_N(8)
diff --git a/sys/arch/alpha/pci/pcs_bus_mem_common.c b/sys/arch/alpha/pci/pcs_bus_mem_common.c
index fa7e953e80c..44d0c90cf2f 100644
--- a/sys/arch/alpha/pci/pcs_bus_mem_common.c
+++ b/sys/arch/alpha/pci/pcs_bus_mem_common.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: pcs_bus_mem_common.c,v 1.4 1996/12/08 00:20:46 niklas Exp $	*/
-/*	$NetBSD: pcs_bus_mem_common.c,v 1.10 1996/10/23 04:12:32 cgd Exp $	*/
+/*	$OpenBSD: pcs_bus_mem_common.c,v 1.5 1997/01/24 19:57:56 niklas Exp $	*/
+/*	$NetBSD: pcs_bus_mem_common.c,v 1.15 1996/12/02 22:19:36 cgd Exp $	*/
 
 /*
  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
@@ -38,6 +38,8 @@
  *	CHIP_S_MEM_BASE	Sparse Mem space base to use.
  */
 
+#include <sys/extent.h>
+
 #define	__C(A,B)	__CONCAT(A,B)
 #define	__S(S)		__STRING(S)
 
@@ -56,14 +58,18 @@ int		__C(CHIP,_mem_alloc) __P((void *, bus_addr_t, bus_addr_t,
 void		__C(CHIP,_mem_free) __P((void *, bus_space_handle_t,
 		    bus_size_t));
 
+/* barrier */
+inline void	__C(CHIP,_mem_barrier) __P((void *, bus_space_handle_t,
+		    bus_size_t, bus_size_t, int));
+
 /* read (single) */
-u_int8_t	__C(CHIP,_mem_read_1) __P((void *, bus_space_handle_t,
+inline u_int8_t	__C(CHIP,_mem_read_1) __P((void *, bus_space_handle_t,
 		    bus_size_t));
-u_int16_t	__C(CHIP,_mem_read_2) __P((void *, bus_space_handle_t,
+inline u_int16_t __C(CHIP,_mem_read_2) __P((void *, bus_space_handle_t,
 		    bus_size_t));
-u_int32_t	__C(CHIP,_mem_read_4) __P((void *, bus_space_handle_t,
+inline u_int32_t __C(CHIP,_mem_read_4) __P((void *, bus_space_handle_t,
 		    bus_size_t));
-u_int64_t	__C(CHIP,_mem_read_8) __P((void *, bus_space_handle_t,
+inline u_int64_t __C(CHIP,_mem_read_8) __P((void *, bus_space_handle_t,
 		    bus_size_t));
 
 /* read multiple */
@@ -87,13 +93,13 @@ void		__C(CHIP,_mem_read_region_8) __P((void *, bus_space_handle_t,
 		    bus_size_t, u_int64_t *, bus_size_t));
 
 /* write (single) */
-void		__C(CHIP,_mem_write_1) __P((void *, bus_space_handle_t,
+inline void	__C(CHIP,_mem_write_1) __P((void *, bus_space_handle_t,
 		    bus_size_t, u_int8_t));
-void		__C(CHIP,_mem_write_2) __P((void *, bus_space_handle_t,
+inline void	__C(CHIP,_mem_write_2) __P((void *, bus_space_handle_t,
 		    bus_size_t, u_int16_t));
-void		__C(CHIP,_mem_write_4) __P((void *, bus_space_handle_t,
+inline void	__C(CHIP,_mem_write_4) __P((void *, bus_space_handle_t,
 		    bus_size_t, u_int32_t));
-void		__C(CHIP,_mem_write_8) __P((void *, bus_space_handle_t,
+inline void	__C(CHIP,_mem_write_8) __P((void *, bus_space_handle_t,
 		    bus_size_t, u_int64_t));
 
 /* write multiple */
@@ -116,9 +122,40 @@ void		__C(CHIP,_mem_write_region_4) __P((void *, bus_space_handle_t,
 void		__C(CHIP,_mem_write_region_8) __P((void *, bus_space_handle_t,
 		    bus_size_t, const u_int64_t *, bus_size_t));
 
-/* barrier */
-void		__C(CHIP,_mem_barrier) __P((void *, bus_space_handle_t,
-		    bus_size_t, bus_size_t, int));
+/* set multiple */
+void		__C(CHIP,_mem_set_multi_1) __P((void *, bus_space_handle_t,
+		    bus_size_t, u_int8_t, bus_size_t));
+void		__C(CHIP,_mem_set_multi_2) __P((void *, bus_space_handle_t,
+		    bus_size_t, u_int16_t, bus_size_t));
+void		__C(CHIP,_mem_set_multi_4) __P((void *, bus_space_handle_t,
+		    bus_size_t, u_int32_t, bus_size_t));
+void		__C(CHIP,_mem_set_multi_8) __P((void *, bus_space_handle_t,
+		    bus_size_t, u_int64_t, bus_size_t));
+
+/* set region */
+void		__C(CHIP,_mem_set_region_1) __P((void *, bus_space_handle_t,
+		    bus_size_t, u_int8_t, bus_size_t));
+void		__C(CHIP,_mem_set_region_2) __P((void *, bus_space_handle_t,
+		    bus_size_t, u_int16_t, bus_size_t));
+void		__C(CHIP,_mem_set_region_4) __P((void *, bus_space_handle_t,
+		    bus_size_t, u_int32_t, bus_size_t));
+void		__C(CHIP,_mem_set_region_8) __P((void *, bus_space_handle_t,
+		    bus_size_t, u_int64_t, bus_size_t));
+
+/* copy */
+void		__C(CHIP,_mem_copy_1) __P((void *, bus_space_handle_t,
+		    bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t));
+void		__C(CHIP,_mem_copy_2) __P((void *, bus_space_handle_t,
+		    bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t));
+void		__C(CHIP,_mem_copy_4) __P((void *, bus_space_handle_t,
+		    bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t));
+void		__C(CHIP,_mem_copy_8) __P((void *, bus_space_handle_t,
+		    bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t));
+
+static long
+    __C(CHIP,_dmem_ex_storage)[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)];
+static long
+    __C(CHIP,_smem_ex_storage)[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)];
 
 static struct alpha_bus_space __C(CHIP,_mem_space) = {
 	/* cookie */
@@ -132,6 +169,9 @@ static struct alpha_bus_space __C(CHIP,_mem_space) = {
 	/* allocation/deallocation */
 	__C(CHIP,_mem_alloc),
 	__C(CHIP,_mem_free),
+
+	/* barrier */
+	__C(CHIP,_mem_barrier),
 	
 	/* read (single) */
 	__C(CHIP,_mem_read_1),
@@ -139,7 +179,7 @@ static struct alpha_bus_space __C(CHIP,_mem_space) = {
 	__C(CHIP,_mem_read_4),
 	__C(CHIP,_mem_read_8),
 	
-	/* read multi */
+	/* read multiple */
 	__C(CHIP,_mem_read_multi_1),
 	__C(CHIP,_mem_read_multi_2),
 	__C(CHIP,_mem_read_multi_4),
@@ -157,7 +197,7 @@ static struct alpha_bus_space __C(CHIP,_mem_space) = {
 	__C(CHIP,_mem_write_4),
 	__C(CHIP,_mem_write_8),
 	
-	/* write multi */
+	/* write multiple */
 	__C(CHIP,_mem_write_multi_1),
 	__C(CHIP,_mem_write_multi_2),
 	__C(CHIP,_mem_write_multi_4),
@@ -169,27 +209,231 @@ static struct alpha_bus_space __C(CHIP,_mem_space) = {
 	__C(CHIP,_mem_write_region_4),
 	__C(CHIP,_mem_write_region_8),
 
-	/* set multi */
-	/* XXX IMPLEMENT */
-
+	/* set multiple */
+	__C(CHIP,_mem_set_multi_1),
+	__C(CHIP,_mem_set_multi_2),
+	__C(CHIP,_mem_set_multi_4),
+	__C(CHIP,_mem_set_multi_8),
+	
 	/* set region */
-	/* XXX IMPLEMENT */
+	__C(CHIP,_mem_set_region_1),
+	__C(CHIP,_mem_set_region_2),
+	__C(CHIP,_mem_set_region_4),
+	__C(CHIP,_mem_set_region_8),
 
 	/* copy */
-	/* XXX IMPLEMENT */
-
-	/* barrier */
-	__C(CHIP,_mem_barrier),
+	__C(CHIP,_mem_copy_1),
+	__C(CHIP,_mem_copy_2),
+	__C(CHIP,_mem_copy_4),
+	__C(CHIP,_mem_copy_8),
 };
 
 bus_space_tag_t
-__C(CHIP,_bus_mem_init)(iov)
-	void *iov;
+__C(CHIP,_bus_mem_init)(v)
+	void *v;
 {
-        bus_space_tag_t h = &__C(CHIP,_mem_space);;
+        bus_space_tag_t t = &__C(CHIP,_mem_space);
+	struct extent *dex, *sex;
+
+	t->abs_cookie = v;
+
+	/* XXX WE WANT EXTENT_NOCOALESCE, BUT WE CAN'T USE IT. XXX */
+	dex = extent_create(__S(__C(CHIP,_bus_dmem)), 0x0UL,
+	    0xffffffffffffffffUL, M_DEVBUF,
+	    (caddr_t)__C(CHIP,_dmem_ex_storage),
+	    sizeof(__C(CHIP,_dmem_ex_storage)), EX_NOWAIT);
+	extent_alloc_region(dex, 0, 0xffffffffffffffffUL, EX_NOWAIT);
+
+#ifdef CHIP_D_MEM_W1_BUS_START
+#ifdef EXTENT_DEBUG
+	printf("dmem: freeing from 0x%lx to 0x%lx\n",
+	    CHIP_D_MEM_W1_BUS_START(v), CHIP_D_MEM_W1_BUS_END(v));
+#endif
+	extent_free(dex, CHIP_D_MEM_W1_BUS_START(v),
+	    CHIP_D_MEM_W1_BUS_END(v) - CHIP_D_MEM_W1_BUS_START(v) + 1,
+	    EX_NOWAIT);
+#endif
+
+#ifdef EXTENT_DEBUG
+        extent_print(dex);
+#endif
+        CHIP_D_MEM_EXTENT(v) = dex;
+
+	/* XXX WE WANT EXTENT_NOCOALESCE, BUT WE CAN'T USE IT. XXX */
+	sex = extent_create(__S(__C(CHIP,_bus_smem)), 0x0UL,
+	    0xffffffffffffffffUL, M_DEVBUF,
+	    (caddr_t)__C(CHIP,_smem_ex_storage),
+	    sizeof(__C(CHIP,_smem_ex_storage)), EX_NOWAIT);
+	extent_alloc_region(sex, 0, 0xffffffffffffffffUL, EX_NOWAIT);
+
+#ifdef CHIP_S_MEM_W1_BUS_START
+#ifdef EXTENT_DEBUG
+	printf("smem: freeing from 0x%lx to 0x%lx\n",
+	    CHIP_S_MEM_W1_BUS_START(v), CHIP_S_MEM_W1_BUS_END(v));
+#endif
+	extent_free(sex, CHIP_S_MEM_W1_BUS_START(v),
+	    CHIP_S_MEM_W1_BUS_END(v) - CHIP_S_MEM_W1_BUS_START(v) + 1,
+	    EX_NOWAIT);
+#endif
+#ifdef CHIP_S_MEM_W2_BUS_START
+	if (CHIP_S_MEM_W2_BUS_START(v) != CHIP_S_MEM_W1_BUS_START(v)) {
+#ifdef EXTENT_DEBUG
+		printf("smem: freeing from 0x%lx to 0x%lx\n",
+		    CHIP_S_MEM_W2_BUS_START(v), CHIP_S_MEM_W2_BUS_END(v));
+#endif
+		extent_free(sex, CHIP_S_MEM_W2_BUS_START(v),
+		    CHIP_S_MEM_W2_BUS_END(v) - CHIP_S_MEM_W2_BUS_START(v) + 1,
+		    EX_NOWAIT);
+	} else {
+#ifdef EXTENT_DEBUG
+		printf("smem: window 2 (0x%lx to 0x%lx) overlaps window 1\n",
+		    CHIP_S_MEM_W2_BUS_START(v), CHIP_S_MEM_W2_BUS_END(v));
+#endif
+	}
+#endif
+#ifdef CHIP_S_MEM_W3_BUS_START
+	if (CHIP_S_MEM_W3_BUS_START(v) != CHIP_S_MEM_W1_BUS_START(v) &&
+	    CHIP_S_MEM_W3_BUS_START(v) != CHIP_S_MEM_W2_BUS_START(v)) {
+#ifdef EXTENT_DEBUG
+		printf("smem: freeing from 0x%lx to 0x%lx\n",
+		    CHIP_S_MEM_W3_BUS_START(v), CHIP_S_MEM_W3_BUS_END(v));
+#endif
+		extent_free(sex, CHIP_S_MEM_W3_BUS_START(v),
+		    CHIP_S_MEM_W3_BUS_END(v) - CHIP_S_MEM_W3_BUS_START(v) + 1,
+		    EX_NOWAIT);
+	} else {
+#ifdef EXTENT_DEBUG
+		printf("smem: window 2 (0x%lx to 0x%lx) overlaps window 1\n",
+		    CHIP_S_MEM_W2_BUS_START(v), CHIP_S_MEM_W2_BUS_END(v));
+#endif
+	}
+#endif
 
-	h->abs_cookie = iov;
-	return (h);
+#ifdef EXTENT_DEBUG
+        extent_print(sex);
+#endif
+        CHIP_S_MEM_EXTENT(v) = sex;
+
+	return (t);
+}
+
+static int	__C(CHIP,_xlate_addr_to_dense_handle) __P((void *,
+		    bus_addr_t, bus_space_handle_t *));
+static int	__C(CHIP,_xlate_dense_handle_to_addr) __P((void *,
+		    bus_space_handle_t, bus_addr_t *));
+static int	__C(CHIP,_xlate_addr_to_sparse_handle) __P((void *,
+		    bus_addr_t, bus_space_handle_t *));
+static int	__C(CHIP,_xlate_sparse_handle_to_addr) __P((void *,
+		    bus_space_handle_t, bus_addr_t *));
+
+static int
+__C(CHIP,_xlate_addr_to_dense_handle)(v, memaddr, memhp)
+	void *v;
+	bus_addr_t memaddr;
+	bus_space_handle_t *memhp;
+{
+#ifdef CHIP_D_MEM_W1_BUS_START
+	if (memaddr >= CHIP_D_MEM_W1_BUS_START(v) &&
+	    memaddr <= CHIP_D_MEM_W1_BUS_END(v)) {
+		*memhp = ALPHA_PHYS_TO_K0SEG(CHIP_D_MEM_W1_SYS_START(v)) +
+		    (memaddr - CHIP_D_MEM_W1_BUS_START(v));
+		return (1);
+	} else
+#endif
+		return (0);
+}
+
+static int
+__C(CHIP,_xlate_dense_handle_to_addr)(v, memh, memaddrp)
+	void *v;
+	bus_space_handle_t memh;
+	bus_addr_t *memaddrp;
+{
+
+	memh = ALPHA_K0SEG_TO_PHYS(memh);
+
+#ifdef CHIP_D_MEM_W1_BUS_START
+	if (memh >= CHIP_D_MEM_W1_SYS_START(v) &&
+	    memh <= CHIP_D_MEM_W1_SYS_END(v)) {
+		*memaddrp = CHIP_D_MEM_W1_BUS_START(v) +
+		    (memh - CHIP_D_MEM_W1_SYS_START(v));
+		return (1);
+	} else
+#endif
+		return (0);
+}
+
+static int
+__C(CHIP,_xlate_addr_to_sparse_handle)(v, memaddr, memhp)
+	void *v;
+	bus_addr_t memaddr;
+	bus_space_handle_t *memhp;
+{
+
+#ifdef CHIP_S_MEM_W1_BUS_START
+	if (memaddr >= CHIP_S_MEM_W1_BUS_START(v) &&
+	    memaddr <= CHIP_S_MEM_W1_BUS_END(v)) {
+		*memhp =
+		    (ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W1_SYS_START(v)) >> 5) +
+		    (memaddr - CHIP_S_MEM_W1_BUS_START(v));
+		return (1);
+	} else
+#endif
+#ifdef CHIP_S_MEM_W2_BUS_START
+	if (memaddr >= CHIP_S_MEM_W2_BUS_START(v) &&
+	    memaddr <= CHIP_S_MEM_W2_BUS_END(v)) {
+		*memhp =
+		    (ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W2_SYS_START(v)) >> 5) +
+		    (memaddr - CHIP_S_MEM_W2_BUS_START(v));
+		return (1);
+	} else
+#endif
+#ifdef CHIP_S_MEM_W3_BUS_START
+	if (memaddr >= CHIP_S_MEM_W3_BUS_START(v) &&
+	    memaddr <= CHIP_S_MEM_W3_BUS_END(v)) {
+		*memhp =
+		    (ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W3_SYS_START(v)) >> 5) +
+		    (memaddr - CHIP_S_MEM_W3_BUS_START(v));
+		return (1);
+	} else
+#endif
+		return (0);
+}
+
+static int
+__C(CHIP,_xlate_sparse_handle_to_addr)(v, memh, memaddrp)
+	void *v;
+	bus_space_handle_t memh;
+	bus_addr_t *memaddrp;
+{
+
+	memh = ALPHA_K0SEG_TO_PHYS(memh << 5) >> 5;
+
+#ifdef CHIP_S_MEM_W1_BUS_START
+	if ((memh << 5) >= CHIP_S_MEM_W1_SYS_START(v) &&
+	    (memh << 5) <= CHIP_S_MEM_W1_SYS_END(v)) {
+		*memaddrp = CHIP_S_MEM_W1_BUS_START(v) +
+		    (memh - (CHIP_S_MEM_W1_SYS_START(v) >> 5));
+		return (1);
+	} else
+#endif
+#ifdef CHIP_S_MEM_W2_BUS_START
+	if ((memh << 5) >= CHIP_S_MEM_W2_SYS_START(v) &&
+	    (memh << 5) <= CHIP_S_MEM_W2_SYS_END(v)) {
+		*memaddrp = CHIP_S_MEM_W2_BUS_START(v) +
+		    (memh - (CHIP_S_MEM_W2_SYS_START(v) >> 5));
+		return (1);
+	} else
+#endif
+#ifdef CHIP_S_MEM_W3_BUS_START
+	if ((memh << 5) >= CHIP_S_MEM_W3_SYS_START(v) &&
+	    (memh << 5) <= CHIP_S_MEM_W3_SYS_END(v)) {
+		*memaddrp = CHIP_S_MEM_W3_BUS_START(v) +
+		    (memh - (CHIP_S_MEM_W3_SYS_START(v) >> 5));
+		return (1);
+	} else
+#endif
+		return (0);
 }
 
 int
@@ -200,71 +444,106 @@ __C(CHIP,_mem_map)(v, memaddr, memsize, cacheable, memhp)
 	int cacheable;
 	bus_space_handle_t *memhp;
 {
+	bus_space_handle_t dh = 0, sh = 0;	/* XXX -Wuninitialized */
+	int didd, dids, errord, errors, mustd, musts;
+
+	mustd = 1;
+	musts = (cacheable == 0);
+
+#ifdef EXTENT_DEBUG
+	printf("mem: allocating 0x%lx to 0x%lx\n", memaddr,
+	    memaddr + memsize - 1);
+	printf("mem: %s dense, %s sparse\n", mustd ? "need" : "want",
+	    musts ? "need" : "want");
+#endif  
+	errord = extent_alloc_region(CHIP_D_MEM_EXTENT(v), memaddr, memsize,
+	    EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0));
+	didd = (errord == 0);
+	errors = extent_alloc_region(CHIP_S_MEM_EXTENT(v), memaddr, memsize,
+	    EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0));
+	dids = (errors == 0);
+
+#ifdef EXTENT_DEBUG
+	if (!didd)
+		printf("mem: failed to get dense (%d)\n", errord);
+	if (!dids)
+		printf("mem: failed to get sparse (%d)\n", errors);
+#endif
+
+	if ((mustd && !didd) || (musts && !dids))
+		goto bad;
+
+	if (didd && !__C(CHIP,_xlate_addr_to_dense_handle)(v, memaddr, &dh)) {
+		printf("\n");
+#ifdef CHIP_D_MEM_W1_BUS_START
+		printf("%s: window[1]=0x%lx-0x%lx\n", __S(__C(CHIP,_mem_map)),
+		    CHIP_D_MEM_W1_BUS_START(v), CHIP_D_MEM_W1_BUS_END(v));
+#endif
+		panic("%s: don't know how to map %lx cacheable",
+		    __S(__C(CHIP,_mem_map)), memaddr);
+	}
+
+	if (dids && !__C(CHIP,_xlate_addr_to_sparse_handle)(v, memaddr, &sh)) {
+		printf("\n");
+#ifdef CHIP_S_MEM_W1_BUS_START
+		printf("%s: window[1]=0x%lx-0x%lx\n", __S(__C(CHIP,_mem_map)),
+		    CHIP_S_MEM_W1_BUS_START(v), CHIP_S_MEM_W1_BUS_END(v));
+#endif
+#ifdef CHIP_S_MEM_W2_BUS_START
+		printf("%s: window[2]=0x%lx-0x%lx\n", __S(__C(CHIP,_mem_map)),
+		    CHIP_S_MEM_W2_BUS_START(v), CHIP_S_MEM_W2_BUS_END(v));
+#endif
+#ifdef CHIP_S_MEM_W3_BUS_START
+		printf("%s: window[3]=0x%lx-0x%lx\n", __S(__C(CHIP,_mem_map)),
+		    CHIP_S_MEM_W3_BUS_START(v), CHIP_S_MEM_W3_BUS_END(v));
+#endif
+		panic("%s: don't know how to map %lx non-cacheable",
+		    __S(__C(CHIP,_mem_map)), memaddr);
+	}
+
+	if (cacheable)
+		*memhp = dh;
+	else
+		*memhp = sh;
+	return (0);
 
-	if (cacheable) {
-#ifdef CHIP_D_MEM_W1_START
-                if (memaddr >= CHIP_D_MEM_W1_START(v) &&
-                    memaddr <= CHIP_D_MEM_W1_END(v)) {
-                        *memhp = ALPHA_PHYS_TO_K0SEG(CHIP_D_MEM_W1_BASE(v)) +
-                            (memaddr & CHIP_D_MEM_W1_MASK(v));
-                } else
-#endif
-		{
-			printf("\n");
-#ifdef CHIP_D_MEM_W1_START
-			printf("%s: window[1]=0x%lx-0x%lx\n",
-			    __S(__C(CHIP,_mem_map)), CHIP_D_MEM_W1_START(v),
-			    CHIP_D_MEM_W1_END(v)-1);
-#endif
-			panic("%s: don't know how to map %lx cacheable",
-			    __S(__C(CHIP,_mem_map)), memaddr);
+bad:
+#ifdef EXTENT_DEBUG
+	printf("mem: failed\n");
+#endif
+	if (didd) {
+#ifdef EXTENT_DEBUG
+	printf("mem: freeing dense\n");
+#endif
+		if (extent_free(CHIP_D_MEM_EXTENT(v), memaddr, memsize,
+		    EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)) != 0) {
+			printf("%s: WARNING: couldn't free dense 0x%lx-0x%lx\n",
+			    __S(__C(CHIP,_mem_map)), memaddr,
+			    memaddr + memsize - 1);
 		}
-	} else {
-#ifdef CHIP_S_MEM_W1_START
-		if (memaddr >= CHIP_S_MEM_W1_START(v) &&
-		    memaddr <= CHIP_S_MEM_W1_END(v)) {
-			*memhp = (ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W1_BASE(v)) >> 5) +
-			    (memaddr & CHIP_S_MEM_W1_MASK(v));
-		} else
-#endif
-#ifdef CHIP_S_MEM_W2_START
-		if (memaddr >= CHIP_S_MEM_W2_START(v) &&
-		    memaddr <= CHIP_S_MEM_W2_END(v)) {
-			*memhp = (ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W2_BASE(v)) >> 5) +
-			    (memaddr & CHIP_S_MEM_W2_MASK(v));
-		} else
-#endif
-#ifdef CHIP_S_MEM_W3_START
-		if (memaddr >= CHIP_S_MEM_W3_START(v) &&
-		    memaddr <= CHIP_S_MEM_W3_END(v)) {
-			*memhp = (ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W3_BASE(v)) >> 5) +
-			    (memaddr & CHIP_S_MEM_W3_MASK(v));
-		} else
-#endif
-		{
-			printf("\n");
-#ifdef CHIP_S_MEM_W1_START
-			printf("%s: window[1]=0x%lx-0x%lx\n",
-			    __S(__C(CHIP,_mem_map)), CHIP_S_MEM_W1_START(v),
-			    CHIP_S_MEM_W1_END(v)-1);
-#endif
-#ifdef CHIP_S_MEM_W2_START
-			printf("%s: window[2]=0x%lx-0x%lx\n",
-			    __S(__C(CHIP,_mem_map)), CHIP_S_MEM_W2_START(v),
-			    CHIP_S_MEM_W2_END(v)-1);
-#endif
-#ifdef CHIP_S_MEM_W3_START
-			printf("%s: window[3]=0x%lx-0x%lx\n",
-			    __S(__C(CHIP,_mem_map)), CHIP_S_MEM_W3_START(v),
-			    CHIP_S_MEM_W3_END(v)-1);
-#endif
-			panic("%s: don't know how to map %lx non-cacheable",
-			    __S(__C(CHIP,_mem_map)), memaddr);
+	}
+	if (dids) {
+#ifdef EXTENT_DEBUG
+	printf("mem: freeing sparse\n");
+#endif
+		if (extent_free(CHIP_S_MEM_EXTENT(v), memaddr, memsize,
+		    EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)) != 0) {
+			printf("%s: WARNING: couldn't free sparse 0x%lx-0x%lx\n",
+			    __S(__C(CHIP,_mem_map)), memaddr,
+			    memaddr + memsize - 1);
 		}
 	}
 
-	/* XXX XXX XXX XXX XXX XXX */
-	return (0);
+#ifdef EXTENT_DEBUG
+	extent_print(CHIP_D_MEM_EXTENT(v));
+	extent_print(CHIP_S_MEM_EXTENT(v));
+#endif
+
+	/*
+	 * return dense error if we needed it but couldn't get it, else
+	 * sparse error.  The error _has_ to be one of the two...
+	 */
+	return (mustd && !didd ? errord : (musts && !dids ? errors : EINVAL));
 }
 
 void
@@ -273,9 +552,64 @@ __C(CHIP,_mem_unmap)(v, memh, memsize)
 	bus_space_handle_t memh;
 	bus_size_t memsize;
 {
+	bus_addr_t memaddr;
+	bus_space_handle_t temph;
+	int sparse, haves, haved;
 
-	/* XXX nothing to do. */
-	/* XXX XXX XXX XXX XXX XXX */
+#ifdef EXTENT_DEBUG
+	printf("mem: freeing handle 0x%lx for 0x%lx\n", memh, memsize);
+#endif
+
+	/*
+	 * Find out what space we're in.
+	 */
+	sparse = ((memh >> 63) == 0);
+
+	/*
+	 * Find out what address we're in in that space.
+	 */
+	haves = haved = 0;
+	if (sparse)
+		haves = __C(CHIP,_xlate_sparse_handle_to_addr)(v, memh,
+		    &memaddr);
+	else
+		haved = __C(CHIP,_xlate_dense_handle_to_addr)(v, memh,
+		    &memaddr);
+
+	if (!haves && !haved)
+		panic("%s: couldn't get addr from %s handle 0x%lx",
+		    __S(__C(CHIP,_mem_unmap)), sparse ? "sparse" : "dense",
+		    memh);
+
+	/*
+	 * Find out were/if that address lives in the other space.
+	 */
+	if (sparse)
+		haved = __C(CHIP,_xlate_addr_to_dense_handle)(v, memaddr,
+		    &temph);
+	else
+		haves = __C(CHIP,_xlate_addr_to_sparse_handle)(v, memaddr,
+		    &temph);
+
+	/*
+	 * Free any ranges we have.
+	 */
+#ifdef EXTENT_DEBUG
+	printf("mem: it's at 0x%lx (%sdense, %ssparse)\n", memaddr,
+	    haved ? "" : "not ", haves ? "" : "not ");
+#endif
+	if (haved && extent_free(CHIP_D_MEM_EXTENT(v), memaddr, memsize,
+	    EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)) != 0) {
+		printf("%s: WARNING: couldn't free dense 0x%lx-0x%lx\n",
+		    __S(__C(CHIP,_mem_map)), memaddr,
+		    memaddr + memsize - 1);
+	}
+	if (haves && extent_free(CHIP_S_MEM_EXTENT(v), memaddr, memsize,
+	    EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)) != 0) {
+		printf("%s: WARNING: couldn't free sparse 0x%lx-0x%lx\n",
+		    __S(__C(CHIP,_mem_map)), memaddr,
+		    memaddr + memsize - 1);
+	}
 }
 
 int
@@ -314,7 +648,21 @@ __C(CHIP,_mem_free)(v, bsh, size)
 	panic("%s not implemented", __S(__C(CHIP,_mem_free)));
 }
 
-u_int8_t
+inline void
+__C(CHIP,_mem_barrier)(v, h, o, l, f)
+	void *v;
+	bus_space_handle_t h;
+	bus_size_t o, l;
+	int f;
+{
+
+	if ((f & BUS_BARRIER_READ) != 0)
+		alpha_mb();
+	else if ((f & BUS_BARRIER_WRITE) != 0)
+		alpha_wmb();
+}
+
+inline u_int8_t
 __C(CHIP,_mem_read_1)(v, memh, off)
 	void *v;
 	bus_space_handle_t memh;
@@ -339,7 +687,7 @@ __C(CHIP,_mem_read_1)(v, memh, off)
 	return rval;
 }
 
-u_int16_t
+inline u_int16_t
 __C(CHIP,_mem_read_2)(v, memh, off)
 	void *v;
 	bus_space_handle_t memh;
@@ -364,7 +712,7 @@ __C(CHIP,_mem_read_2)(v, memh, off)
 	return rval;
 }
 
-u_int32_t
+inline u_int32_t
 __C(CHIP,_mem_read_4)(v, memh, off)
 	void *v;
 	bus_space_handle_t memh;
@@ -393,7 +741,7 @@ __C(CHIP,_mem_read_4)(v, memh, off)
 	return rval;
 }
 
-u_int64_t
+inline u_int64_t
 __C(CHIP,_mem_read_8)(v, memh, off)
 	void *v;
 	bus_space_handle_t memh;
@@ -448,7 +796,7 @@ CHIP_mem_read_region_N(2,u_int16_t)
 CHIP_mem_read_region_N(4,u_int32_t)
 CHIP_mem_read_region_N(8,u_int64_t)
 
-void
+inline void
 __C(CHIP,_mem_write_1)(v, memh, off, val)
 	void *v;
 	bus_space_handle_t memh;
@@ -471,7 +819,7 @@ __C(CHIP,_mem_write_1)(v, memh, off, val)
         alpha_mb();
 }
 
-void
+inline void
 __C(CHIP,_mem_write_2)(v, memh, off, val)
 	void *v;
 	bus_space_handle_t memh;
@@ -494,7 +842,7 @@ __C(CHIP,_mem_write_2)(v, memh, off, val)
         alpha_mb();
 }
 
-void
+inline void
 __C(CHIP,_mem_write_4)(v, memh, off, val)
 	void *v;
 	bus_space_handle_t memh;
@@ -517,7 +865,7 @@ __C(CHIP,_mem_write_4)(v, memh, off, val)
         alpha_mb();
 }
 
-void
+inline void
 __C(CHIP,_mem_write_8)(v, memh, off, val)
 	void *v;
 	bus_space_handle_t memh;
@@ -574,16 +922,64 @@ CHIP_mem_write_region_N(2,u_int16_t)
 CHIP_mem_write_region_N(4,u_int32_t)
 CHIP_mem_write_region_N(8,u_int64_t)
 
-void
-__C(CHIP,_mem_barrier)(v, h, o, l, f)
-	void *v;
-	bus_space_handle_t h;
-	bus_size_t o, l;
-	int f;
-{
+#define CHIP_mem_set_multi_N(BYTES,TYPE)				\
+void									\
+__C(__C(CHIP,_mem_set_multi_),BYTES)(v, h, o, val, c)			\
+	void *v;							\
+	bus_space_handle_t h;						\
+	bus_size_t o, c;						\
+	TYPE val;							\
+{									\
+									\
+	while (c-- > 0) {						\
+		__C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val);		\
+		__C(CHIP,_mem_barrier)(v, h, o, sizeof val,		\
+		    BUS_BARRIER_WRITE);					\
+	}								\
+}
+CHIP_mem_set_multi_N(1,u_int8_t)
+CHIP_mem_set_multi_N(2,u_int16_t)
+CHIP_mem_set_multi_N(4,u_int32_t)
+CHIP_mem_set_multi_N(8,u_int64_t)
 
-	if ((f & BUS_BARRIER_READ) != 0)
-		alpha_mb();
-	else if ((f & BUS_BARRIER_WRITE) != 0)
-		alpha_wmb();
+#define CHIP_mem_set_region_N(BYTES,TYPE)				\
+void									\
+__C(__C(CHIP,_mem_set_region_),BYTES)(v, h, o, val, c)			\
+	void *v;							\
+	bus_space_handle_t h;						\
+	bus_size_t o, c;						\
+	TYPE val;							\
+{									\
+									\
+	while (c-- > 0) {						\
+		__C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val);		\
+		o += sizeof val;					\
+	}								\
+}
+CHIP_mem_set_region_N(1,u_int8_t)
+CHIP_mem_set_region_N(2,u_int16_t)
+CHIP_mem_set_region_N(4,u_int32_t)
+CHIP_mem_set_region_N(8,u_int64_t)
+
+#define	CHIP_mem_copy_N(BYTES)						\
+void									\
+__C(__C(CHIP,_mem_copy_),BYTES)(v, h1, o1, h2, o2, c)			\
+	void *v;							\
+	bus_space_handle_t h1, h2;					\
+	bus_size_t o1, o2, c;						\
+{									\
+	bus_size_t i, o;						\
+									\
+	if ((h1 >> 63) != 0 && (h2 >> 63) != 0) {			\
+		bcopy((void *)(h1 + o1), (void *)(h2 + o2), c * BYTES);	\
+		return;							\
+	}								\
+									\
+	for (i = 0, o = 0; i < c; i++, o += BYTES)			\
+		__C(__C(CHIP,_mem_write_),BYTES)(v, h2, o2 + o,		\
+		    __C(__C(CHIP,_mem_read_),BYTES)(v, h1, o1 + o));	\
 }
+CHIP_mem_copy_N(1)
+CHIP_mem_copy_N(2)
+CHIP_mem_copy_N(4)
+CHIP_mem_copy_N(8)
diff --git a/sys/arch/alpha/pci/sio.c b/sys/arch/alpha/pci/sio.c
index 9b4e45c7aa0..414d6b27ccc 100644
--- a/sys/arch/alpha/pci/sio.c
+++ b/sys/arch/alpha/pci/sio.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: sio.c,v 1.8 1996/12/08 00:20:48 niklas Exp $	*/
-/*	$NetBSD: sio.c,v 1.12 1996/10/23 04:12:33 cgd Exp $	*/
+/*	$OpenBSD: sio.c,v 1.9 1997/01/24 19:57:57 niklas Exp $	*/
+/*	$NetBSD: sio.c,v 1.15 1996/12/05 01:39:36 cgd Exp $	*/
 
 /*
  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
@@ -45,18 +45,33 @@
 
 #include <alpha/pci/siovar.h>
 
+struct sio_softc {
+	struct device	sc_dv;
+
+	bus_space_tag_t sc_iot, sc_memt;
+	int		sc_haseisa;
+};
+
+#ifdef __BROKEN_INDIRECT_CONFIG
 int	siomatch __P((struct device *, void *, void *));
+#else
+int	siomatch __P((struct device *, struct cfdata *, void *));
+#endif
 void	sioattach __P((struct device *, struct device *, void *));
 
 struct cfattach sio_ca = {
-	sizeof(struct device), siomatch, sioattach,
+	sizeof(struct sio_softc), siomatch, sioattach,
 };
 
 struct cfdriver sio_cd = {
 	NULL, "sio", DV_DULL,
 };
 
+#ifdef __BROKEN_INDIRECT_CONFIG
 int	pcebmatch __P((struct device *, void *, void *));
+#else
+int	pcebmatch __P((struct device *, struct cfdata *, void *));
+#endif
 
 struct cfattach pceb_ca = {
 	sizeof(struct device), pcebmatch, sioattach,
@@ -80,10 +95,17 @@ void	sio_eisa_attach_hook __P((struct device *, struct device *,
 int	sio_eisa_maxslots __P((void *));
 int	sio_eisa_intr_map __P((void *, u_int, eisa_intr_handle_t *));
 
+void	sio_bridge_callback __P((void *));
+
 int
 siomatch(parent, match, aux)
 	struct device *parent;
-	void *match, *aux;
+#ifdef __BROKEN_INDIRECT_CONFIG
+	void *match;
+#else
+	struct cfdata *match;
+#endif
+	void *aux;
 {
 	struct pci_attach_args *pa = aux;
 
@@ -97,7 +119,12 @@ siomatch(parent, match, aux)
 int
 pcebmatch(parent, match, aux)
 	struct device *parent;
-	void *match, *aux;
+#ifdef __BROKEN_INDIRECT_CONFIG
+	void *match;
+#else
+	struct cfdata *match;
+#endif
+	void *aux;
 {
 	struct pci_attach_args *pa = aux;
 
@@ -113,35 +140,35 @@ sioattach(parent, self, aux)
 	struct device *parent, *self;
 	void *aux;
 {
+	struct sio_softc *sc = (struct sio_softc *)self;
 	struct pci_attach_args *pa = aux;
-	struct alpha_isa_chipset ic;
-	struct alpha_eisa_chipset ec;
-	union sio_attach_args sa;
-	int sio, haseisa;
 	char devinfo[256];
 
-	sio = (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_SIO);
-	haseisa = (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_PCEB);
-
 	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo);
 	printf(": %s (rev. 0x%02x)\n", devinfo,
 	    PCI_REVISION(pa->pa_class));
 
-	if (sio) {
-		pci_revision_t rev;
-
-		rev = PCI_REVISION(pa->pa_class);
-		
-		if (rev < 3)
-			printf("%s: WARNING: SIO I SUPPORT UNTESTED\n",
-			    self->dv_xname);
-	}
+	sc->sc_iot = pa->pa_iot;
+	sc->sc_memt = pa->pa_memt;
+	sc->sc_haseisa = (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_PCEB);
 
 #ifdef EVCNT_COUNTERS
-	evcnt_attach(self, "intr", &sio_intr_evcnt);
+	evcnt_attach(&sc->sc_dv, "intr", &sio_intr_evcnt);
 #endif
 
-	if (haseisa) {
+	set_pci_isa_bridge_callback(sio_bridge_callback, sc);
+}
+
+void
+sio_bridge_callback(v)
+	void *v;
+{
+	struct sio_softc *sc = v;
+	struct alpha_eisa_chipset ec;
+	struct alpha_isa_chipset ic;
+	union sio_attach_args sa;
+
+	if (sc->sc_haseisa) {
 		ec.ec_v = NULL;
 		ec.ec_attach_hook = sio_eisa_attach_hook;
 		ec.ec_maxslots = sio_eisa_maxslots;
@@ -151,10 +178,10 @@ sioattach(parent, self, aux)
 		ec.ec_intr_disestablish = sio_intr_disestablish;
 
 		sa.sa_eba.eba_busname = "eisa";
-		sa.sa_eba.eba_iot = pa->pa_iot;
-		sa.sa_eba.eba_memt = pa->pa_memt;
+		sa.sa_eba.eba_iot = sc->sc_iot;
+		sa.sa_eba.eba_memt = sc->sc_memt;
 		sa.sa_eba.eba_ec = &ec;
-		config_found(self, &sa.sa_eba, sioprint);
+		config_found(&sc->sc_dv, &sa.sa_eba, sioprint);
 	}
 
 	ic.ic_v = NULL;
@@ -163,10 +190,10 @@ sioattach(parent, self, aux)
 	ic.ic_intr_disestablish = sio_intr_disestablish;
 
 	sa.sa_iba.iba_busname = "isa";
-	sa.sa_iba.iba_iot = pa->pa_iot;
-	sa.sa_iba.iba_memt = pa->pa_memt;
+	sa.sa_iba.iba_iot = sc->sc_iot;
+	sa.sa_iba.iba_memt = sc->sc_memt;
 	sa.sa_iba.iba_ic = &ic;
-	config_found(self, &sa.sa_iba, sioprint);
+	config_found(&sc->sc_dv, &sa.sa_iba, sioprint);
 }
 
 int
diff --git a/sys/arch/alpha/pci/sio_pic.c b/sys/arch/alpha/pci/sio_pic.c
index 037707f5e85..84e3b616c19 100644
--- a/sys/arch/alpha/pci/sio_pic.c
+++ b/sys/arch/alpha/pci/sio_pic.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: sio_pic.c,v 1.8 1996/12/08 00:20:49 niklas Exp $	*/
-/*	$NetBSD: sio_pic.c,v 1.14 1996/10/23 04:12:33 cgd Exp $	*/
+/*	$OpenBSD: sio_pic.c,v 1.9 1997/01/24 19:57:59 niklas Exp $	*/
+/*	$NetBSD: sio_pic.c,v 1.16 1996/11/17 02:05:26 cgd Exp $	*/
 
 /*
  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
@@ -60,29 +60,12 @@
 /*
  * Private functions and variables.
  */
-static void	sio_strayintr __P((int));
-
 bus_space_tag_t sio_iot;
 bus_space_handle_t sio_ioh_icu1, sio_ioh_icu2, sio_ioh_elcr;
 
-/*
- * Interrupt handler chains.  sio_intr_establish() inserts a handler into
- * the list.  The handler is called with its (single) argument.
- */
-struct intrhand {
-	int	(*ih_fun) __P((void *));
-	void	*ih_arg;
-	u_long	ih_count;
-	struct	intrhand *ih_next;
-	int	ih_level;
-	int	ih_irq;
-};
-
 #define	ICU_LEN		16		/* number of ISA IRQs */
 
-static struct intrhand *sio_intrhand[ICU_LEN];
-static int sio_intrsharetype[ICU_LEN];
-static u_long sio_strayintrcnt[ICU_LEN];
+static struct alpha_shared_intr *sio_intr;
 #ifdef EVCNT_COUNTERS
 struct evcnt sio_intr_evcnt;
 #endif
@@ -117,6 +100,8 @@ u_int8_t initial_elcr[2];
 
 void sio_setirqstat __P((int, int, int));
 
+void	sio_setirqstat __P((int, int, int));
+
 void
 sio_setirqstat(irq, enabled, type)
 	int irq, enabled;
@@ -130,8 +115,6 @@ sio_setirqstat(irq, enabled, type)
 	    enabled ? "enabled" : "disabled", isa_intr_typename(type));
 #endif
 
-	sio_intrsharetype[irq] = type;
-
 	icu = irq / 8;
 	bit = irq % 8;
 
@@ -217,10 +200,14 @@ sio_intr_setup(iot)
 #endif
 #endif
 
+	sio_intr = alpha_shared_intr_alloc(ICU_LEN);
+
 	/*
 	 * set up initial values for interrupt enables.
 	 */
 	for (i = 0; i < ICU_LEN; i++) {
+		alpha_shared_intr_set_maxstrays(sio_intr, i, STRAY_MAX);
+
 		switch (i) {
 		case 0:
 		case 1:
@@ -233,6 +220,8 @@ sio_intr_setup(iot)
 			if (INITIALLY_LEVEL_TRIGGERED(i))
 				printf("sio_intr_setup: %d LT!\n", i);
 			sio_setirqstat(i, INITIALLY_ENABLED(i), IST_EDGE);
+			alpha_shared_intr_set_dfltsharetype(sio_intr, i,
+			    IST_EDGE);
 			break;
 
 		case 2:
@@ -245,6 +234,8 @@ sio_intr_setup(iot)
 			if (!INITIALLY_ENABLED(i))
 				printf("sio_intr_setup: %d not enabled!\n", i);
 			sio_setirqstat(i, 1, IST_EDGE);
+			alpha_shared_intr_set_dfltsharetype(sio_intr, i,
+			    IST_UNUSABLE);
 			break;
 
 		default:
@@ -255,6 +246,9 @@ sio_intr_setup(iot)
 			sio_setirqstat(i, INITIALLY_ENABLED(i),
 			    INITIALLY_LEVEL_TRIGGERED(i) ? IST_LEVEL :
 				IST_NONE);
+			alpha_shared_intr_set_dfltsharetype(sio_intr, i,
+			    INITIALLY_LEVEL_TRIGGERED(i) ? IST_LEVEL :
+                                IST_NONE);
 			break;
 		}
 	}
@@ -268,75 +262,34 @@ sio_intr_string(v, irq)
 	static char irqstr[12];		/* 8 + 2 + NULL + sanity */
 
 	if (irq == 0 || irq >= ICU_LEN || irq == 2)
-		panic("sio_intr_string: bogus IRQ 0x%x\n", irq);
+		panic("sio_intr_string: bogus isa irq 0x%x\n", irq);
 
 	sprintf(irqstr, "isa irq %d", irq);
 	return (irqstr);
 }
 
 void *
-sio_intr_establish(v, irq, type, level, ih_fun, ih_arg, name)
-	void *v, *ih_arg;
+sio_intr_establish(v, irq, type, level, fn, arg, name)
+	void *v, *arg;
         int irq;
         int type;
         int level;
-        int (*ih_fun)(void *);
+        int (*fn)(void *);
 	char *name;
 {
-	struct intrhand **p, *c, *ih;
-	extern int cold;
-
-	/* no point in sleeping unless someone can free memory. */
-	ih = malloc(sizeof *ih, M_DEVBUF, cold ? M_NOWAIT : M_WAITOK);
-	if (ih == NULL)
-		panic("sio_intr_establish: can't malloc handler info");
+	void *cookie;
 
 	if (irq > ICU_LEN || type == IST_NONE)
 		panic("sio_intr_establish: bogus irq or type");
 
-	switch (sio_intrsharetype[irq]) {
-	case IST_EDGE:
-	case IST_LEVEL:
-		if (type == sio_intrsharetype[irq])
-			break;
-	case IST_PULSE:
-		if (type != IST_NONE) {
-			if (sio_intrhand[irq] == NULL) {
-				printf("sio_intr_establish: irq %d: warning: using %s on %s\n",
-				    irq, isa_intr_typename(type),
-				    isa_intr_typename(sio_intrsharetype[irq]));
-				type = sio_intrsharetype[irq];
-			} else {
-				panic("sio_intr_establish: irq %d: can't share %s with %s",
-				    irq, isa_intr_typename(type),
-				    isa_intr_typename(sio_intrsharetype[irq]));
-			}
-		}
-		break;
-        }
-
-	/*
-	 * Figure out where to put the handler.
-	 * This is O(N^2), but we want to preserve the order, and N is
-	 * generally small.
-	 */
-	for (p = &sio_intrhand[irq]; (c = *p) != NULL; p = &c->ih_next)
-		;
-
-	/*
-	 * Poke the real handler in now.
-	 */
-	ih->ih_fun = ih_fun;
-	ih->ih_arg = ih_arg;
-	ih->ih_count = 0;
-	ih->ih_next = NULL;
-	ih->ih_level = 0;			/* XXX meaningless on alpha */
-	ih->ih_irq = irq;
-	*p = ih;
+	cookie = alpha_shared_intr_establish(sio_intr, irq, type, level, fn,
+	    arg, name);
 
-	sio_setirqstat(irq, 1, type);
+	if (cookie)
+		sio_setirqstat(irq, alpha_shared_intr_isactive(sio_intr, irq),
+		    alpha_shared_intr_get_sharetype(sio_intr, irq));
 
-	return ih;
+	return (cookie);
 }
 
 void
@@ -345,45 +298,19 @@ sio_intr_disestablish(v, cookie)
 	void *cookie;
 {
 
-	printf("sio_intr_disestablish(%lx)\n", cookie);
+	printf("sio_intr_disestablish(%p)\n", cookie);
 	/* XXX */
 
 	/* XXX NEVER ALLOW AN INITIALLY-ENABLED INTERRUPT TO BE DISABLED */
 	/* XXX NEVER ALLOW AN INITIALLY-LT INTERRUPT TO BECOME UNTYPED */
 }
 
-/*
- * caught a stray interrupt; notify if not too many seen already.
- */
-void
-sio_strayintr(irq)
-	int irq;
-{
-
-        sio_strayintrcnt[irq]++;
-
-#ifdef notyet
-        if (sio_strayintrcnt[irq] == STRAY_MAX)
-                sio_disable_intr(irq);
-
-        log(LOG_ERR, "stray isa irq %d\n", irq);
-        if (sio_strayintrcnt[irq] == STRAY_MAX)
-                log(LOG_ERR, "disabling interrupts on isa irq %d\n", irq);
-#else
-	if (sio_strayintrcnt[irq] <= STRAY_MAX)
-		log(LOG_ERR, "stray isa irq %d%s\n", irq,
-		    sio_strayintrcnt[irq] >= STRAY_MAX ?
-			"; stopped logging" : "");
-#endif
-}
-
 void
 sio_iointr(framep, vec)
 	void *framep;
 	unsigned long vec;
 {
-	int irq, handled;
-	struct intrhand *ih;
+	int irq;
 
 	irq = (vec - 0x800) >> 4;
 #ifdef DIAGNOSTIC
@@ -394,36 +321,15 @@ sio_iointr(framep, vec)
 #ifdef EVCNT_COUNTERS
 	sio_intr_evcnt.ev_count++;
 #else
+#ifdef DEBUG
 	if (ICU_LEN != INTRCNT_ISA_IRQ_LEN)
 		panic("sio interrupt counter sizes inconsistent");
+#endif
 	intrcnt[INTRCNT_ISA_IRQ + irq]++;
 #endif
 
-	/*
-	 * We cdr down the intrhand chain, calling each handler with
-	 * its appropriate argument;
-	 *
-	 * The handler returns one of three values:
-	 *   0 - This interrupt wasn't for me.
-	 *   1 - This interrupt was for me.
-	 *  -1 - This interrupt might have been for me, but I don't know.
-	 * If there are no handlers, or they all return 0, we flags it as a
-	 * `stray' interrupt.  On a system with level-triggered interrupts,
-	 * we could terminate immediately when one of them returns 1; but
-	 * this is PC-ish!
-	 */
-	for (ih = sio_intrhand[irq], handled = 0; ih != NULL;
-	    ih = ih->ih_next) {
-		int rv;
-
-		rv = (*ih->ih_fun)(ih->ih_arg);
-
-		ih->ih_count++;
-		handled = handled || (rv != 0);
-	}
-
-	if (!handled)
-		sio_strayintr(irq);
+	if (!alpha_shared_intr_dispatch(sio_intr, irq))
+		alpha_shared_intr_stray(sio_intr, irq, "isa irq");
 
 	/*
 	 * Some versions of the machines which use the SIO
diff --git a/sys/arch/alpha/pci/tga.c b/sys/arch/alpha/pci/tga.c
index e8c52fc1b4f..b22c9f5f8f1 100644
--- a/sys/arch/alpha/pci/tga.c
+++ b/sys/arch/alpha/pci/tga.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: tga.c,v 1.8 1996/12/08 00:20:51 niklas Exp $	*/
-/*	$NetBSD: tga.c,v 1.11 1996/10/23 04:12:35 cgd Exp $	*/
+/*	$OpenBSD: tga.c,v 1.9 1997/01/24 19:58:00 niklas Exp $	*/
+/*	$NetBSD: tga.c,v 1.13 1996/12/05 01:39:37 cgd Exp $	*/
 
 /*
  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
@@ -55,7 +55,11 @@
 #include <machine/autoconf.h>
 #include <machine/pte.h>
 
+#ifdef __BROKEN_INDIRECT_CONFIG
 int	tgamatch __P((struct device *, void *, void *));
+#else
+int	tgamatch __P((struct device *, struct cfdata *, void *));
+#endif
 void	tgaattach __P((struct device *, struct device *, void *));
 int	tgaprint __P((void *, const char *));
 
@@ -83,8 +87,8 @@ struct wscons_emulfuncs tga_emulfuncs = {
 	rcons_eraserows,
 };
 
-int	tgaioctl __P((struct device *, u_long, caddr_t, int, struct proc *));
-int	tgammap __P((struct device *, off_t, int));
+int	tgaioctl __P((void *, u_long, caddr_t, int, struct proc *));
+int	tgammap __P((void *, off_t, int));
 
 void	tga_blank __P((struct tga_devconfig *));
 void	tga_unblank __P((struct tga_devconfig *));
@@ -92,7 +96,12 @@ void	tga_unblank __P((struct tga_devconfig *));
 int
 tgamatch(parent, match, aux)
 	struct device *parent;
-	void *match, *aux;
+#ifdef __BROKEN_INDIRECT_CONFIG
+	void *match;
+#else
+	struct cfdata *match;
+#endif
+	void *aux;
 {
 	struct pci_attach_args *pa = aux;
 
@@ -296,15 +305,20 @@ tgaattach(parent, self, aux)
 		    intrstr);
 
 	waa.waa_isconsole = console;
+
 	wo = &waa.waa_odev_spec;
-	wo->wo_ef = &tga_emulfuncs;
-	wo->wo_efa = &sc->sc_dc->dc_rcons;
+
+	wo->wo_emulfuncs = &tga_emulfuncs;
+	wo->wo_emulfuncs_cookie = &sc->sc_dc->dc_rcons;
+
+	wo->wo_ioctl = tgaioctl;
+	wo->wo_mmap = tgammap;
+	wo->wo_miscfuncs_cookie = sc;
+
 	wo->wo_nrows = sc->sc_dc->dc_rcons.rc_maxrow;
 	wo->wo_ncols = sc->sc_dc->dc_rcons.rc_maxcol;
 	wo->wo_crow = 0;
 	wo->wo_ccol = 0;
-	wo->wo_ioctl = tgaioctl;
-	wo->wo_mmap = tgammap;
 
 	config_found(self, &waa, tgaprint);
 }
@@ -321,14 +335,14 @@ tgaprint(aux, pnp)
 }
 
 int
-tgaioctl(dev, cmd, data, flag, p)
-	struct device *dev;
+tgaioctl(v, cmd, data, flag, p)
+	void *v;
 	u_long cmd;
 	caddr_t data;
 	int flag;
 	struct proc *p;
 {
-	struct tga_softc *sc = (struct tga_softc *)dev;
+	struct tga_softc *sc = v;
 	struct tga_devconfig *dc = sc->sc_dc;
 	const struct tga_ramdac_conf *tgar = dc->dc_tgaconf->tgac_ramdac;
 
@@ -383,12 +397,12 @@ tgaioctl(dev, cmd, data, flag, p)
 }
 
 int
-tgammap(dev, offset, prot)
-	struct device *dev;
+tgammap(v, offset, prot)
+	void *v;
 	off_t offset;
 	int prot;
 {
-	struct tga_softc *sc = (struct tga_softc *)dev;
+	struct tga_softc *sc = v;
 
 	if (offset > sc->sc_dc->dc_tgaconf->tgac_cspace_size)
 		return -1;
@@ -421,13 +435,15 @@ tga_console(iot, memt, pc, bus, device, function)
 	 */
 	(*dcp->dc_tgaconf->tgac_ramdac->tgar_init)(dcp, 0);
 
-	wo.wo_ef = &tga_emulfuncs;
-	wo.wo_efa = &dcp->dc_rcons;
+	wo.wo_emulfuncs = &tga_emulfuncs;
+	wo.wo_emulfuncs_cookie = &dcp->dc_rcons;
+
+	/* ioctl and mmap are unused until real attachment. */
+
 	wo.wo_nrows = dcp->dc_rcons.rc_maxrow;
 	wo.wo_ncols = dcp->dc_rcons.rc_maxcol;
 	wo.wo_crow = 0;
 	wo.wo_ccol = 0;
-	/* ioctl and mmap are unused until real attachment. */
 
 	wscons_attach_console(&wo);
 }
diff --git a/sys/arch/alpha/pci/tga_bt485.c b/sys/arch/alpha/pci/tga_bt485.c
index cefd7d05ed1..ead6223af5a 100644
--- a/sys/arch/alpha/pci/tga_bt485.c
+++ b/sys/arch/alpha/pci/tga_bt485.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: tga_bt485.c,v 1.3 1996/10/30 22:40:21 niklas Exp $	*/
-/*	$NetBSD: tga_bt485.c,v 1.3 1996/07/09 00:55:05 cgd Exp $	*/
+/*	$OpenBSD: tga_bt485.c,v 1.4 1997/01/24 19:58:01 niklas Exp $	*/
+/*	$NetBSD: tga_bt485.c,v 1.4 1996/11/13 21:13:35 cgd Exp $	*/
 
 /*
  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
diff --git a/sys/arch/alpha/pci/vga_pci.c b/sys/arch/alpha/pci/vga_pci.c
new file mode 100644
index 00000000000..4cb4ca703cf
--- /dev/null
+++ b/sys/arch/alpha/pci/vga_pci.c
@@ -0,0 +1,155 @@
+/*	$NetBSD: vga_pci.c,v 1.4 1996/12/05 01:39:38 cgd Exp $	*/
+
+/*
+ * Copyright (c) 1995, 1996 Carnegie-Mellon University.
+ * All rights reserved.
+ *
+ * Author: Chris G. Demetriou
+ * 
+ * Permission to use, copy, modify and distribute this software and
+ * its documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ * 
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ * 
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/device.h>
+#include <sys/malloc.h>
+
+#include <machine/autoconf.h>
+#include <machine/pte.h>
+
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcivar.h>
+#include <dev/pci/pcidevs.h>
+
+#include <alpha/common/vgavar.h>
+#include <alpha/pci/vga_pcivar.h>
+
+struct vga_pci_softc {
+	struct device sc_dev; 
+ 
+	pcitag_t sc_pcitag;		/* PCI tag, in case we need it. */
+	struct vga_config *sc_vc;	/* VGA configuration */ 
+};
+
+#ifdef __BROKEN_INDIRECT_CONFIG
+int	vga_pci_match __P((struct device *, void *, void *));
+#else
+int	vga_pci_match __P((struct device *, struct cfdata *, void *));
+#endif
+void	vga_pci_attach __P((struct device *, struct device *, void *));
+
+struct cfattach vga_pci_ca = {
+	sizeof(struct vga_pci_softc), vga_pci_match, vga_pci_attach,
+};
+
+pcitag_t vga_pci_console_tag;
+struct vga_config vga_pci_console_vc;
+
+int
+vga_pci_match(parent, match, aux)
+	struct device *parent;
+#ifdef __BROKEN_INDIRECT_CONFIG
+	void *match;
+#else
+	struct cfdata *match;
+#endif
+	void *aux;
+{
+	struct pci_attach_args *pa = aux;
+	int potential;
+
+	potential = 0;
+
+	/*
+	 * If it's prehistoric/vga or display/vga, we might match.
+	 * For the console device, this is jut a sanity check.
+	 */
+	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_PREHISTORIC &&
+	    PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_PREHISTORIC_VGA)
+		potential = 1;
+	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_DISPLAY &&
+	     PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_DISPLAY_VGA)
+		potential = 1;
+
+	if (!potential)
+		return (0);
+
+	/* If it's the console, we have a winner! */
+	if (pa->pa_tag == vga_pci_console_tag)
+		return (1);
+
+	/*
+	 * If we might match, make sure that the card actually looks OK.
+	 */
+	if (!vga_common_probe(pa->pa_iot, pa->pa_memt))
+		return (0);
+
+	return (1);
+}
+
+void
+vga_pci_attach(parent, self, aux)
+	struct device *parent, *self;
+	void *aux;
+{
+	struct pci_attach_args *pa = aux;
+	struct vga_pci_softc *sc = (struct vga_pci_softc *)self;
+	struct vga_config *vc;
+	char devinfo[256];
+	int console;
+
+	console = (pa->pa_tag == vga_pci_console_tag);
+	if (console)
+		vc = sc->sc_vc = &vga_pci_console_vc;
+	else {
+		vc = sc->sc_vc = (struct vga_config *)
+		    malloc(sizeof(struct vga_config), M_DEVBUF, M_WAITOK);
+
+		/* set up bus-independent VGA configuration */
+		vga_common_setup(pa->pa_iot, pa->pa_memt, vc);
+	}
+
+	sc->sc_pcitag = pa->pa_tag;
+
+	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo);
+	printf(": %s (rev. 0x%02x)\n", devinfo,
+	    PCI_REVISION(pa->pa_class));
+
+	vga_wscons_attach(self, vc, console);
+}
+
+void
+vga_pci_console(iot, memt, pc, bus, device, function)
+	bus_space_tag_t iot, memt;
+	pci_chipset_tag_t pc;
+	int bus, device, function;
+{
+	struct vga_config *vc = &vga_pci_console_vc;
+
+	/* for later recognition */
+	vga_pci_console_tag = pci_make_tag(pc, bus, device, function);
+
+	/* set up bus-independent VGA configuration */
+	vga_common_setup(iot, memt, vc);
+
+	vga_wscons_console(vc);
+}
diff --git a/sys/arch/alpha/pci/vga_pcivar.h b/sys/arch/alpha/pci/vga_pcivar.h
new file mode 100644
index 00000000000..29e258c862d
--- /dev/null
+++ b/sys/arch/alpha/pci/vga_pcivar.h
@@ -0,0 +1,37 @@
+/*	$NetBSD: vga_pcivar.h,v 1.1 1996/11/19 04:38:36 cgd Exp $	*/
+
+/*
+ * Copyright (c) 1995, 1996 Carnegie-Mellon University.
+ * All rights reserved.
+ *
+ * Author: Chris G. Demetriou
+ * 
+ * Permission to use, copy, modify and distribute this software and
+ * its documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ * 
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ * 
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+
+#define	DEVICE_IS_VGA_PCI(class, id)					\
+	    (((PCI_CLASS(class) == PCI_CLASS_DISPLAY &&			\
+	      PCI_SUBCLASS(class) == PCI_SUBCLASS_DISPLAY_VGA) ||	\
+	     (PCI_CLASS(class) == PCI_CLASS_PREHISTORIC &&		\
+	      PCI_SUBCLASS(class) == PCI_SUBCLASS_PREHISTORIC_VGA)) ? 1 : 0)
+
+void    vga_pci_console __P((bus_space_tag_t, bus_space_tag_t,
+	    pci_chipset_tag_t, int, int, int));