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authorPhilip Guenther <guenther@cvs.openbsd.org>2019-05-17 19:07:17 +0000
committerPhilip Guenther <guenther@cvs.openbsd.org>2019-05-17 19:07:17 +0000
commitceca1553ac9dbf319a9ca2cb3fe29b0d376713cf (patch)
tree003229ce3f9ee38623e5165aa19f35096e915d5f /sys/arch/amd64/conf/files.amd64
parentecff3b858a6269d46f6bd402e35f6e55a64d6296 (diff)
Mitigate Intel's Microarchitectural Data Sampling vulnerability.
If the CPU has the new VERW behavior than that is used, otherwise use the proper sequence from Intel's "Deep Dive" doc is used in the return-to-userspace and enter-VMM-guest paths. The enter-C3-idle path is not mitigated because it's only a problem when SMT/HT is enabled: mitigating everything when that's enabled would be a _huge_ set of changes that we see no point in doing. Update vmm(4) to pass through the MSR bits so that guests can apply the optimal mitigation. VMM help and specific feedback from mlarkin@ vendor-portability help from jsg@ and kettenis@ ok kettenis@ mlarkin@ deraadt@ jsg@
Diffstat (limited to 'sys/arch/amd64/conf/files.amd64')
-rw-r--r--sys/arch/amd64/conf/files.amd643
1 files changed, 2 insertions, 1 deletions
diff --git a/sys/arch/amd64/conf/files.amd64 b/sys/arch/amd64/conf/files.amd64
index 260fd500bad..15e7d6bf137 100644
--- a/sys/arch/amd64/conf/files.amd64
+++ b/sys/arch/amd64/conf/files.amd64
@@ -1,4 +1,4 @@
-# $OpenBSD: files.amd64,v 1.101 2018/10/26 20:26:19 kettenis Exp $
+# $OpenBSD: files.amd64,v 1.102 2019/05/17 19:07:16 guenther Exp $
maxpartitions 16
maxusers 2 16 128
@@ -32,6 +32,7 @@ file arch/amd64/amd64/cacheinfo.c
file arch/amd64/amd64/vector.S
file arch/amd64/amd64/copy.S
file arch/amd64/amd64/spl.S
+file arch/amd64/amd64/mds.S
file arch/amd64/amd64/intr.c
file arch/amd64/amd64/bus_space.c