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authorPer Fogelstrom <pefo@cvs.openbsd.org>1996-06-24 09:07:22 +0000
committerPer Fogelstrom <pefo@cvs.openbsd.org>1996-06-24 09:07:22 +0000
commitb0da6d46ce9cdb2877c41fbbfbfb2471130e1101 (patch)
tree6bae40ed3bba9f5ebcdfa64519398b7d93149363 /sys/arch/arc/isa/isadmareg.h
parent3dd058744292725ea73c1c76b15e1bd7f2e9fd6b (diff)
Next try. ARC tree import. "New" Mips (spim) ARC compliant systems tree.
This tree will eventually suport viritualy all ARC compliant Mips systems, that is all we can lay our hands on for porting/testing. It will supersede the pica tree which will be removed shortly when this tree is functioning.
Diffstat (limited to 'sys/arch/arc/isa/isadmareg.h')
-rw-r--r--sys/arch/arc/isa/isadmareg.h22
1 files changed, 22 insertions, 0 deletions
diff --git a/sys/arch/arc/isa/isadmareg.h b/sys/arch/arc/isa/isadmareg.h
new file mode 100644
index 00000000000..185016060f2
--- /dev/null
+++ b/sys/arch/arc/isa/isadmareg.h
@@ -0,0 +1,22 @@
+/* $NetBSD: isadmareg.h,v 1.4 1995/06/28 04:31:48 cgd Exp $ */
+
+#include <dev/ic/i8237reg.h>
+
+#define DMA_NREG 16
+/*
+ * Register definitions for DMA controller 1 (channels 0..3):
+ */
+#define DMA1_CHN(c) (1*(2*(c))) /* addr reg for channel c */
+#define DMA1_SR (1*8) /* status register */
+#define DMA1_SMSK (1*10) /* single mask register */
+#define DMA1_MODE (1*11) /* mode register */
+#define DMA1_FFC (1*12) /* clear first/last FF */
+
+/*
+ * Register definitions for DMA controller 2 (channels 4..7):
+ */
+#define DMA2_CHN(c) (2*(2*(c))) /* addr reg for channel c */
+#define DMA2_SR (2*8) /* status register */
+#define DMA2_SMSK (2*10) /* single mask register */
+#define DMA2_MODE (2*11) /* mode register */
+#define DMA2_FFC (2*12) /* clear first/last FF */