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authorPatrick Wildt <patrick@cvs.openbsd.org>2017-02-07 21:23:26 +0000
committerPatrick Wildt <patrick@cvs.openbsd.org>2017-02-07 21:23:26 +0000
commit913552bb51d4a5287b9806158049a982e6551e73 (patch)
treefb614df55b7dac8372b03e760e2e282fb871a322 /sys/arch/arm/cortex
parent4c2d355de9b477bfe515c99ccf579590fd1856ae (diff)
There are 1023 possible values for the interrupts, but our masks limit
these currently to 255. Thus making it impossible to use higher IRQs than that. The AMD Seattle SoC though seems to provide 448 IRQs, which is kind of out of bounds, so raise them to the proper values. This makes interrupts work on that machine.
Diffstat (limited to 'sys/arch/arm/cortex')
-rw-r--r--sys/arch/arm/cortex/ampintc.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/sys/arch/arm/cortex/ampintc.c b/sys/arch/arm/cortex/ampintc.c
index 1ed54eb7efb..e62c8375968 100644
--- a/sys/arch/arm/cortex/ampintc.c
+++ b/sys/arch/arm/cortex/ampintc.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: ampintc.c,v 1.16 2016/12/24 01:55:36 jsg Exp $ */
+/* $OpenBSD: ampintc.c,v 1.17 2017/02/07 21:23:25 patrick Exp $ */
/*
* Copyright (c) 2007,2009,2011 Dale Rahn <drahn@openbsd.org>
*
@@ -56,11 +56,11 @@
#define ICD_DIR_IMP_SH 0
#define ICD_DIR_IMP_M 0xfff
-#define IRQ_TO_REG32(i) (((i) >> 5) & 0x7)
+#define IRQ_TO_REG32(i) (((i) >> 5) & 0x1f)
#define IRQ_TO_REG32BIT(i) ((i) & 0x1f)
-#define IRQ_TO_REG4(i) (((i) >> 2) & 0x3f)
+#define IRQ_TO_REG4(i) (((i) >> 2) & 0xff)
#define IRQ_TO_REG4BIT(i) ((i) & 0x3)
-#define IRQ_TO_REG16(i) (((i) >> 4) & 0xf)
+#define IRQ_TO_REG16(i) (((i) >> 4) & 0x3f)
#define IRQ_TO_REGBIT_S(i) 8
#define IRQ_TO_REG4BIT_M(i) 8