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authorJonathan Gray <jsg@cvs.openbsd.org>2016-04-03 10:43:24 +0000
committerJonathan Gray <jsg@cvs.openbsd.org>2016-04-03 10:43:24 +0000
commit7b1f74b9107d7ac1b533ea5df30fe158ef8b6bfa (patch)
treec8762f02bfddca51b38010b1d199dcb9e6d34267 /sys/arch/arm/include
parent782d6441c3bcd32f321956417866ea11c536917c (diff)
remove unused cpu_lock code
Diffstat (limited to 'sys/arch/arm/include')
-rw-r--r--sys/arch/arm/include/lock.h86
1 files changed, 2 insertions, 84 deletions
diff --git a/sys/arch/arm/include/lock.h b/sys/arch/arm/include/lock.h
index cf4b7e4ca38..c7f3a173ec6 100644
--- a/sys/arch/arm/include/lock.h
+++ b/sys/arch/arm/include/lock.h
@@ -1,90 +1,8 @@
-/* $OpenBSD: lock.h,v 1.5 2014/03/29 18:09:28 guenther Exp $ */
-/* $NetBSD: lock.h,v 1.3 2002/10/07 23:19:49 bjh21 Exp $ */
+/* $OpenBSD: lock.h,v 1.6 2016/04/03 10:43:23 jsg Exp $ */
-/*-
- * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Jason R. Thorpe.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Machine-dependent spin lock operations.
- *
- * NOTE: The SWP insn used here is available only on ARM architecture
- * version 3 and later (as well as 2a). What we are going to do is
- * expect that the kernel will trap and emulate the insn. That will
- * be slow, but give us the atomicity that we need.
- */
+/* public domain */
#ifndef _ARM_LOCK_H_
#define _ARM_LOCK_H_
-#include <arm/atomic.h>
-
-typedef volatile int __cpu_simple_lock_t;
-
-#define __SIMPLELOCK_LOCKED 1
-#define __SIMPLELOCK_UNLOCKED 0
-
-static __inline int
-__swp(int __val, volatile int *__ptr)
-{
-
- __asm volatile("swp %0, %1, [%2]"
- : "=r" (__val) : "r" (__val), "r" (__ptr) : "memory");
- return __val;
-}
-
-static __inline void __attribute__((__unused__))
-__cpu_simple_lock_init(__cpu_simple_lock_t *alp)
-{
-
- *alp = __SIMPLELOCK_UNLOCKED;
-}
-
-static __inline void __attribute__((__unused__))
-__cpu_simple_lock(__cpu_simple_lock_t *alp)
-{
-
- while (__swp(__SIMPLELOCK_LOCKED, alp) != __SIMPLELOCK_UNLOCKED)
- continue;
-}
-
-static __inline int __attribute__((__unused__))
-__cpu_simple_lock_try(__cpu_simple_lock_t *alp)
-{
-
- return (__swp(__SIMPLELOCK_LOCKED, alp) == __SIMPLELOCK_UNLOCKED);
-}
-
-static __inline void __attribute__((__unused__))
-__cpu_simple_unlock(__cpu_simple_lock_t *alp)
-{
-
- *alp = __SIMPLELOCK_UNLOCKED;
-}
-
#endif /* _ARM_LOCK_H_ */