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authorPatrick Wildt <patrick@cvs.openbsd.org>2020-07-17 08:07:35 +0000
committerPatrick Wildt <patrick@cvs.openbsd.org>2020-07-17 08:07:35 +0000
commit1cc824a280e35f9095cfcada0a61fd6a5d6f9a42 (patch)
tree423b0e2bb0db50023841196c6f3781f4dcb92b75 /sys/arch/armv7/include
parent9c3ebab344c210f63472587b920035fd415238b4 (diff)
Re-work intr_barrier(9) on arm64 to remove layer violation. So far we
have stored the struct cpu_info * in the wrapper around the interrupt handler cookie, but since we can have a few layers inbetween, this does not seem very nice. Instead have each and every interrupt controller provide a barrier function. This means that intr_barrier(9) will in the end be executed by the interrupt controller that actually wired the pin to a core. And that's the only place where the information is stored. ok kettenis@
Diffstat (limited to 'sys/arch/armv7/include')
-rw-r--r--sys/arch/armv7/include/intr.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/sys/arch/armv7/include/intr.h b/sys/arch/armv7/include/intr.h
index f61eff62f66..25f957a0dae 100644
--- a/sys/arch/armv7/include/intr.h
+++ b/sys/arch/armv7/include/intr.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: intr.h,v 1.13 2020/07/14 15:34:15 patrick Exp $ */
+/* $OpenBSD: intr.h,v 1.14 2020/07/17 08:07:34 patrick Exp $ */
/* $NetBSD: intr.h,v 1.12 2003/06/16 20:00:59 thorpej Exp $ */
/*
@@ -161,6 +161,7 @@ struct interrupt_controller {
void (*ic_disable)(void *);
void (*ic_route)(void *, int, struct cpu_info *);
void (*ic_cpu_enable)(void);
+ void (*ic_barrier)(void *);
LIST_ENTRY(interrupt_controller) ic_list;
uint32_t ic_phandle;