Declare ci_ipl volatile to prevent the compiler from optimizing

or reordering accesses to the variable. Assume that the assembler
preserves the correct sequence of instructions, which allows the
removal of the explicit noreorder/reorder toggles from the C code.

With ci_ipl being volatile, drop mips_sync() calls that follow
the accesses of the variable. The sync is redundant as a compiler
barrier. In addition, the MIPS64 CPU designs should not need the
sync for pipeline or write buffer control. According to miod@,
the use of the instruction is a carryover from code targeting
early MIPS designs that lack tight integration with the cache
and write buffer.

Discussed with and testing help from miod@.
Tested on CN5020, CN6120, CN7130, CN7360, Loongson 2F and 3A1000,
R4400, R8000, R10000 and R16000.

1 files changed, 1 insertions, 7 deletions

diff --git a/sys/arch/loongson/dev/bonito.c b/sys/arch/loongson/dev/bonito.c
index 70aa60ff798..c0107540eef 100644
--- a/sys/arch/loongson/dev/bonito.c
+++ b/sys/arch/loongson/dev/bonito.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: bonito.c,v 1.33 2017/05/17 11:52:25 visa Exp $	*/
+/*	$OpenBSD: bonito.c,v 1.34 2018/02/24 11:42:30 visa Exp $	*/
 /*	$NetBSD: bonito_mainbus.c,v 1.11 2008/04/28 20:23:10 martin Exp $	*/
 /*	$NetBSD: bonito_pci.c,v 1.5 2008/04/28 20:23:28 martin Exp $	*/
 
@@ -483,10 +483,7 @@ bonito_splx(int newipl)
 	struct cpu_info *ci = curcpu();
 
 	/* Update masks to new ipl. Order highly important! */
-	__asm__ (".set noreorder\n");
 	ci->ci_ipl = newipl;
-	mips_sync();
-	__asm__ (".set reorder\n");
 	bonito_setintrmask(newipl);
 	/* If we still have softints pending trigger processing. */
 	if (ci->ci_softpending != 0 && newipl < IPL_SOFTINT)
@@ -704,10 +701,7 @@ bonito_intr_dispatch(uint64_t isr, int startbit, struct trapframe *frame)
 					rc = 1;
 					ih->ih_count.ec_count++;
 				}
-				__asm__ (".set noreorder\n");
 				curcpu()->ci_ipl = frame->ipl;
-				mips_sync();
-				__asm__ (".set reorder\n");
 			}
 			if (rc == 0) {
 				printf("spurious interrupt %d\n", bitno);