diff options
| author | Visa Hankala <visa@cvs.openbsd.org> | 2022-11-14 17:15:42 +0000 |
|---|---|---|
| committer | Visa Hankala <visa@cvs.openbsd.org> | 2022-11-14 17:15:42 +0000 |
| commit | 52006f9138baee9f2df61edd00f1851a8321a411 (patch) | |
| tree | 720d4bcb8a718aa3a601ef3c2e7728cee07d4853 /sys/arch/loongson | |
| parent | 1c948cd22305b50189886ad5fc69176af1803857 (diff) | |
Add missing clock trigger to loongson_isa_splx().
Fixes unexpected delays that have occurred with mips64 clock(4).
Diffstat (limited to 'sys/arch/loongson')
| -rw-r--r-- | sys/arch/loongson/loongson/isa_machdep.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/sys/arch/loongson/loongson/isa_machdep.c b/sys/arch/loongson/loongson/isa_machdep.c index b43bc06a184..92337a343a1 100644 --- a/sys/arch/loongson/loongson/isa_machdep.c +++ b/sys/arch/loongson/loongson/isa_machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: isa_machdep.c,v 1.4 2018/02/24 11:42:31 visa Exp $ */ +/* $OpenBSD: isa_machdep.c,v 1.5 2022/11/14 17:15:41 visa Exp $ */ /* * Copyright (c) 2009, 2010 Miodrag Vallat. @@ -88,6 +88,11 @@ loongson_isa_splx(int newipl) /* Update masks to new ipl. Order highly important! */ ci->ci_ipl = newipl; loongson_isa_setintrmask(newipl); + + /* Trigger deferred clock interrupt if it is now unmasked. */ + if (ci->ci_clock_deferred && newipl < IPL_CLOCK) + md_triggerclock(); + /* If we still have softints pending trigger processing. */ if (ci->ci_softpending != 0 && newipl < IPL_SOFTINT) setsoftintr0(); |