Initial commit for OpenBSD/luna88k, based on OpenBSD/mvme88k, NetBSD/luna68k and CMU Mach.

44 files changed, 4542 insertions, 0 deletions

diff --git a/sys/arch/luna88k/include/ansi.h b/sys/arch/luna88k/include/ansi.h
new file mode 100644
index 00000000000..f720f0420e4
--- /dev/null
+++ b/sys/arch/luna88k/include/ansi.h
@@ -0,0 +1,83 @@
+/*	$OpenBSD: ansi.h,v 1.1 2004/04/21 15:23:56 aoyama Exp $	*/
+/*-
+ * Copyright (c) 1990, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	from: @(#)ansi.h	8.2 (Berkeley) 1/4/94
+ */
+
+#ifndef	__MACHINE_ANSI_H__
+#define	__MACHINE_ANSI_H__
+
+/*
+ * Types which are fundamental to the implementation and may appear in
+ * more than one standard header are defined here.  Standard headers
+ * then use:
+ *	#ifdef	_BSD_SIZE_T_
+ *	typedef	_BSD_SIZE_T_ size_t;
+ *	#undef	_BSD_SIZE_T_
+ *	#endif
+ */
+#define	_BSD_CLOCK_T_	unsigned long		/* clock() */
+#define	_BSD_PTRDIFF_T_	int			/* ptr1 - ptr2 */
+#define	_BSD_SIZE_T_	unsigned int		/* sizeof() */
+#define	_BSD_SSIZE_T_	int			/* byte count or error */
+#define	_BSD_TIME_T_	int			/* time() */
+struct __va_list_tag;
+#if defined(__GNUC__) && __GNUC__ >= 3
+#define _BSD_VA_LIST_	__builtin_va_list
+#else
+#define	_BSD_VA_LIST_	struct __va_list_tag *	/* va_list */
+#endif
+#define _BSD_CLOCKID_T_	int
+#define _BSD_TIMER_T_	int
+
+/*
+ * Runes (wchar_t) is declared to be an ``int'' instead of the more natural
+ * ``unsigned long'' or ``long''.  Two things are happening here.  It is not
+ * unsigned so that EOF (-1) can be naturally assigned to it and used.  Also,
+ * it looks like 10646 will be a 31 bit standard.  This means that if your
+ * ints cannot hold 32 bits, you will be in trouble.  The reason an int was
+ * chosen over a long is that the is*() and to*() routines take ints (says
+ * ANSI C), but they use _RUNE_T_ instead of int.  By changing it here, you
+ * lose a bit of ANSI conformance, but your programs will still work.
+ *
+ * Note that _WCHAR_T_ and _RUNE_T_ must be of the same type.  When wchar_t
+ * and rune_t are typedef'd, _WCHAR_T_ will be undef'd, but _RUNE_T remains
+ * defined for ctype.h.
+ */
+#define	_BSD_WCHAR_T_	int			/* wchar_t */
+#define	_BSD_WINT_T_	int			/* wint_t */
+#define	_BSD_RUNE_T_	int			/* rune_t */
+
+/*
+ * We describe off_t here so its declaration can be visible to
+ * stdio without pulling in all of <sys/type.h>, thus appeasing ANSI.
+ */
+#define _BSD_OFF_T_	long long		/* file offset */
+
+#endif /* __MACHINE_ANSI_H__ */
diff --git a/sys/arch/luna88k/include/asm.h b/sys/arch/luna88k/include/asm.h
new file mode 100644
index 00000000000..37e414359c7
--- /dev/null
+++ b/sys/arch/luna88k/include/asm.h
@@ -0,0 +1,310 @@
+/*	$OpenBSD: asm.h,v 1.1 2004/04/21 15:23:56 aoyama Exp $	*/
+
+/*
+ * Mach Operating System
+ * Copyright (c) 1993-1992 Carnegie Mellon University
+ * Copyright (c) 1991 OMRON Corporation
+ * All Rights Reserved.
+ *
+ * Permission to use, copy, modify and distribute this software and its
+ * documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON AND OMRON ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION.  CARNEGIE MELLON AND OMRON DISCLAIM ANY LIABILITY OF ANY KIND
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+
+#ifndef __MACHINE_M88K_ASM_H__
+#define __MACHINE_M88K_ASM_H__
+
+#ifdef __STDC__
+#define	_C_LABEL(name)		_ ## name
+#else
+#define	_C_LABEL(name)		_/**/name
+#endif
+
+#define	_ASM_LABEL(name)	name
+
+#define	_ENTRY(name) \
+	.text; .align 8; .globl name; name:
+
+#define	ENTRY(name)		_ENTRY(_C_LABEL(name))
+#define	ASENTRY(name)		_ENTRY(_ASM_LABEL(name))
+
+#define	GLOBAL(name) \
+	.globl _C_LABEL(name); _C_LABEL(name):
+
+#define ASGLOBAL(name) \
+	.globl _ASM_LABEL(name); _ASM_LABEL(name):
+
+#define	LOCAL(name) \
+	_C_LABEL(name):
+
+#define	ASLOCAL(name) \
+	_ASM_LABEL(name):
+
+#define	BSS(name, size) \
+	.comm	_C_LABEL(name), size
+
+#define	ASBSS(name, size) \
+	.comm	_ASM_LABEL(name), size
+
+#ifdef	__ELF__
+#define	WEAK_ALIAS(alias,sym)						\
+	.weak alias;							\
+	alias = sym
+#else
+#ifdef	__STDC__
+#define	WEAK_ALIAS(alias,sym)						\
+	.weak _##alias;							\
+	_##alias = _##sym
+#else
+#define	WEAK_ALIAS(alias,sym)						\
+	.weak _/**/alias;						\
+	_/**/alias = _/**/sym
+#endif
+#endif
+
+#ifdef _KERNEL
+
+/*
+ * Control register symbolic names
+ */
+
+#define	PID	cr0
+#define	PSR	cr1
+#define	EPSR	cr2
+#define	SSBR	cr3
+#define	SXIP	cr4
+#define	SNIP	cr5
+#define	SFIP	cr6
+#define	VBR	cr7
+#define	DMT0	cr8
+#define	DMD0	cr9
+#define	DMA0	cr10
+#define	DMT1	cr11
+#define	DMD1	cr12
+#define	DMA1	cr13
+#define	DMT2	cr14
+#define	DMD2	cr15
+#define	DMA2	cr16
+#define	SR0	cr17
+#define	SR1	cr18
+#define	SR2	cr19
+#define	SR3	cr20
+
+/* MVME197 only */
+#define	SRX	cr16
+#define	EXIP	cr4
+#define	ENIP	cr5
+#define	ICMD	cr25
+#define	ICTL	cr26
+#define	ISAR	cr27
+#define	ISAP	cr28
+#define	IUAP	cr29
+#define	IIR	cr30
+#define	IBP	cr31
+#define	IPPU	cr32
+#define	IPPL	cr33
+#define	ISR	cr34
+#define	ILAR	cr35
+#define	IPAR	cr36
+#define	DCMD	cr40
+#define	DCTL	cr41
+#define	DSAR	cr42
+#define	DSAP	cr43
+#define	DUAP	cr44
+#define	DIR	cr45
+#define	DBP	cr46
+#define	DPPU	cr47
+#define	DPPL	cr48
+#define	DSR	cr49
+#define	DLAR	cr50
+#define	DPAR	cr51
+/* end MVME197 only */
+
+#define	FPECR	fcr0
+#define	FPHS1	fcr1
+#define	FPLS1	fcr2
+#define	FPHS2	fcr3
+#define	FPLS2	fcr4
+#define	FPPT	fcr5
+#define	FPRH	fcr6
+#define	FPRL	fcr7
+#define	FPIT	fcr8
+#define	FPSR	fcr62
+#define	FPCR	fcr63
+
+/*
+ * At various times, there is the need to clear the pipeline (i.e.
+ * synchronize).  A "tb1 0, r0, foo" will do that (because a trap
+ * instruction always synchronizes, and this particular instruction
+ * will never actually take the trap).
+ */
+#if 0
+#define	FLUSH_PIPELINE		tcnd	ne0, r0, 0
+#define	FLUSH_PIPELINE_STRING	"tcnd	ne0, r0, 0"
+#else
+#define	FLUSH_PIPELINE		tb1	0, r0, 0
+#define	FLUSH_PIPELINE_STRING	"tb1	0, r0, 0"
+#endif
+#define	NOP			or	r0, r0, r0
+#define	NOP_STRING		"or	r0, r0, r0"
+
+#define RTE	NOP ; rte
+
+/*
+ * Useful in some situations.
+ */
+#define CALL(NAME, ARG1, ARG2) \
+	subu	r31, r31, 32; \
+	or	r2, r0, ARG1; \
+	bsr.n	NAME; \
+	 or	r3, r0, ARG2; \
+	addu	r31, r31, 32
+
+/* This define is similar to CALL, but accepts a function pointer XXX smurph */
+#define CALLP(NAME, ARG1, ARG2) \
+	subu	r31, r31, 32; \
+	or.u	r5, r0, hi16(NAME); \
+	ld	r4, r5, lo16(NAME); \
+	or	r2, r0, ARG1; \
+	jsr.n	r4; \
+	 or	r3, r0, ARG2; \
+	addu	r31, r31, 32
+
+/*
+ * SR1 - CPU FLAGS REGISTER
+ * XXX clean this when the trap handler is reworked. Among the things
+ * I like to see is having the trap frame on the kernel stack instead
+ * of putting in the PCB. If done properly, we don't need SR1 for doing
+ * anything special. nivas
+ *
+ * SR1 contains flags about the current CPU status.
+ *
+ * The bit FLAG_IGNORE_DATA_EXCEPTION indicates that any data exceptions
+ * 	should be ignored (well, at least treated in a special way).
+ * The bit FLAG_ENABLING_FPU indicates that the exception handler is
+ * 	in the process of enabling the FPU (so that an exception can
+ * 	be serviced).  This is needed because enabling the FPU can
+ *	cause other exceptions to happen, and the whole system is
+ *	in a rather precarious state and so special cautions must
+ * 	be taken.
+ */
+#define FLAG_CPU_FIELD_WIDTH		2	/* must be <= 12 */
+#define FLAG_IGNORE_DATA_EXCEPTION	5
+#define FLAG_ENABLING_FPU		7
+#define FLAG_FROM_KERNEL		8
+
+/* REGister OFFset into the E.F. (exception frame) */
+#define REG_OFF(reg_num)  ((reg_num) * 4) /* (num * sizeof(register_t))  */
+#define GENREG_OFF(num)	(REG_OFF(EF_R0 + (num))) /* GENeral REGister OFFset */
+
+/*
+ * Some registers used during the setting up of the new exception frame.
+ * Don't choose r1, r30, or r31 for any of them.
+ *
+ * Also, if any are 'r2' or 'r3', be careful using with CALL above!
+ */
+#define	FLAGS	r2
+#define	TMP	r3
+#define	TMP2	r10
+#define	TMP3	r11
+#define	SAVE_TMP2	st	r10, r31, GENREG_OFF(10)
+#define	SAVE_TMP3	st	r11, r31, GENREG_OFF(11)
+#define	RESTORE_TMP2	ld	r10, r31, GENREG_OFF(10)
+#define	RESTORE_TMP3	ld	r11, r31, GENREG_OFF(11)
+
+/*
+ * Info about the PSR
+ */
+#define	PSR_SHADOW_FREEZE_BIT		0
+#define	PSR_INTERRUPT_DISABLE_BIT	1
+#define	PSR_FPU_DISABLE_BIT		3
+#define	PSR_BIG_ENDIAN_MODE		30
+#define	PSR_SUPERVISOR_MODE_BIT		31
+/*
+ * mc88110 PSR bit definitions (MVME197)
+ */
+#define PSR_GRAPHICS_DISABLE_BIT	4
+#define PSR_SERIAL_MODE_BIT		29
+#define PSR_CARRY_BIT			28
+#define PSR_SERIALIZE_BIT		25
+
+/*
+ * Status bits for an SXIP/SNIP/SFIP address.
+ */
+#define	RTE_VALID_BIT		1
+#define	RTE_ERROR_BIT		0
+
+/*
+ * Info about DMT0/DMT1/DMT2
+ */
+#define	DMT_VALID_BIT		0
+#define	DMT_WRITE_BIT		1
+#define	DMT_LOCK_BIT		12
+#define	DMT_DOUBLE_BIT		13
+#define	DMT_DAS_BIT		14
+#define	DMT_DREG_OFFSET		7
+#define	DMT_DREG_WIDTH		5
+
+/*
+ * Bits for eh_debug.
+ */
+#define	DEBUG_INTERRUPT_BIT		0
+#define	DEBUG_DATA_BIT			1
+#define	DEBUG_INSTRUCTION_BIT		2
+#define	DEBUG_MISALIGN_BIT		3
+#define	DEBUG_UNIMP_BIT			4
+#define	DEBUG_DIVIDE_BIT		5
+#define	DEBUG_OF_BIT			6
+#define	DEBUG_FPp_BIT			7
+#define	DEBUG_FPi_BIT			8
+#define	DEBUG_SYSCALL_BIT	 	9
+#define	DEBUG_MACHSYSCALL_BIT		10
+#define	DEBUG_UNIMPLEMENTED_BIT		11
+#define	DEBUG_PRIVILEGE_BIT		12
+#define	DEBUG_BOUNDS_BIT		13
+#define	DEBUG_OVERFLOW_BIT		14
+#define	DEBUG_ERROR_BIT			15
+#define	DEBUG_SIGSYS_BIT		16
+#define	DEBUG_SIGTRAP_BIT		17
+#define	DEBUG_BREAK_BIT			18
+#define	DEBUG_TRACE_BIT			19
+#define	DEBUG_KDB_BIT			20
+#define	DEBUG_JKDB_BIT			21
+#define	DEBUG_BUGCALL_BIT		22
+/* MVME197 Non-Maskable Interrupt */
+#define	DEBUG_NON_MASK_BIT		23
+/* MVME197 Data Read Miss (Software Table Searches) */
+#define	DEBUG_197_READ_BIT		25
+/* MVME197 Data Write Miss (Software Table Searches) */
+#define	DEBUG_197_WRITE_BIT		26
+/* MVME197 Inst ATC Miss (Software Table Searches) */
+#define	DEBUG_197_INST_BIT		27
+
+#define	DEBUG_UNKNOWN_BIT		31
+
+/* exception vector marker */
+#define	UNKNOWN_HANDLER		0xffffffff
+#define	END_OF_VECTOR_LIST	0xfffffffe
+
+#define	VECTOR(x) \
+	word	_C_LABEL(x)
+
+#endif	/* _KERNEL */
+
+#endif /* __MACHINE_M88K_ASM_H__ */
diff --git a/sys/arch/luna88k/include/asm_macro.h b/sys/arch/luna88k/include/asm_macro.h
new file mode 100644
index 00000000000..62e5b2465c9
--- /dev/null
+++ b/sys/arch/luna88k/include/asm_macro.h
@@ -0,0 +1,123 @@
+/*	$OpenBSD: asm_macro.h,v 1.1 2004/04/21 15:23:56 aoyama Exp $ */
+/*
+ * Mach Operating System
+ * Copyright (c) 1993-1991 Carnegie Mellon University
+ * Copyright (c) 1991 OMRON Corporation
+ * All Rights Reserved.
+ *
+ * Permission to use, copy, modify and distribute this software and its
+ * documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON AND OMRON ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION.  CARNEGIE MELLON AND OMRON DISCLAIM ANY LIABILITY OF ANY KIND
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+
+#ifndef __MACHINE_M88K_ASM_MACRO_H__
+#define __MACHINE_M88K_ASM_MACRO_H__
+
+#include <machine/asm.h>
+/*
+ * Various compiler macros used for speed and efficiency.
+ * Anyone can include.
+ */
+
+/*
+ * Flushes the data pipeline.
+ */
+#define	flush_pipeline() \
+	__asm__ __volatile__ (FLUSH_PIPELINE_STRING)
+
+/*
+ * PSR_TYPE is the type of the Process Status Register.
+ */
+typedef unsigned long m88k_psr_type;
+
+/*
+ * disable_interrupts_return_psr()
+ *
+ *    The INTERRUPT_DISABLE bit is set in the PSR and the *PREVIOUS*
+ *    PSR is returned.  Intended to be used with set_psr() [below] as in:
+ *
+ *	{
+ *	    m88k_psr_type psr;
+ *	        .
+ *	        .
+ *	    psr = disable_interrupts_return_psr();
+ *	        .
+ *   		SHORT [time-wise] CRITICAL SECTION HERE
+ *	        .
+ *	    set_psr(psr);
+ *	        .
+ *	        .
+ */
+static __inline__ m88k_psr_type disable_interrupts_return_psr(void)
+{
+	m88k_psr_type temp, oldpsr;
+	__asm__ __volatile__ ("ldcr %0, cr1" : "=r" (oldpsr));
+	__asm__ __volatile__ ("set  %1, %0, 1<1>" : "=r" (oldpsr), "=r" (temp));
+	__asm__ __volatile__ ("stcr %0, cr1" : "=r" (temp));
+	__asm__ __volatile__ (FLUSH_PIPELINE_STRING);
+	return oldpsr;
+}
+#define disable_interrupt() (void)disable_interrupts_return_psr()
+
+/*
+ * Sets the PSR. See comments above.
+ */
+static __inline__ void set_psr(m88k_psr_type psr)
+{
+	__asm__ __volatile__ ("stcr %0, cr1" :: "r" (psr));
+	__asm__ __volatile__ (FLUSH_PIPELINE_STRING);
+}
+
+/*
+ * Gets the PSR. See comments above.
+ */
+static __inline__ m88k_psr_type get_psr(void)
+{
+	m88k_psr_type psr;
+	__asm__ __volatile__ ("ldcr %0, cr1" : "=r" (psr));
+	return psr;
+}
+
+/*
+ * Enables interrupts.
+ */
+static __inline__ m88k_psr_type enable_interrupts_return_psr(void)
+{
+	m88k_psr_type temp, oldpsr; /* need a temporary register */
+	__asm__ __volatile__ ("ldcr %0, cr1" : "=r" (oldpsr));
+	__asm__ __volatile__ ("clr  %1, %0, 1<1>" : "=r" (oldpsr), "=r" (temp));
+	__asm__ __volatile__ ("stcr %0, cr1" : "=r" (temp));
+	__asm__ __volatile__ (FLUSH_PIPELINE_STRING);
+	return oldpsr;
+}
+#define enable_interrupt() (void)enable_interrupts_return_psr()
+
+#define db_enable_interrupt enable_interrupt
+#define db_disable_interrupt disable_interrupt
+
+/*
+ * Provide access from C code to the assembly instruction ff1
+ */
+static __inline__ unsigned ff1(unsigned val)
+{
+	__asm__ __volatile__ ("ff1 %0, %0" : "=r" (val) : "0" (val));
+	return val;
+}
+
+#endif /* __MACHINE_M88K_ASM_MACRO_H__ */
diff --git a/sys/arch/luna88k/include/autoconf.h b/sys/arch/luna88k/include/autoconf.h
new file mode 100644
index 00000000000..c5844f078ac
--- /dev/null
+++ b/sys/arch/luna88k/include/autoconf.h
@@ -0,0 +1,79 @@
+/*	$OpenBSD: autoconf.h,v 1.1 2004/04/21 15:23:56 aoyama Exp $ */
+/*
+ * Copyright (c) 1999, Steve Murphree, Jr.
+ * Copyright (c) 1996 Nivas Madhur
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *      This product includes software developed by Nivas Madhur.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/*
+ * Autoconfiguration information.
+ */
+
+#ifndef _MVME88K_AUTOCONF_H_
+#define _MVME88K_AUTOCONF_H_
+
+struct confargs {
+	int	ca_bustype;
+	void	*ca_vaddr;
+	void	*ca_paddr;
+	int	ca_offset;
+	int	ca_len;
+	int	ca_ipl;
+	int	ca_vec;
+	char	*ca_name;
+	void	*ca_master;	/* points to bus-dependent data */
+};
+
+#define BUS_MAIN      0
+#define BUS_MC        1
+#define BUS_PCC       2
+#define BUS_PCCTWO    3
+#define BUS_VMES      4
+#define BUS_VMEL      5
+#define BUS_SYSCON    6
+#define BUS_BUSSWITCH 7
+
+/* the following are from the prom/bootblocks */
+extern void	*bootaddr;	/* PA of boot device */
+extern int	bootpart;	/* boot partition (disk) */
+
+extern	struct device *bootdv; /* boot device */
+
+void	*mapiodev(void *pa, int size);
+void	unmapiodev(void *kva, int size);
+
+struct device *getdevunit(char *name, int unit);
+
+/* taken from NetBSD/luna68k */
+
+struct mainbus_attach_args {
+        const char *ma_name;
+        paddr_t    ma_addr;
+        int        ma_ilvl;
+};
+#endif
diff --git a/sys/arch/luna88k/include/board.h b/sys/arch/luna88k/include/board.h
new file mode 100644
index 00000000000..7ed3f905fdc
--- /dev/null
+++ b/sys/arch/luna88k/include/board.h
@@ -0,0 +1,214 @@
+/*	$OpenBSD: board.h,v 1.1 2004/04/21 15:23:56 aoyama Exp $	*/
+/*
+ * Mach Operating System
+ * Copyright (c) 1993-1991 Carnegie Mellon University
+ * Copyright (c) 1991 OMRON Corporation
+ * All Rights Reserved.
+ *
+ * Permission to use, copy, modify and distribute this software and its
+ * documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON AND OMRON ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION.  CARNEGIE MELLON AND OMRON DISCLAIM ANY LIABILITY OF ANY KIND
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+
+#ifndef __LUNA88K_BOARD_H__
+#define __LUNA88K_BOARD_H__
+
+/*
+ *      OMRON SX9100DT CPU board constants
+ */
+
+/*
+ * Something to put append a 'U' to a long constant if it's C so that
+ * it'll be unsigned in both ANSI and traditional.
+ */
+#if defined(_LOCORE)
+#define U(num)  num
+#elif defined(__STDC__)
+#define U(num)  num ## U
+#else
+#define U(num)  num/**/U
+#endif
+#define UDEFINED
+
+#define MAX_CPUS	4		/* maximum cpus on the board */
+#define MAX_CMMUS	8		/* maximum cmmus on the board */
+
+/* machtype values */
+#define LUNA_88K	1
+#define LUNA_88K2	2
+
+#define	SYSV_BASE	U(0x00000000) 	/* system virtual base */
+#define VEQR_ADDR	U(0x00000000)
+
+#define OBIO_START	U(0x41000000)
+#define OBIO_SIZE	U(0xBf000000)
+
+#define OBIO1_BASE	U(0x41000000) 	/* on board i/o 1 base */
+#define OBIO1_SPACE	U(0x1f000000) 	/* on board i/o 1 space */
+#define OBIO2_BASE	U(0x61000000) 	/* on board i/o 2 base */
+#define OBIO2_SPACE	U(0x1f000000) 	/* on board i/o 2 space */
+#define OBIO3_BASE	U(0x80000000)	/* on board i/o 3 base */
+#define OBIO3_SPACE	U(0x80000000)	/* on board i/o 3 space */
+
+#define	MAXU_ADDR	U(0x40000000) 	/* size of user virtual space */
+#define MAXPHYSMEM	U(0x10000000) 	/* max physical memory */
+
+/* #define ILLADDRESS	U(0x0F000000) */ 	/* any faulty address */
+/* #define ILLADDRESS	U(0x3FFFFFF0) */	/* any faulty address for LUNA-88K2 */
+
+#define PROM_ADDR	U(0x41000000) 	/* PROM */
+#define PROM_SPACE	U(0x00040000) 
+#define NVRAM_ADDR	U(0x45000000) 	/* Non Volatile */
+#define NVRAM_SPACE	U(0x00001FDC) 
+#define	FUSE_ROM_ADDR	U(0x43000000) 	/* FUSE_ROM */
+#define	FUSE_ROM_SPACE	        1024
+#define	OBIO_CAL_CTL	U(0x45001FE0) 	/* calendar control register */
+#define OBIO_CAL_SEC	U(0x45001FE4) 	/* seconds */
+#define OBIO_CAL_MIN	U(0x45001FE8) 	/* minutes */
+#define OBIO_CAL_HOUR	U(0x45001FEC) 	/* hours */
+#define OBIO_CAL_DOW	U(0x45001FF0) 	/* Day Of the Week */
+#define OBIO_CAL_DAY	U(0x45001FF4) 	/* days */
+#define OBIO_CAL_MON	U(0x45001FF8) 	/* months */
+#define OBIO_CAL_YEAR	U(0x45001FFC) 	/* years */
+#define OBIO_PIO0_BASE	U(0x49000000) 	/* PIO-0 */
+#define OBIO_PIO0_SPACE	U(0x0000000C) 
+#define OBIO_PIO0A	U(0x49000000) 	/* PIO-0 port A */
+#define OBIO_PIO0B	U(0x49000004) 	/* PIO-0 port B */
+#define OBIO_PIO0C	U(0x49000008) 	/* PIO-0 port C*/
+#define OBIO_PIO0	U(0x4900000C) 	/* PIO-0 control */
+#define OBIO_PIO1_BASE	U(0x4D000000) 	/* PIO-1 */
+#define OBIO_PIO1_SPACE U(0x0000000C) 
+#define OBIO_PIO1A	U(0x4D000000) 	/* PIO-1 port A */
+#define OBIO_PIO1B	U(0x4D000004) 	/* PIO-1 port B */
+#define OBIO_PIO1C	U(0x4D000008) 	/* PIO-1 port C*/
+#define OBIO_PIO1	U(0x4D00000C) 	/* PIO-1 control */
+#define OBIO_SIO	U(0x51000000) 	/* SIO */
+#define	OBIO_TAS	U(0x61000000) 	/* TAS register */
+#define OBIO_CLOCK0	U(0x63000000) 	/* system clock CPU 0 */
+#define OBIO_CLOCK1	U(0x63000004) 	/* system clock CPU 1 */
+#define OBIO_CLOCK2	U(0x63000008) 	/* system clock CPU 2 */
+#define OBIO_CLOCK3	U(0x6300000C) 	/* system clock CPU 3 */
+#define OBIO_CLK_INTR	          31	/* system clock interrupt flag */
+#define INT_ST_MASK0	U(0x65000000) 	/* interrupt status register CPU 0 */
+#define INT_ST_MASK1	U(0x65000004) 	/* interrupt status register CPU 1 */
+#define INT_ST_MASK2	U(0x65000008) 	/* interrupt status register CPU 2 */
+#define INT_ST_MASK3	U(0x6500000C) 	/* interrupt status register CPU 3 */
+#define  INT_LEVEL	           8	/* # of intrrupt level + 1 */
+#define  INT_SET_LV7	U(0x00000000) 	/* disable interrupts */
+#define  INT_SET_LV6	U(0x00000000) 	/* enable level 7 */
+#define  INT_SET_LV5	U(0x80000000) 	/* enable level 7-6 */
+#define  INT_SET_LV4	U(0xC0000000) 	/* enable level 7-5 */
+#define  INT_SET_LV3	U(0xE0000000) 	/* enable level 7-4 */
+#define  INT_SET_LV2	U(0xF0000000) 	/* enable level 7-3 */
+#define  INT_SET_LV1	U(0xF8000000) 	/* enable level 7-2 */
+#define  INT_SET_LV0	U(0xFC000000) 	/* enable interrupts */
+#define  INT_SLAVE_MASK	U(0x84000000) 	/* slave can only enable 6 and 1 */
+#define	 INT_CLOCK_MASK	0xBFFFFFFF 	/* mask clock */
+#define  INT_LV6	U(0x00800000) 	/* level 6 enebled */
+#define  INT_LV5	U(0x00400000) 	/* level 5 enebled */
+#define  INT_LV4	U(0x00200000) 	/* level 4 enebled */
+#define  INT_LV3	U(0x00100000) 	/* level 3 enebled */
+#define  INT_LV2	U(0x00080000) 	/* level 2 enebled */
+#define  INT_LV1	U(0x00040000) 	/* level 1 enebled */
+#define  INT_ST		U(0xE0000000) 	/* interrupt status */
+#define  INT_MASK_LV0	INT_LV6 | INT_LV5 | INT_LV4 | INT_LV3 | INT_LV2 | INT_LV1
+#define  INT_MASK_LV1	INT_LV6 | INT_LV5 | INT_LV4 | INT_LV3 | INT_LV2
+#define  INT_MASK_LV2	INT_LV6 | INT_LV5 | INT_LV4 | INT_LV3
+#define  INT_MASK_LV3	INT_LV6 | INT_LV5 | INT_LV4
+#define  INT_MASK_LV4	INT_LV6 | INT_LV5
+#define  INT_MASK_LV5	INT_LV6
+#define  INT_MASK_LV6	0
+#define  INT_MASK_LV7	0
+#define  SLAVE_MASK     INT_LV6 | INT_LV1
+
+#define NON_MASKABLE_LEVEL 7		/* non-maskable-interrupt (abort) */
+#define	CLOCK_INT_LEVEL	6		/* clock interrupt level */
+#define SOFT_INT_LEVEL	1		/* software interrupt level */
+#define SOFT_INT0	U(0x69000000) 	/* software interrupt CPU 0 */
+#define SOFT_INT1	U(0x69000004) 	/* software interrupt CPU 1 */
+#define SOFT_INT2	U(0x69000008) 	/* software interrupt CPU 2 */
+#define SOFT_INT3	U(0x6900000C)	/* software interrupt CPU 3 */
+#define SOFT_INT_FLAG0	U(0x6B000000) 	/* sfotware interrupt flag CPU 0 */
+#define SOFT_INT_FLAG1	U(0x6B000000) 	/* sfotware interrupt flag CPU 1 */
+#define SOFT_INT_FLAG2	U(0x6B000000) 	/* sfotware interrupt flag CPU 2 */
+#define SOFT_INT_FLAG3	U(0x6B000000) 	/* sfotware interrupt flag CPU 3  */
+#define  SOFT_INT_BIT	31		/* software interrupt flag bit */
+#define RESET_CPU0	U(0x6D000000) 	/* reset CPU 0 */
+#define RESET_CPU1	U(0x6D000004) 	/* reset CPU 1 */
+#define RESET_CPU2	U(0x6D000008)	/* reset CPU 2 */
+#define RESET_CPU3	U(0x6D00000C) 	/* reset CPU 3 */
+#define RESET_CPU_ALL	U(0x6D000010) 	/* reset ALL CPUs */
+#define TRI_PORT_RAM	U(0x71000000) 	/* 3 port RAM */
+#define TRI_PORT_RAM_SPACE	0x20000
+#define EXT_A_ADDR	U(0x81000000) 	/* extension board A */
+#define EXT_A_SPACE	U(0x02000000) 
+#define	EU_BASE		U(0x81fe0000) 	/* VME expand board */
+#define EXT_B_ADDR	U(0x83000000) 	/* extension board B */
+#define EXT_B_SPACE	U(0x01000000) 
+#define	PC_BASE		U(0x90000000) 	/* pc-98 extension board */
+#define	PC_SPACE	U(0x02000000) 
+
+#define MROM_ADDR	U(0xA1000000) 	/* Mask ROM address */
+#define MROM_SPACE		0x400000
+#define	BMAP_START	U(0xB1000000) 	/* Bitmap start address */
+#define	BMAP_SPACE	(BMAP_END - BMAP_START)
+#define BMAP_RFCNT	U(0xB1000000) 	/* RFCNT register */
+#define BMAP_BMSEL	U(0xB1040000) 	/* BMSEL register */
+#define BMAP_BMP	U(0xB1080000) 	/* common bitmap plane */
+#define BMAP_BMAP0	U(0xB10C0000) 	/* bitmap plane 0 */
+#define BMAP_BMAP1	U(0xB1100000) 	/* bitmap plane 1 */
+#define BMAP_BMAP2	U(0xB1140000) 	/* bitmap plane 2 */
+#define BMAP_BMAP3	U(0xB1180000) 	/* bitmap plane 3 */
+#define BMAP_BMAP4	U(0xB11C0000) 	/* bitmap plane 4 */
+#define BMAP_BMAP5	U(0xB1200000) 	/* bitmap plane 5 */
+#define BMAP_BMAP6	U(0xB1240000) 	/* bitmap plane 6 */
+#define BMAP_BMAP7	U(0xB1280000) 	/* bitmap plane 7 */
+#define BMAP_FN		U(0xB12C0000) 	/* common bitmap function */
+#define BMAP_FN0	U(0xB1300000) 	/* bitmap function 0 */
+#define BMAP_FN1	U(0xB1340000) 	/* bitmap function 1 */
+#define BMAP_FN2	U(0xB1380000) 	/* bitmap function 2 */
+#define BMAP_FN3	U(0xB13C0000) 	/* bitmap function 3 */
+#define BMAP_FN4	U(0xB1400000) 	/* bitmap function 4 */
+#define BMAP_FN5	U(0xB1440000) 	/* bitmap function 5 */
+#define BMAP_FN6	U(0xB1480000) 	/* bitmap function 6 */
+#define BMAP_FN7	U(0xB14C0000) 	/* bitmap function 7 */
+#define BMAP_END	U(0xB1500000) 
+#define BMAP_END24P     U(0xB1800000)   /* end of 24p framemem */
+#define BMAP_PALLET0	U(0xC0000000) 	/* color pallet */
+#define BMAP_PALLET1	U(0xC1000000) 	/* color pallet */
+#define BMAP_PALLET2	U(0xC1100000) 	/* color pallet */
+#define BOARD_CHECK_REG	U(0xD0000000) 	/* board check register */
+#define BMAP_CRTC	U(0xD1000000) 	/* CTRC-II */
+#define BMAP_IDENTROM   U(0xD1800000)   /* bitmap-boad identify ROM */
+#define SCSI_ADDR	U(0xE1000000) 	/* SCSI address */
+#define LANCE_ADDR	U(0xF1000000) 	/* LANCE */
+#define	EXT_IACK_ADDR	0xFFFFFFF7 	/* IACK Space for Extended Board */
+
+#define	VDMA_STD(x)	((int)(x))
+
+#define CMMU_I0		U(0xFFF07000) 	/* CMMU instruction cpu 0 */
+#define CMMU_D0		U(0xFFF06000) 	/* CMMU data cpu 0 */
+#define CMMU_I1		U(0xFFF05000) 	/* CMMU instruction cpu 1 */
+#define CMMU_D1		U(0xFFF04000) 	/* CMMU data cpu 1 */
+#define CMMU_I2		U(0xFFF03000) 	/* CMMU instruction cpu 2 */
+#define CMMU_D2		U(0xFFF02000) 	/* CMMU data cpu 2 */
+#define CMMU_I3		U(0xFFF01000) 	/* CMMU instruction cpu 3 */
+#define CMMU_D3		U(0xFFF00000) 	/* CMMU data cpu 3 */
+
+#endif /* __LUNA88K_BOARD_H__ */
diff --git a/sys/arch/luna88k/include/bus.h b/sys/arch/luna88k/include/bus.h
new file mode 100644
index 00000000000..a0debb18345
--- /dev/null
+++ b/sys/arch/luna88k/include/bus.h
@@ -0,0 +1,632 @@
+/*	$OpenBSD: bus.h,v 1.1 2004/04/21 15:23:56 aoyama Exp $	*/
+/*	$NetBSD: bus.h,v 1.9 1998/01/13 18:32:15 scottr Exp $	*/
+
+/*-
+ * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
+ * NASA Ames Research Center.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the NetBSD
+ *	Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (C) 1997 Scott Reynolds.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/* almost same as OpenBSD/mac68k */
+
+#ifndef _LUNA88K_BUS_H_
+#define _LUNA88K_BUS_H_
+
+/*
+ * Value for the luna88k bus space tag, not to be used directly by MI code.
+ */
+#define LUNA88K_BUS_SPACE_MEM	0	/* space is mem space */
+
+/*
+ * Bus address and size types
+ */
+typedef u_long bus_addr_t;
+typedef u_long bus_size_t;
+
+/*
+ * Access methods for bus resources and address space.
+ */
+typedef int	bus_space_tag_t;
+typedef u_long	bus_space_handle_t;
+
+/*
+ *	int bus_space_map(bus_space_tag_t t, bus_addr_t addr,
+ *	    bus_size_t size, int flags, bus_space_handle_t *bshp);
+ *
+ * Map a region of bus space.
+ */
+
+#define	BUS_SPACE_MAP_CACHEABLE		0x01
+#define	BUS_SPACE_MAP_LINEAR		0x02
+
+int	bus_space_map(bus_space_tag_t, bus_addr_t, bus_size_t,
+	    int, bus_space_handle_t *);
+
+/*
+ *	void bus_space_unmap(bus_space_tag_t t,
+ *	    bus_space_handle_t bsh, bus_size_t size);
+ *
+ * Unmap a region of bus space.
+ */
+
+void	bus_space_unmap(bus_space_tag_t, bus_space_handle_t, bus_size_t);
+
+/*
+ *	int bus_space_subregion(bus_space_tag_t t,
+ *	    bus_space_handle_t bsh, bus_size_t offset, bus_size_t size,
+ *	    bus_space_handle_t *nbshp);
+ *
+ * Get a new handle for a subregion of an already-mapped area of bus space.
+ */
+
+int	bus_space_subregion(bus_space_tag_t t, bus_space_handle_t bsh,
+	    bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp);
+
+/*
+ *	int bus_space_alloc(bus_space_tag_t t, bus_addr_t, rstart,
+ *	    bus_addr_t rend, bus_size_t size, bus_size_t align,
+ *	    bus_size_t boundary, int flags, bus_addr_t *addrp,
+ *	    bus_space_handle_t *bshp);
+ *
+ * Allocate a region of bus space.
+ */
+
+int	bus_space_alloc(bus_space_tag_t t, bus_addr_t rstart,
+	    bus_addr_t rend, bus_size_t size, bus_size_t align,
+	    bus_size_t boundary, int cacheable, bus_addr_t *addrp,
+	    bus_space_handle_t *bshp);
+
+/*
+ *	int bus_space_free(bus_space_tag_t t,
+ *	    bus_space_handle_t bsh, bus_size_t size);
+ *
+ * Free a region of bus space.
+ */
+
+void	bus_space_free(bus_space_tag_t t, bus_space_handle_t bsh,
+	    bus_size_t size);
+
+/*
+ *	int luna88k_bus_space_probe(bus_space_tag_t t,
+ *	    bus_space_handle_t bsh, bus_size_t offset, int sz);
+ *
+ * Probe the bus at t/bsh/offset, using sz as the size of the load.
+ *
+ * This is a machine-dependent extension, and is not to be used by
+ * machine-independent code.
+ */
+
+int	luna88k_bus_space_probe(bus_space_tag_t t,
+	    bus_space_handle_t bsh, bus_size_t offset, int sz);
+
+/*
+ *	u_intN_t bus_space_read_N(bus_space_tag_t tag,
+ *	    bus_space_handle_t bsh, bus_size_t offset);
+ *
+ * Read a 1, 2, 4, or 8 byte quantity from bus space
+ * described by tag/handle/offset.
+ */
+
+#define	bus_space_read_1(t, h, o)					\
+    ((void) t, (*(volatile u_int8_t *)((h) + 4 * (o))))
+
+#define	bus_space_read_2(t, h, o)					\
+    ((void) t, (*(volatile u_int16_t *)((h) + 4 * (o))))
+
+#define	bus_space_read_4(t, h, o)					\
+    ((void) t, (*(volatile u_int32_t *)((h) + 4 * (o))))
+
+#if 0	/* Cause a link error for bus_space_read_8 */
+#define	bus_space_read_8(t, h, o)	!!! bus_space_read_8 unimplemented !!!
+#endif
+
+/*
+ *	void bus_space_read_multi_N(bus_space_tag_t tag,
+ *	    bus_space_handle_t bsh, bus_size_t offset,
+ *	    u_intN_t *addr, size_t count);
+ *
+ * Read `count' 1, 2, 4, or 8 byte quantities from bus space
+ * described by tag/handle/offset and copy into buffer provided.
+ */
+
+#define	bus_space_read_multi_1(t, h, o, a, c) do {			\
+	(void) t;							\
+	__asm __volatile ("						\
+		or	r10, r0, %0				;	\
+		or	r11, r0, %1				;	\
+		or	r12, r0, %2				;	\
+	1:	ld.bu	r13, r10, 0				;	\
+		st.b	r13, r11, 0				;	\
+		add	r11, r11, 1				;	\
+		bcnd.n	ne0, r12, 1b				;	\
+		 sub	r12, r12, 1"				:	\
+								:	\
+		    "r" ((h) + 4 * (o)), "r" (a), "r" (c)	:	\
+		    "r10", "r11", "r12", "r13");			\
+} while (0);
+
+#define	bus_space_read_multi_2(t, h, o, a, c) do {			\
+	(void) t;							\
+	__asm __volatile ("						\
+		or	r10, r0, %0				;	\
+		or	r11, r0, %1				;	\
+		or	r12, r0, %2				;	\
+	1:	ld.hu	r13, r10, 0				;	\
+		st.hu	r13, r11, 0				;	\
+		add	r11, r11, 2				;	\
+		bcnd.n	ne0, r12, 1b				;	\
+		 sub	r12, r12, 1"				:	\
+								:	\
+		    "r" ((h) + 4 * (o)), "r" (a), "r" (c)	:	\
+		    "r10", "r11", "r12", "r13");			\
+} while (0);
+
+#define	bus_space_read_multi_4(t, h, o, a, c) do {			\
+	(void) t;							\
+	__asm __volatile ("						\
+		or	r10, r0, %0				;	\
+		or	r11, r0, %1				;	\
+		or	r12, r0, %2				;	\
+	1:	ld	r13, r10, 0				;	\
+		st	r13, r11, 0				;	\
+		add	r11, r11, 4				;	\
+		bcnd.n	ne0, r12, 1b				;	\
+		 sub	r12, r12, 1"				:	\
+								:	\
+		    "r" ((h) + 4 * (o)), "r" (a), "r" (c)	:	\
+		    "r10", "r11", "r12", "r13");			\
+} while (0);
+
+#if 0	/* Cause a link error for bus_space_read_multi_8 */
+#define	bus_space_read_multi_8	!!! bus_space_read_multi_8 unimplemented !!!
+#endif
+
+/*
+ *	void bus_space_read_region_N(bus_space_tag_t tag,
+ *	    bus_space_handle_t bsh, bus_size_t offset,
+ *	    u_intN_t *addr, size_t count);
+ *
+ * Read `count' 1, 2, 4, or 8 byte quantities from bus space
+ * described by tag/handle and starting at `offset' and copy into
+ * buffer provided.
+ */
+
+#define	bus_space_read_region_1(t, h, o, a, c) do {			\
+	(void) t;							\
+	__asm __volatile ("						\
+		or	r10, r0, %0				;	\
+		or	r11, r0, %1				;	\
+		or	r12, r0, %2				;	\
+	1:	ld.bu	r13, r10, 0				;	\
+		st.b	r13, r11, 0				;	\
+		add	r10, r10, 4				;	\
+		add	r11, r11, 1				;	\
+		bcnd.n	ne0, r12, 1b				;	\
+		 sub	r12, r12, 1"				:	\
+								:	\
+		    "r" ((h) + 4 * (o)), "r" (a), "r" (c)	:	\
+		    "r10", "r11", "r12", "r13");			\
+} while (0);
+
+#define	bus_space_read_region_2(t, h, o, a, c) do {			\
+	(void) t;							\
+	__asm __volatile ("						\
+		or	r10, r0, %0				;	\
+		or	r11, r0, %1				;	\
+		or	r12, r0, %2				;	\
+	1:	ld.hu	r13, r10, 0				;	\
+		st.hu	r13, r11, 0				;	\
+		add	r10, r10, 4				;	\
+		add	r11, r11, 2				;	\
+		bcnd.n	ne0, r12, 1b				;	\
+		 sub	r12, r12, 1"				:	\
+								:	\
+		    "r" ((h) + 4 * (o)), "r" (a), "r" (c)	:	\
+		    "r10", "r11", "r12", "r13");			\
+} while (0);
+
+#define	bus_space_read_region_4(t, h, o, a, c) do {			\
+	(void) t;							\
+	__asm __volatile ("						\
+		or	r10, r0, %0				;	\
+		or	r11, r0, %1				;	\
+		or	r12, r0, %2				;	\
+	1:	ld	r13, r10, 0				;	\
+		st	r13, r11, 0				;	\
+		add	r10, r10, 4				;	\
+		add	r11, r11, 4				;	\
+		bcnd.n	ne0, r12, 1b				;	\
+		 sub	r12, r12, 1"				:	\
+								:	\
+		    "r" ((h) + 4 * (o)), "r" (a), "r" (c)	:	\
+		    "r10", "r11", "r12", "r13");			\
+} while (0);
+
+#if 0	/* Cause a link error for bus_space_read_region_8 */
+#define	bus_space_read_region_8	!!! bus_space_read_region_8 unimplemented !!!
+#endif
+
+/*
+ *	void bus_space_write_N(bus_space_tag_t tag,
+ *	    bus_space_handle_t bsh, bus_size_t offset,
+ *	    u_intN_t value);
+ *
+ * Write the 1, 2, 4, or 8 byte value `value' to bus space
+ * described by tag/handle/offset.
+ */
+
+#define	bus_space_write_1(t, h, o, v)					\
+    ((void) t, ((void)(*(volatile u_int8_t *)((h) + 4 * (o)) = (v))))
+
+#define	bus_space_write_2(t, h, o, v)					\
+    ((void) t, ((void)(*(volatile u_int16_t *)((h) + 4 * (o)) = (v))))
+
+#define	bus_space_write_4(t, h, o, v)					\
+    ((void) t, ((void)(*(volatile u_int32_t *)((h) + 4 * (o)) = (v))))
+
+#if 0	/* Cause a link error for bus_space_write_8 */
+#define	bus_space_write_8	!!! bus_space_write_8 not implemented !!!
+#endif
+
+/*
+ *	void bus_space_write_multi_N(bus_space_tag_t tag,
+ *	    bus_space_handle_t bsh, bus_size_t offset,
+ *	    const u_intN_t *addr, size_t count);
+ *
+ * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
+ * provided to bus space described by tag/handle/offset.
+ */
+
+#define	bus_space_write_multi_1(t, h, o, a, c) do {			\
+	(void) t;							\
+	__asm __volatile ("						\
+		or	r10, r0, %0				;	\
+		or	r11, r0, %1				;	\
+		or	r12, r0, %2				;	\
+	1:	ld.bu	r13, r11, 0				;	\
+		st.b	r13, r10, 0				;	\
+		add	r11, r11, 1				;	\
+		bcnd.n	ne0, r12, 1b				;	\
+		 sub	r12, r12, 1"				:	\
+								:	\
+		    "r" ((h) + 4 * (o)), "r" (a), "r" (c)	:	\
+		    "r10", "r11", "r12", "r13");			\
+} while (0);
+
+#define	bus_space_write_multi_2(t, h, o, a, c) do {			\
+	(void) t;							\
+	__asm __volatile ("						\
+		or	r10, r0, %0				;	\
+		or	r11, r0, %1				;	\
+		or	r12, r0, %2				;	\
+	1:	ld.hu	r13, r11, 0				;	\
+		st.hu	r13, r10, 0				;	\
+		add	r11, r11, 2				;	\
+		bcnd.n	ne0, r12, 1b				;	\
+		 sub	r12, r12, 1"				:	\
+								:	\
+		    "r" ((h) + 4 * (o)), "r" (a), "r" (c)	:	\
+		    "r10", "r11", "r12", "r13");			\
+} while (0);
+
+#define	bus_space_write_multi_4(t, h, o, a, c) do {			\
+	(void) t;							\
+	__asm __volatile ("						\
+		or	r10, r0, %0				;	\
+		or	r11, r0, %1				;	\
+		or	r12, r0, %2				;	\
+	1:	ld	r13, r11, 0				;	\
+		st	r13, r10, 0				;	\
+		add	r11, r11, 4				;	\
+		bcnd.n	ne0, r12, 1b				;	\
+		 sub	r12, r12, 1"				:	\
+								:	\
+		    "r" ((h) + 4 * (o)), "r" (a), "r" (c)	:	\
+		    "r10", "r11", "r12", "r13");			\
+} while (0);
+
+#if 0	/* Cause a link error for bus_space_write_8 */
+#define	bus_space_write_multi_8(t, h, o, a, c)				\
+			!!! bus_space_write_multi_8 unimplemented !!!
+#endif
+
+/*
+ *	void bus_space_write_region_N(bus_space_tag_t tag,
+ *	    bus_space_handle_t bsh, bus_size_t offset,
+ *	    const u_intN_t *addr, size_t count);
+ *
+ * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
+ * to bus space described by tag/handle starting at `offset'.
+ */
+
+#define	bus_space_write_region_1(t, h, o, a, c) do {			\
+	(void) t;							\
+	__asm __volatile ("						\
+		or	r10, r0, %0				;	\
+		or	r11, r0, %1				;	\
+		or	r12, r0, %2				;	\
+	1:	ld.bu	r13, r11, 0				;	\
+		st.b	r13, r10, 0				;	\
+		add	r10, r10, 4				;	\
+		add	r11, r11, 1				;	\
+		bcnd.n	ne0, r12, 1b				;	\
+		 sub	r12, r12, 1"				:	\
+								:	\
+		    "r" ((h) + 4 * (o)), "r" (a), "r" (c)	:	\
+		    "r10", "r11", "r12", "r13");			\
+} while (0);
+
+#define	bus_space_write_region_2(t, h, o, a, c) do {			\
+	(void) t;							\
+	__asm __volatile ("						\
+		or	r10, r0, %0				;	\
+		or	r11, r0, %1				;	\
+		or	r12, r0, %2				;	\
+	1:	ld.hu	r13, r11, 0				;	\
+		st.hu	r13, r10, 0				;	\
+		add	r10, r10, 4				;	\
+		add	r11, r11, 2				;	\
+		bcnd.n	ne0, r12, 1b				;	\
+		 sub	r12, r12, 1"				:	\
+								:	\
+		    "r" ((h) + 4 * (o)), "r" (a), "r" (c)	:	\
+		    "r10", "r11", "r12", "r13");			\
+} while (0);
+
+#define	bus_space_write_region_4(t, h, o, a, c) do {			\
+	(void) t;							\
+	__asm __volatile ("						\
+		or	r10, r0, %0				;	\
+		or	r11, r0, %1				;	\
+		or	r12, r0, %2				;	\
+	1:	ld	r13, r11, 0				;	\
+		st	r13, r10, 0				;	\
+		add	r10, r10, 4				;	\
+		add	r11, r11, 4				;	\
+		bcnd.n	ne0, r12, 1b				;	\
+		 sub	r12, r12, 1"				:	\
+								:	\
+		    "r" ((h) + 4 * (o)), "r" (a), "r" (c)	:	\
+		    "r10", "r11", "r12", "r13");			\
+} while (0);
+
+#if 0	/* Cause a link error for bus_space_write_region_8 */
+#define	bus_space_write_region_8					\
+			!!! bus_space_write_region_8 unimplemented !!!
+#endif
+
+/*
+ *	void bus_space_set_multi_N(bus_space_tag_t tag,
+ *	    bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
+ *	    size_t count);
+ *
+ * Write the 1, 2, 4, or 8 byte value `val' to bus space described
+ * by tag/handle/offset `count' times.
+ */
+
+#define	bus_space_set_multi_1(t, h, o, val, c) do {			\
+	(void) t;							\
+	__asm __volatile ("						\
+		or	r10, r0, %0				;	\
+		or	r11, r0, %1				;	\
+		or	r12, r0, %2				;	\
+	1:	st.b	r11, r10, 0				;	\
+		bcnd.n	ne0, r12, 1b				;	\
+		 sub	r12, r12, 1"				:	\
+								:	\
+		    "r" ((h) + 4 * (o)), "r" (val), "r" (c)	:	\
+		    "r10", "r11", "r12");				\
+} while (0);
+
+#define	bus_space_set_multi_2(t, h, o, val, c) do {			\
+	(void) t;							\
+	__asm __volatile ("						\
+		or	r10, r0, %0				;	\
+		or	r11, r0, %1				;	\
+		or	r12, r0, %2				;	\
+	1:	st.hu	r11, r10, 0				;	\
+		bcnd.n	ne0, r12, 1b				;	\
+		 sub	r12, r12, 1"				:	\
+								:	\
+		    "r" ((h) + 4 * (o)), "r" (val), "r" (c)	:	\
+		    "r10", "r11", "r12");				\
+} while (0);
+
+#define	bus_space_set_multi_4(t, h, o, val, c) do {			\
+	(void) t;							\
+	__asm __volatile ("						\
+		or	r10, r0, %0				;	\
+		or	r11, r0, %1				;	\
+		or	r12, r0, %2				;	\
+	1:	st	r11, r10, 0				;	\
+		bcnd.n	ne0, r12, 1b				;	\
+		 sub	r12, r12, 1"				:	\
+								:	\
+		    "r" ((h) + 4 * (o)), "r" (val), "r" (c)	:	\
+		    "r10", "r11", "r12");				\
+} while (0);
+
+#if 0	/* Cause a link error for bus_space_set_multi_8 */
+#define	bus_space_set_multi_8						\
+			!!! bus_space_set_multi_8 unimplemented !!!
+#endif
+
+/*
+ *	void bus_space_set_region_N(bus_space_tag_t tag,
+ *	    bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
+ *	    size_t count);
+ *
+ * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
+ * by tag/handle starting at `offset'.
+ */
+
+#define	bus_space_set_region_1(t, h, o, val, c) do {			\
+	(void) t;							\
+	__asm __volatile ("						\
+		or	r10, r0, %0				;	\
+		or	r11, r0, %1				;	\
+		or	r12, r0, %2				;	\
+	1:	st.b	r11, r10, 0				;	\
+		add	r10, r10, 4
+		bcnd.n	ne0, r12, 1b				;	\
+		 sub	r12, r12, 1"				:	\
+								:	\
+		    "r" ((h) + 4 * (o)), "r" (val), "r" (c)	:	\
+		    "r10", "r11", "r12");				\
+} while (0);
+
+#define	bus_space_set_region_2(t, h, o, val, c) do {			\
+	(void) t;							\
+	__asm __volatile ("						\
+		or	r10, r0, %0				;	\
+		or	r11, r0, %1				;	\
+		or	r12, r0, %2				;	\
+	1:	st.hu	r11, r10, 0				;	\
+		add	r10, r10, 4
+		bcnd.n	ne0, r12, 1b				;	\
+		 sub	r12, r12, 1"				:	\
+								:	\
+		    "r" ((h) + 4 * (o)), "r" (val), "r" (c)	:	\
+		    "r10", "r11", "r12");				\
+} while (0);
+
+#define	bus_space_set_region_4(t, h, o, val, c) do {			\
+	(void) t;							\
+	__asm __volatile ("						\
+		or	r10, r0, %0				;	\
+		or	r11, r0, %1				;	\
+		or	r12, r0, %2				;	\
+	1:	st	r11, r10, 0				;	\
+		add	r10, r10, 4
+		bcnd.n	ne0, r12, 1b				;	\
+		 sub	r12, r12, 1"				:	\
+								:	\
+		    "r" ((h) + 4 * (o)), "r" (val), "r" (c)	:	\
+		    "r10", "r11", "r12");				\
+} while (0);
+
+#if 0	/* Cause a link error for bus_space_set_region_8 */
+#define	bus_space_set_region_8						\
+			!!! bus_space_set_region_8 unimplemented !!!
+#endif
+
+/*
+ *	void bus_space_copy_N(bus_space_tag_t tag,
+ *	    bus_space_handle_t bsh1, bus_size_t off1,
+ *	    bus_space_handle_t bsh2, bus_size_t off2,
+ *	    size_t count);
+ *
+ * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
+ * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
+ */
+
+#define	__LUNA88K_copy_region_N(BYTES)					\
+static __inline void __CONCAT(bus_space_copy_region_,BYTES)		\
+	    (bus_space_tag_t,						\
+	    bus_space_handle_t bsh1, bus_size_t off1,			\
+	    bus_space_handle_t bsh2, bus_size_t off2,			\
+	    bus_size_t count);						\
+									\
+static __inline void							\
+__CONCAT(bus_space_copy_region_,BYTES)(t, h1, o1, h2, o2, c)		\
+	bus_space_tag_t t;						\
+	bus_space_handle_t h1, h2;					\
+	bus_size_t o1, o2, c;						\
+{									\
+	bus_size_t o;							\
+									\
+	if ((h1 + o1) >= (h2 + o2)) {					\
+		/* src after dest: copy forward */			\
+		for (o = 0; c != 0; c--, o += BYTES)			\
+			__CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o,	\
+			    __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \
+	} else {							\
+		/* dest after src: copy backwards */			\
+		for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES)	\
+			__CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o,	\
+			    __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \
+	}								\
+}
+__LUNA88K_copy_region_N(1)
+__LUNA88K_copy_region_N(2)
+__LUNA88K_copy_region_N(4)
+#if 0	/* Cause a link error for bus_space_copy_8 */
+#define	bus_space_copy_8						\
+			!!! bus_space_copy_8 unimplemented !!!
+#endif
+
+#undef __LUNA88K_copy_region_N
+
+/*
+ * Bus read/write barrier methods.
+ *
+ *	void bus_space_barrier(bus_space_tag_t tag,
+ *	    bus_space_handle_t bsh, bus_size_t offset,
+ *	    bus_size_t len, int flags);
+ *
+ * Note: the 680x0 does not currently require barriers, but we must
+ * provide the flags to MI code.
+ */
+#define	bus_space_barrier(t, h, o, l, f)	\
+	((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))
+#define	BUS_SPACE_BARRIER_READ	0x01		/* force read barrier */
+#define	BUS_SPACE_BARRIER_WRITE	0x02		/* force write barrier */
+
+#endif /* _LUNA88K_BUS_H_ */
diff --git a/sys/arch/luna88k/include/cdefs.h b/sys/arch/luna88k/include/cdefs.h
new file mode 100644
index 00000000000..3eb37b6b943
--- /dev/null
+++ b/sys/arch/luna88k/include/cdefs.h
@@ -0,0 +1,40 @@
+/*	$OpenBSD: cdefs.h,v 1.1 2004/04/21 15:23:56 aoyama Exp $ */
+/*	$NetBSD: cdefs.h,v 1.2 1995/03/23 20:10:48 jtc Exp $	*/
+
+/*
+ * Written by J.T. Conklin <jtc@wimsey.com> 01/17/95.
+ * Public domain.
+ */
+
+#ifndef	__MACHINE_CDEFS_H__
+#define	__MACHINE_CDEFS_H__
+
+#ifdef __STDC__
+#define	_C_LABEL(name)		_ ## name
+#else
+#define	_C_LABEL(name)		_/**/name
+#endif
+
+#ifdef __GNUC__
+#ifdef __STDC__
+#define __indr_reference(sym,alias)	\
+	__asm__(".stabs \"_" #alias "\",11,0,0,0");	\
+	__asm__(".stabs \"_" #sym "\",1,0,0,0")
+#define __warn_references(sym,msg)	\
+	__asm__(".stabs \"" msg "\",30,0,0,0");		\
+	__asm__(".stabs \"_" #sym "\",1,0,0,0")
+#define __weak_alias(alias,sym)				\
+	__asm__(".weak _" #alias "; _" #alias "= _" __STRING(sym))
+#else
+#define __indr_reference(sym,alias)	\
+	__asm__(".stabs \"_/**/alias\",11,0,0,0");	\
+	__asm__(".stabs \"_/**/sym\",1,0,0,0")
+#define __warn_references(sym,msg)	\
+	__asm__(".stabs msg,30,0,0,0");			\
+	__asm__(".stabs \"_/**/sym\",1,0,0,0")
+#define __weak_alias(alias,sym)				\
+	__asm__(".weak _/**/alias; _/**/alias = _/**/sym")
+#endif
+#endif
+
+#endif /* __MACHINE_CDEFS_H__ */
diff --git a/sys/arch/luna88k/include/cmmu.h b/sys/arch/luna88k/include/cmmu.h
new file mode 100644
index 00000000000..95cc42031a2
--- /dev/null
+++ b/sys/arch/luna88k/include/cmmu.h
@@ -0,0 +1,103 @@
+/*	$OpenBSD: cmmu.h,v 1.1 2004/04/21 15:23:56 aoyama Exp $ */
+/*
+ * Mach Operating System
+ * Copyright (c) 1993-1992 Carnegie Mellon University
+ * All Rights Reserved.
+ *
+ * Permission to use, copy, modify and distribute this software and its
+ * documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
+ * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie Mellon
+ * the rights to redistribute these changes.
+ */
+
+#ifndef	_MACHINE_CMMU_H_
+#define	_MACHINE_CMMU_H_
+
+#include <machine/mmu.h>
+
+#ifndef	_LOCORE
+/*
+ * Prototypes and stuff for cmmu.c.
+ */
+extern unsigned cpu_sets[MAX_CPUS];
+extern unsigned master_cpu;
+extern int max_cpus, max_cmmus;
+
+/*
+ * This lock protects the cmmu SAR and SCR's; other ports
+ * can be accessed without locking it
+ *
+ * May be used from "db_interface.c".
+ */
+extern struct simplelock cmmu_cpu_lock;
+
+#define CMMU_LOCK   simple_lock(&cmmu_cpu_lock)
+#define CMMU_UNLOCK simple_unlock(&cmmu_cpu_lock)
+
+/* machine dependent cmmu function pointer structure */
+struct cmmu_p {
+	void (*cmmu_init_func)(void);
+	void (*setup_board_config_func)(void);
+	void (*cpu_configuration_print_func)(int);
+	void (*cmmu_shutdown_now_func)(void);
+	void (*cmmu_parity_enable_func)(void);
+	unsigned (*cmmu_cpu_number_func)(void);
+	void (*cmmu_set_sapr_func)(unsigned, unsigned);
+	void (*cmmu_set_uapr_func)(unsigned);
+	void (*cmmu_set_pair_batc_entry_func)(unsigned, unsigned, unsigned);
+	void (*cmmu_flush_tlb_func)(unsigned, unsigned, vaddr_t, vsize_t);
+	void (*cmmu_pmap_activate_func)(unsigned, unsigned,
+	    u_int32_t i_batc[BATC_MAX], u_int32_t d_batc[BATC_MAX]);
+	void (*cmmu_flush_cache_func)(int, paddr_t, psize_t);
+	void (*cmmu_flush_inst_cache_func)(int, paddr_t, psize_t);
+	void (*cmmu_flush_data_cache_func)(int, paddr_t, psize_t);
+	void (*dma_cachectl_func)(vaddr_t, vsize_t, int);
+	/* DDB only */
+	void (*cmmu_dump_config_func)(void);
+	void (*cmmu_show_translation_func)(unsigned, unsigned, unsigned, int);
+	/* DEBUG only */
+	void (*show_apr_func)(unsigned);
+};
+
+/* THE pointer! */
+extern struct cmmu_p *cmmu;
+
+/* The macros... */
+#define cmmu_init		(cmmu->cmmu_init_func)
+#define setup_board_config	(cmmu->setup_board_config_func)
+#define	cpu_configuration_print(a)	(cmmu->cpu_configuration_print_func)(a)
+#define	cmmu_shutdown_now	(cmmu->cmmu_shutdown_now_func)
+#define	cmmu_parity_enable	(cmmu->cmmu_parity_enable_func)
+#define	cmmu_cpu_number		(cmmu->cmmu_cpu_number_func)
+#define	cmmu_set_sapr(a, b)	(cmmu->cmmu_set_sapr_func)(a, b)
+#define	cmmu_set_uapr(a)	(cmmu->cmmu_set_uapr_func)(a)
+#define	cmmu_set_pair_batc_entry(a, b, c)	(cmmu->cmmu_set_pair_batc_entry_func)(a, b, c)
+#define	cmmu_flush_tlb(a, b, c, d) 	(cmmu->cmmu_flush_tlb_func)(a, b, c, d)
+#define	cmmu_pmap_activate(a, b, c, d) 	(cmmu->cmmu_pmap_activate_func)(a, b, c, d)
+#define	cmmu_flush_cache(a, b, c)	(cmmu->cmmu_flush_cache_func)(a, b, c)
+#define	cmmu_flush_inst_cache(a, b, c)	(cmmu->cmmu_flush_inst_cache_func)(a, b, c)
+#define	cmmu_flush_data_cache(a, b, c)	(cmmu->cmmu_flush_data_cache_func)(a, b, c)
+#define	dma_cachectl(a, b, c)	(cmmu->dma_cachectl_func)(a, b, c)
+#define	cmmu_dump_config	(cmmu->cmmu_dump_config_func)
+#define	cmmu_show_translation(a, b, c, d)	(cmmu->cmmu_show_translation_func)(a, b, c, d)
+#define show_apr(ap)		(cmmu->show_apr_func)(ap)
+
+#endif	/* _LOCORE */
+
+#endif	/* _MACHINE_CMMU_H_ */
+
diff --git a/sys/arch/luna88k/include/cpu.h b/sys/arch/luna88k/include/cpu.h
new file mode 100644
index 00000000000..ef11194964a
--- /dev/null
+++ b/sys/arch/luna88k/include/cpu.h
@@ -0,0 +1,198 @@
+/*	$OpenBSD: cpu.h,v 1.1 2004/04/21 15:23:57 aoyama Exp $ */
+/*
+ * Copyright (c) 1996 Nivas Madhur
+ * Copyright (c) 1992, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This software was developed by the Computer Systems Engineering group
+ * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
+ * contributed to Berkeley.
+ *
+ * All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ *	This product includes software developed by the University of
+ *	California, Lawrence Berkeley Laboratory.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef __MACHINE_CPU_H__
+#define __MACHINE_CPU_H__
+
+/*
+ * CTL_MACHDEP definitinos.
+ */
+#define	CPU_CONSDEV	1	/* dev_t: console terminal device */
+#define	CPU_MAXID	2	/* number of valid machdep ids */
+
+#define	CTL_MACHDEP_NAMES { \
+	{ 0, 0 }, \
+	{ "console_device", CTLTYPE_STRUCT }, \
+}
+
+#ifdef _KERNEL
+
+#include <machine/psl.h>
+#include <machine/pcb.h>
+#include <machine/board.h>
+
+/*
+ * definitions of cpu-dependent requirements
+ * referenced in generic code
+ */
+#define	cpu_exec(p)	/* nothing */
+#define	cpu_wait(p)	/* nothing */
+#define	cpu_swapout(p)	/* nothing */
+
+/*
+ * Arguments to hardclock and gatherstats encapsulate the previous
+ * machine state in an opaque clockframe. CLKF_INTR is only valid
+ * if the process is in kernel mode. Clockframe is really trapframe,
+ * so pointer to clockframe can be safely cast into a pointer to
+ * trapframe.
+ */
+struct clockframe {
+	struct trapframe tf;
+};
+
+#define	CLKF_USERMODE(framep)	((((struct trapframe *)(framep))->tf_epsr & PSR_MODE) == 0)
+#define	CLKF_PC(framep)		(((struct trapframe *)(framep))->tf_sxip & XIP_ADDR)
+#define	CLKF_INTR(framep)	(((struct trapframe *)(framep))->tf_r[31] >= UADDR)
+
+/*
+ * Get interrupt glue.
+ */
+#include <machine/intr.h>
+
+/*
+ * Internal IO space (iiomapsize).
+ *
+ * Internal IO space is mapped in the kernel from ``OBIO_START'' to
+ * ``intiolimit'' (defined in locore.s).  Since it is always mapped,
+ * conversion between physical and kernel virtual addresses is easy.
+ */
+
+#ifdef VIRTMAP
+/* This will do non 1:1 phys/virt memory mapping in the future - SPM */
+#define	ISIIOVA(va) \
+	((char *)(va) >= intiobase && (char *)(va) < intiolimit)
+#define	IIOV(pa)	((int)(pa)-(int)iiomapbase+(int)intiobase)
+#define	IIOP(va)	((int)(va)-(int)intiobase+(int)iiomapbase)
+#define	IIOPOFF(pa)	((int)(pa)-(int)iiomapbase)
+
+#else
+
+#define	ISIIOVA(va) 1
+#define	IIOV(pa)	((pa))
+#define	IIOP(va)	((va))
+#define	IIOPOFF(pa)	((int)(pa)-(int)OBIO_START)
+#endif
+
+#define SIR_NET		1
+#define SIR_CLOCK	2
+
+#define setsoftint(x)	(ssir |= (x))
+#define setsoftnet()	(ssir |= SIR_NET)
+#define setsoftclock()	(ssir |= SIR_CLOCK)
+
+#define siroff(x)	(ssir &= ~x)
+
+extern int	ssir;
+extern int	want_ast;
+
+/*
+ * Preempt the current process if in interrupt from user mode,
+ * or after the current trap/syscall if in system mode.
+ */
+extern int	want_resched;		/* resched() was called */
+#define	need_resched()		(want_resched = 1, want_ast = 1)
+
+/*
+ * Give a profiling tick to the current process when the user profiling
+ * buffer pages are invalid.  On the sparc, request an ast to send us
+ * through trap(), marking the proc as needing a profiling tick.
+ */
+#define	need_proftick(p)	((p)->p_flag |= P_OWEUPC, want_ast = 1)
+
+/*
+ * Notify the current process (p) that it has a signal pending,
+ * process as soon as possible.
+ */
+#define	signotify(p)		(want_ast = 1)
+
+struct intrhand {
+	int	(*ih_fn)(void *);
+	void	*ih_arg;
+	int	ih_ipl;
+	int	ih_wantframe;
+	struct	intrhand *ih_next;
+};
+
+int	intr_establish(int vec, struct intrhand *);
+
+/*
+ * return values for intr_establish()
+ */
+
+#define INTR_EST_SUCC 		0
+#define INTR_EST_BADVEC		1
+#define INTR_EST_BADIPL		2
+
+
+/*
+ * There are 256 possible vectors on a MVME1x7 platform (including
+ * onboard and VME vectors. Use intr_establish() to register a
+ * handler for the given vector. vector number is used to index
+ * into the intr_handlers[] table.
+ */
+extern struct intrhand *intr_handlers[256];
+
+/*
+ * switchframe - should be double word aligned.
+ */
+struct switchframe {
+	u_int	sf_pc;			/* pc */
+	void	*sf_proc;		/* proc pointer */
+};
+
+/* This struct defines the machine dependent pointers */
+struct md_p {
+	void (*clock_init_func)(void);      /* interval clock init function */
+	void (*statclock_init_func)(void);  /* statistics clock init function */
+	void (*delayclock_init_func)(void); /* delay clock init function */
+	void (*delay_func)(void);           /* delay clock function */
+	void (*interrupt_func)(u_int, struct trapframe *);       /* interrupt func */
+	u_char *volatile intr_mask;
+	u_char *volatile intr_ipl;
+	u_char *volatile intr_src;
+};
+
+extern struct md_p md;
+
+int badvaddr(vaddr_t, int);
+void nmihand(void *);
+
+#endif /* _KERNEL */
+#endif /* __MACHINE_CPU_H__ */
diff --git a/sys/arch/luna88k/include/cpu_number.h b/sys/arch/luna88k/include/cpu_number.h
new file mode 100644
index 00000000000..c8d50b3ab6b
--- /dev/null
+++ b/sys/arch/luna88k/include/cpu_number.h
@@ -0,0 +1,47 @@
+/*	$OpenBSD: cpu_number.h,v 1.1 2004/04/21 15:23:57 aoyama Exp $	*/
+
+/*
+ * Mach Operating System
+ * Copyright (c) 1993-1992 Carnegie Mellon University
+ * All Rights Reserved.
+ *
+ * Permission to use, copy, modify and distribute this software and its
+ * documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
+ * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie Mellon
+ * the rights to redistribute these changes.
+ */
+
+#ifndef	_M88K_CPU_NUMBER_
+#define _M88K_CPU_NUMBER_
+
+#ifdef	_KERNEL
+#ifndef _LOCORE
+#include <machine/param.h>
+
+static unsigned cpu_number(void);
+
+static __inline__ unsigned cpu_number(void)
+{
+	unsigned cpu;
+
+	__asm__ ("ldcr %0, cr18" : "=r" (cpu));
+	return (cpu & 3);
+}
+#endif /* _LOCORE */
+#endif /* _KERNEL */
+#endif /* _M88K_CPU_NUMBER_ */
diff --git a/sys/arch/luna88k/include/cpus.h b/sys/arch/luna88k/include/cpus.h
new file mode 100644
index 00000000000..6270f10b20a
--- /dev/null
+++ b/sys/arch/luna88k/include/cpus.h
@@ -0,0 +1,65 @@
+/*	$OpenBSD: cpus.h,v 1.1 2004/04/21 15:23:57 aoyama Exp $ */
+/* 
+ * Mach Operating System
+ * Copyright (c) 1993-1992 Carnegie Mellon University
+ * All Rights Reserved.
+ * 
+ * Permission to use, copy, modify and distribute this software and its
+ * documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ * 
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
+ * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ * 
+ * Carnegie Mellon requests users of this software to return to
+ * 
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ * 
+ * any improvements or extensions that they make and grant Carnegie Mellon 
+ * the rights to redistribute these changes.
+ */
+/*
+ *
+ * HISTORY
+ */
+/* 
+  Versions Idents for 88k family chips 
+ */
+
+#ifndef __MACHINE_CPUS_H__
+#define __MACHINE_CPUS_H__
+
+/*
+ * cpu Processor Identification Register (PID).
+ */
+#ifndef _LOCORE
+union cpupid {
+   unsigned cpupid;
+   struct {
+      unsigned
+      /*empty*/:16,
+      arc:8,
+      version:7,
+      master:1;
+   } m88100;
+   struct {
+      unsigned
+      id:8,
+      type:3,
+      version:5,
+      /*empty*/:16;
+   } m88200;
+};
+#endif /* _LOCORE */
+
+#define M88100_ID 0
+#define M88200_ID 5
+#define M88204_ID 6
+
+#endif /* __MACHINE_CPUS_H__ */
diff --git a/sys/arch/luna88k/include/db_machdep.h b/sys/arch/luna88k/include/db_machdep.h
new file mode 100644
index 00000000000..ab6e904a394
--- /dev/null
+++ b/sys/arch/luna88k/include/db_machdep.h
@@ -0,0 +1,167 @@
+/*	$OpenBSD: db_machdep.h,v 1.1 2004/04/21 15:23:57 aoyama Exp $ */
+/*
+ * Mach Operating System
+ * Copyright (c) 1993-1991 Carnegie Mellon University
+ * Copyright (c) 1991 OMRON Corporation
+ * All Rights Reserved.
+ *
+ * Permission to use, copy, modify and distribute this software and its
+ * documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON AND OMRON ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION.  CARNEGIE MELLON AND OMRON DISCLAIM ANY LIABILITY OF ANY KIND
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+
+/*
+ * Machine-dependent defined for the new kernel debugger
+ */
+
+#ifndef  _M88K_DB_MACHDEP_H_
+#define  _M88K_DB_MACHDEP_H_
+
+/* trap numbers used by ddb */
+#define	DDB_ENTRY_BKPT_NO	130
+#define	DDB_ENTRY_TRACE_NO	131
+#define DDB_ENTRY_TRAP_NO	132
+
+#ifndef	_LOCORE
+
+#include <machine/pcb.h>
+#include <machine/trap.h>
+
+#include <uvm/uvm_param.h>
+
+/*
+ * The low two bits of sxip, snip, sfip have valid bits
+ * in them that need to masked to get the correct addresses
+ */
+#define PC_REGS(regs) \
+	cputyp == CPU_88110 ? ((regs)->exip & ~3) : \
+	  (((regs)->sxip & 2) ? (regs)->sxip & ~3 : \
+	    ((regs)->snip & 2 ? (regs)->snip & ~3 : (regs)->sfip & ~3))
+
+/* inst_return(ins) - is the instruction a function call return.
+ * Not mutually exclusive with inst_branch. Should be a jmp r1. */
+#define inst_return(I) (((I)&0xfffffbffU) == 0xf400c001U ? TRUE : FALSE)
+
+/*
+ * inst_call - function call predicate: is the instruction a function call.
+ * Could be either bsr or jsr
+ */
+#define inst_call(I) ({ unsigned i = (I); \
+	((((i) & 0xf8000000U) == 0xc8000000U || /*bsr*/ \
+          ((i) & 0xfffffbe0U) == 0xf400c800U)   /*jsr*/ \
+	? TRUE : FALSE) \
+;})
+
+#ifdef DDB
+
+/*
+ * This is a hack so that mc88100 can use software single step
+ * and mc88110 can use the wonderful hardware single step
+ * feature. XXX smurph
+ */
+#define INTERNAL_SSTEP		/* Use local Single Step routines */
+
+#define BKPT_SIZE	(4)	/* number of bytes in bkpt inst. */
+#define BKPT_INST	(0xF000D000 | DDB_ENTRY_BKPT_NO) /* tb0, 0,r0, vector 130 */
+#define BKPT_SET(inst)	(BKPT_INST)
+
+/* Entry trap for the debugger - used for inline assembly breaks*/
+#define ENTRY_ASM       	"tb0 0, r0, 132"
+
+typedef	vaddr_t		db_addr_t;
+typedef	long		db_expr_t;
+typedef	struct reg	db_regs_t;
+extern db_regs_t	ddb_regs;	/* register state */
+#define	DDB_REGS	(&ddb_regs)
+
+extern int db_noisy;
+
+unsigned inst_load(unsigned);
+unsigned inst_store(unsigned);
+boolean_t inst_branch(unsigned);
+db_addr_t next_instr_address(db_addr_t, unsigned);
+db_addr_t branch_taken(u_int, db_addr_t, db_expr_t (*)(db_regs_t *, int),
+		       db_regs_t *);
+int ddb_break_trap(int type, db_regs_t *eframe);
+int ddb_entry_trap(int level, db_regs_t *eframe);
+
+/* breakpoint/watchpoint foo */
+#define IS_BREAKPOINT_TRAP(type,code) ((type)==T_KDB_BREAK)
+#if defined(T_WATCHPOINT)
+#define IS_WATCHPOINT_TRAP(type,code) ((type)==T_KDB_WATCH)
+#else
+#define IS_WATCHPOINT_TRAP(type,code) 0
+#endif /* T_WATCHPOINT */
+
+/* we don't want coff support */
+#define DB_NO_COFF 1
+
+#ifdef INTERNAL_SSTEP
+db_expr_t getreg_val(db_regs_t *, int);
+void db_set_single_step(db_regs_t *);
+void db_clear_single_step(db_regs_t *);
+#else
+/* need software single step */
+#define SOFTWARE_SSTEP 1 /* we need this for mc88100 */
+#endif
+
+/*
+ * Debugger can get to any address space
+ */
+
+#define DB_ACCESS_LEVEL DB_ACCESS_ANY
+
+#define DB_VALID_KERN_ADDR(addr) (!badaddr((void *)(addr), 1))
+#define DB_VALID_ADDRESS(addr,user) \
+  (user ? db_check_user_addr(addr) : DB_VALID_KERN_ADDR(addr))
+
+/* instruction type checking - others are implemented in db_sstep.c */
+
+#define inst_trap_return(ins)  ((ins) == 0xf400fc00U)
+
+/* don't need to load symbols */
+#define DB_SYMBOLS_PRELOADED 1
+
+/* machine specific commands have been added to ddb */
+#define DB_MACHINE_COMMANDS 1
+
+/*
+ * This routine should return true for instructions that result in unconditonal
+ * transfers of the flow of control. (Unconditional Jumps, subroutine calls,
+ * subroutine returns, etc).
+ *
+ *  Trap and return from trap  should not  be listed here.
+ */
+#define inst_unconditional_flow_transfer(I) ({ unsigned i = (I); \
+    ((((i) & 0xf0000000U) == 0xc0000000U || /* br, bsr */ \
+      ((i) & 0xfffff3e0U) == 0xf400c000U)   /* jmp, jsr */ \
+     ? TRUE: FALSE) \
+;})
+
+/* Return true if the instruction has a delay slot.  */
+#define db_branch_is_delayed(I)	inst_delayed(I)
+
+#define	db_printf_enter	db_printing
+
+int m88k_print_instruction(unsigned iadr, long inst);
+
+#endif	/* DDB */
+#endif	/* _LOCORE */
+
+#endif	/* _M88K_DB_MACHDEP_H_ */
diff --git a/sys/arch/luna88k/include/disklabel.h b/sys/arch/luna88k/include/disklabel.h
new file mode 100644
index 00000000000..4ca457a73cd
--- /dev/null
+++ b/sys/arch/luna88k/include/disklabel.h
@@ -0,0 +1,52 @@
+/*	$OpenBSD: disklabel.h,v 1.1 2004/04/21 15:23:57 aoyama Exp $	*/
+/*	$NetBSD: disklabel.h,v 1.2 2000/01/28 02:25:24 nisimura Exp $	*/
+
+/*
+ * Copyright (c) 1994 Christopher G. Demetriou
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *      This product includes software developed by Christopher G. Demetriou.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _MACHINE_DISKLABEL_H_
+#define _MACHINE_DISKLABEL_H_
+
+#define	LABELSECTOR	0			/* sector containing label */
+#define	LABELOFFSET	64			/* offset of label in sector */
+#define	MAXPARTITIONS	16			/* number of partitions */
+#define	RAW_PART	2			/* raw partition: xx?c */
+
+/*
+ * This holds a copy of the whole label block, saved in here by
+ * readdisklabel() so that writedisklabel() can preserve the
+ * parts of the label block outside of the actual label.
+ * (i.e. Sun label info, bad block table, etc.)
+ */
+struct cpu_disklabel {
+	char	cd_block[512];
+};
+
+#endif /* _MACHINE_DISKLABEL_H_ */
diff --git a/sys/arch/luna88k/include/endian.h b/sys/arch/luna88k/include/endian.h
new file mode 100644
index 00000000000..a42313b07e3
--- /dev/null
+++ b/sys/arch/luna88k/include/endian.h
@@ -0,0 +1,36 @@
+/*	$OpenBSD: endian.h,v 1.1 2004/04/21 15:23:57 aoyama Exp $ */
+
+/*-
+ * Copyright (c) 1997 Niklas Hallqvist.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __MVME88K_ENDIAN_H__
+#define __MVME88K_ENDIAN_H__
+
+#define BYTE_ORDER BIG_ENDIAN
+#include <sys/endian.h>
+
+#define	__STRICT_ALIGNMENT
+
+#endif /* __MVME88K_ENDIAN_H__ */
+
diff --git a/sys/arch/luna88k/include/exec.h b/sys/arch/luna88k/include/exec.h
new file mode 100644
index 00000000000..0ad476ff297
--- /dev/null
+++ b/sys/arch/luna88k/include/exec.h
@@ -0,0 +1,32 @@
+/*	$OpenBSD: exec.h,v 1.1 2004/04/21 15:23:57 aoyama Exp $ */
+#ifndef __MACHINE_EXEC_H__
+#define __MACHINE_EXEC_H__
+
+#define __LDPGSZ        4096
+
+struct relocation_info_m88k {
+        unsigned int r_address;         /* offset in text or data segment */
+        unsigned int r_symbolnum : 24,  /* ordinal number of add symbol */
+                        r_extern :  1,  /* 1 if need to add symbol to value */
+                        r_baserel : 1,
+                        r_pcrel : 1,
+                        r_jmptable : 1,
+                        r_type : 4;
+
+        int r_addend;
+};
+#define relocation_info relocation_info_m88k
+
+#define ARCH_ELFSIZE		32
+
+#define ELF_TARG_CLASS		ELFCLASS32
+#define ELF_TARG_DATA		ELFDATA2MSB
+#define ELF_TARG_MACH		EM_88K
+
+#define _NLIST_DO_AOUT
+#define _NLIST_DO_ELF
+
+#define _KERN_DO_AOUT
+#define _KERN_DO_ELF
+
+#endif /* __MACHINE_EXEC_H__ */
diff --git a/sys/arch/luna88k/include/float.h b/sys/arch/luna88k/include/float.h
new file mode 100644
index 00000000000..8abc3de9f17
--- /dev/null
+++ b/sys/arch/luna88k/include/float.h
@@ -0,0 +1,76 @@
+/*	$OpenBSD: float.h,v 1.1 2004/04/21 15:23:57 aoyama Exp $	*/
+
+/*
+ * Copyright (c) 1989 Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	@(#)float.h	7.1 (Berkeley) 5/8/90
+ */
+
+#ifndef __M88K_FLOAT_H__
+#define __M88K_FLOAT_H__
+
+#include <sys/cdefs.h>
+
+__BEGIN_DECLS
+int __flt_rounds(void);
+__END_DECLS
+
+#define FLT_RADIX	2		/* b */
+#define FLT_ROUNDS	__flt_rounds()
+
+#define FLT_MANT_DIG	24		/* p */
+#define FLT_EPSILON	1.19209290E-07F	/* b**(1-p) */
+#define FLT_DIG		6		/* floor((p-1)*log10(b))+(b == 10) */
+#define FLT_MIN_EXP	-125		/* emin */
+#define FLT_MIN		1.17549435E-38F	/* b**(emin-1) */
+#define FLT_MIN_10_EXP	-37		/* ceil(log10(b**(emin-1))) */
+#define FLT_MAX_EXP	128		/* emax */
+#define FLT_MAX		3.40282347E+38F	/* (1-b**(-p))*b**emax */
+#define FLT_MAX_10_EXP	38		/* floor(log10((1-b**(-p))*b**emax)) */
+
+#define DBL_MANT_DIG	53
+#define DBL_EPSILON	2.2204460492503131E-16
+#define DBL_DIG		15
+#define DBL_MIN_EXP	-1021
+#define DBL_MIN		2.2250738585072014E-308
+#define DBL_MIN_10_EXP	-307
+#define DBL_MAX_EXP	1024
+#define DBL_MAX		1.7976931348623157E+308
+#define DBL_MAX_10_EXP	308
+
+#define LDBL_MANT_DIG	DBL_MANT_DIG
+#define LDBL_EPSILON	DBL_EPSILON
+#define LDBL_DIG	DBL_DIG
+#define LDBL_MIN_EXP	DBL_MIN_EXP
+#define LDBL_MIN	DBL_MIN
+#define LDBL_MIN_10_EXP	DBL_MIN_10_EXP
+#define LDBL_MAX_EXP	DBL_MAX_EXP
+#define LDBL_MAX	DBL_MAX
+#define LDBL_MAX_10_EXP	DBL_MAX_10_EXP
+
+#endif /* __M88K_FLOAT_H__ */
diff --git a/sys/arch/luna88k/include/frame.h b/sys/arch/luna88k/include/frame.h
new file mode 100644
index 00000000000..ab28bb5cf49
--- /dev/null
+++ b/sys/arch/luna88k/include/frame.h
@@ -0,0 +1,49 @@
+/*	$OpenBSD: frame.h,v 1.1 2004/04/21 15:23:57 aoyama Exp $	*/
+/*	$NetBSD: frame.h,v 1.15 1997/05/03 12:49:05 mycroft Exp $	*/
+
+/*
+ * Copyright (c) 1988 University of Utah.
+ * Copyright (c) 1982, 1990, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * the Systems Programming Group of the University of Utah Computer
+ * Science Department.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * from: Utah $Hdr: frame.h 1.8 92/12/20$
+ *
+ *	@(#)frame.h	8.1 (Berkeley) 6/10/93
+ */
+
+#ifndef	_M88K_FRAME_H_
+#define	_M88K_FRAME_H_
+
+struct frame {
+	struct trapframe  __packed F_t;
+};
+
+#endif	/* _M88K_FRAME_H_ */
diff --git a/sys/arch/luna88k/include/ieee.h b/sys/arch/luna88k/include/ieee.h
new file mode 100644
index 00000000000..2d769d2a8a3
--- /dev/null
+++ b/sys/arch/luna88k/include/ieee.h
@@ -0,0 +1,142 @@
+/*	$OpenBSD: ieee.h,v 1.1 2004/04/21 15:23:57 aoyama Exp $ */
+/*
+ * Copyright (c) 1992, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This software was developed by the Computer Systems Engineering group
+ * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
+ * contributed to Berkeley.
+ *
+ * All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ *	This product includes software developed by the University of
+ *	California, Lawrence Berkeley Laboratory.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	@(#)ieee.h	8.1 (Berkeley) 6/11/93
+ */
+/*
+ * Stolen from sparc port
+ */
+
+/*
+ * ieee.h defines the machine-dependent layout of the machine's IEEE
+ * floating point.  It does *not* define (yet?) any of the rounding
+ * mode bits, exceptions, and so forth.
+ */
+
+/*
+ * Define the number of bits in each fraction and exponent.
+ *
+ *		     k	         k+1
+ * Note that  1.0 x 2  == 0.1 x 2      and that denorms are represented
+ *
+ *					  (-exp_bias+1)
+ * as fractions that look like 0.fffff x 2             .  This means that
+ *
+ *			 -126
+ * the number 0.10000 x 2    , for instance, is the same as the normalized
+ *
+ *		-127			   -128
+ * float 1.0 x 2    .  Thus, to represent 2    , we need one leading zero
+ *
+ *				  -129
+ * in the fraction; to represent 2    , we need two, and so on.  This
+ *
+ *						     (-exp_bias-fracbits+1)
+ * implies that the smallest denormalized number is 2
+ *
+ * for whichever format we are talking about: for single precision, for
+ *
+ *						-126		-149
+ * instance, we get .00000000000000000000001 x 2    , or 1.0 x 2    , and
+ *
+ * -149 == -127 - 23 + 1.
+ */
+#ifndef __MACHINE_IEEE_H__
+#define __MACHINE_IEEE_H__
+#define	SNG_EXPBITS	8
+#define	SNG_FRACBITS	23
+
+#define	DBL_EXPBITS	11
+#define	DBL_FRACBITS	52
+
+#ifdef notyet
+#define	E80_EXPBITS	15
+#define	E80_FRACBITS	64
+#endif
+
+#define	EXT_EXPBITS	15
+#define	EXT_FRACBITS	112
+
+struct ieee_single {
+	u_int	sng_sign:1;
+	u_int	sng_exp:8;
+	u_int	sng_frac:23;
+};
+
+struct ieee_double {
+	u_int	dbl_sign:1;
+	u_int	dbl_exp:11;
+	u_int	dbl_frach:20;
+	u_int	dbl_fracl;
+};
+
+struct ieee_ext {
+	u_int	ext_sign:1;
+	u_int	ext_exp:15;
+	u_int	ext_frach:16;
+	u_int	ext_frachm;
+	u_int	ext_fraclm;
+	u_int	ext_fracl;
+};
+
+/*
+ * Floats whose exponent is in [1..INFNAN) (of whatever type) are
+ * `normal'.  Floats whose exponent is INFNAN are either Inf or NaN.
+ * Floats whose exponent is zero are either zero (iff all fraction
+ * bits are zero) or subnormal values.
+ *
+ * A NaN is a `signalling NaN' if its QUIETNAN bit is clear in its
+ * high fraction; if the bit is set, it is a `quiet NaN'.
+ */
+#define	SNG_EXP_INFNAN	255
+#define	DBL_EXP_INFNAN	2047
+#define	EXT_EXP_INFNAN	32767
+
+#if 0
+#define	SNG_QUIETNAN	(1 << 22)
+#define	DBL_QUIETNAN	(1 << 19)
+#define	EXT_QUIETNAN	(1 << 15)
+#endif
+
+/*
+ * Exponent biases.
+ */
+#define	SNG_EXP_BIAS	127
+#define	DBL_EXP_BIAS	1023
+#define	EXT_EXP_BIAS	16383
+#endif /* __MACHINE_IEEE_H__ */
diff --git a/sys/arch/luna88k/include/ieeefp.h b/sys/arch/luna88k/include/ieeefp.h
new file mode 100644
index 00000000000..f09891419a0
--- /dev/null
+++ b/sys/arch/luna88k/include/ieeefp.h
@@ -0,0 +1,56 @@
+/*	$OpenBSD: ieeefp.h,v 1.1 2004/04/21 15:23:57 aoyama Exp $ */
+/*
+ * Copyright (c) 1996 Nivas Madhur
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *      This product includes software developed by Nivas Madhur.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/*
+ * Values for fp_except are selected to match the bits in FPSR (see
+ * m88100 user's manual page 6-33). This file is derived from the
+ * definitions in the ABI/88k manual and sparc port.
+ * 			       -- Nivas
+ */
+
+#ifndef _M88K_IEEEFP_H_
+#define _M88K_IEEEFP_H_
+
+typedef int fp_except;
+#define FP_X_INV	0x10	/* invalid operation exception */
+#define FP_X_DZ		0x08	/* divide-by-zero exception */
+#define FP_X_UFL	0x04	/* underflow exception */
+#define FP_X_OFL	0x02	/* overflow exception */
+#define FP_X_IMP	0x01	/* imprecise (loss of precision) */
+
+typedef enum {
+    FP_RN=0,		/* round to nearest representable number */
+    FP_RZ=1,		/* round to zero (truncate) */
+    FP_RM=2,		/* round toward negative infinity */
+    FP_RP=3		/* round toward positive infinity */
+} fp_rnd;
+
+#endif /* _M88K_IEEEFP_H_ */
diff --git a/sys/arch/luna88k/include/internal_types.h b/sys/arch/luna88k/include/internal_types.h
new file mode 100644
index 00000000000..c54d7069649
--- /dev/null
+++ b/sys/arch/luna88k/include/internal_types.h
@@ -0,0 +1,6 @@
+/* $OpenBSD: internal_types.h,v 1.1 2004/04/21 15:23:57 aoyama Exp $ */
+/* Public domain */
+#ifndef _MACHINE_INTERNAL_TYPES_H_
+#define _MACHINE_INTERNAL_TYPES_H_
+
+#endif
diff --git a/sys/arch/luna88k/include/intr.h b/sys/arch/luna88k/include/intr.h
new file mode 100644
index 00000000000..b7855664edc
--- /dev/null
+++ b/sys/arch/luna88k/include/intr.h
@@ -0,0 +1,132 @@
+/*	$OpenBSD: intr.h,v 1.1 2004/04/21 15:23:57 aoyama Exp $	*/
+/*
+ * Copyright (C) 2000 Steve Murphree, Jr.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _LUNA88K_INTR_H_
+#define _LUNA88K_INTR_H_
+/*
+ * INTERRUPT STAT levels.  for 'systat vmstat'
+ * intrcnt and friends are defined in locore.S
+ * XXX smurph
+ */
+
+#ifndef _LOCORE
+
+#define M88K_NIRQ	12
+
+#define M88K_SPUR_IRQ	0
+#define M88K_LEVEL1_IRQ	1
+#define M88K_LEVEL2_IRQ	2
+#define M88K_LEVEL3_IRQ	3
+#define M88K_LEVEL4_IRQ	4
+#define M88K_LEVEL5_IRQ	5
+#define M88K_LEVEL6_IRQ	6
+#define M88K_LEVEL7_IRQ	7
+/*
+ * We keep track of these separately, but
+ * they will be reflected with the above also.
+ */
+#define M88K_CLK_IRQ	8
+#define M88K_SCLK_IRQ	9
+#define M88K_PCLK_IRQ	10
+#define M88K_NMI_IRQ	11
+
+extern int intrcnt[M88K_NIRQ];
+
+#endif
+
+/*
+ * IPL levels.
+ */
+
+#define IPL_NONE	0
+#define IPL_SOFTCLOCK	1
+#define IPL_SOFTNET	1
+#define IPL_BIO		3
+#define IPL_NET		4
+#define IPL_IMP		4
+#define IPL_TTY		5
+#define IPL_VM		5
+#define IPL_CLOCK	6
+#define IPL_STATCLOCK	6
+#define IPL_HIGH	7
+#define IPL_NMI		7
+#define IPL_ABORT	7
+
+#ifdef _KERNEL
+#ifndef _LOCORE
+unsigned setipl(unsigned level);
+unsigned raiseipl(unsigned level);
+int spl0(void);
+
+/* needs major cleanup - XXX nivas */
+
+/* SPL asserts */
+#ifdef DIAGNOSTIC
+/*
+ * Although this function is implemented in MI code, it must be in this MD
+ * header because we don't want this header to include MI includes.
+ */
+void splassert_fail(int, int, const char *);
+extern int splassert_ctl;
+void splassert_check(int, const char *);
+#define splassert(__wantipl) do {			\
+	if (__predict_false(splassert_ctl > 0)) {	\
+		splassert_check(__wantipl, __func__);	\
+	}						\
+} while (0)
+#else
+#define	splassert(wantipl)	do { /* nothing */ } while (0)
+#endif
+
+#endif /* _LOCORE */
+
+#define spl1()		setipl(1)
+#define spl2()		setipl(2)
+#define spl3()		setipl(3)
+#define spl4()		setipl(4)
+#define spl5()		setipl(5)
+#define spl6()		setipl(6)
+#define spl7()		setipl(7)
+
+#define splnone			spl0
+#define spllowersoftclock()	setipl(IPL_SOFTCLOCK)
+#define splsoftclock()		setipl(IPL_SOFTCLOCK)
+#define splsoftnet()		setipl(IPL_SOFTNET)
+#define splbio()		raiseipl(IPL_BIO)
+#define splnet()		raiseipl(IPL_NET)
+#define spltty()		raiseipl(IPL_TTY)
+#define splclock()		raiseipl(IPL_CLOCK)
+#define splstatclock()		raiseipl(IPL_STATCLOCK)
+#define splimp()		raiseipl(IPL_IMP)
+#define splvm()			raiseipl(IPL_VM)
+#define splhigh()		setipl(IPL_HIGH)
+
+#define splx(x)		((x) ? setipl((x)) : spl0())
+
+#endif /* _KERNEL */
+#endif /* _LUNA88K_INTR_H_ */
diff --git a/sys/arch/luna88k/include/kcore.h b/sys/arch/luna88k/include/kcore.h
new file mode 100644
index 00000000000..c2c6af6c2c6
--- /dev/null
+++ b/sys/arch/luna88k/include/kcore.h
@@ -0,0 +1,39 @@
+/*	$OpenBSD: kcore.h,v 1.1 2004/04/21 15:23:57 aoyama Exp $	*/
+
+/*
+ * Copyright (c) 2001 Miodrag Vallat.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef	_MVME88K_KCORE_H_
+#define	_MVME88K_KCORE_H_
+
+/* Keep this define consistent with VM_PHYSSEG_MAX in <machine/vmparam.h> */
+#define	NPHYS_RAM_SEGS	1
+
+typedef struct cpu_kcore_hdr {
+	int		cputype;	/* board type: 187, 188, 197 */
+	phys_ram_seg_t	ram_segs[NPHYS_RAM_SEGS];
+} cpu_kcore_hdr_t;
+
+#endif	/* _MVME88K_KCORE_H_ */
diff --git a/sys/arch/luna88k/include/limits.h b/sys/arch/luna88k/include/limits.h
new file mode 100644
index 00000000000..1ad4a47fc77
--- /dev/null
+++ b/sys/arch/luna88k/include/limits.h
@@ -0,0 +1,53 @@
+/*	$OpenBSD: limits.h,v 1.1 2004/04/21 15:23:57 aoyama Exp $ */
+/*
+ * Copyright (c) 1988, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	from: @(#)limits.h	8.3 (Berkeley) 1/4/94
+ */
+
+#ifndef _MACHINE_LIMITS_H_
+#define _MACHINE_LIMITS_H_
+
+#define	MB_LEN_MAX	6		/* Allow 31 bit UTF2 */
+
+#if !defined(_ANSI_SOURCE)
+#define	SIZE_MAX	UINT_MAX	/* max value for a size_t */
+#define	SSIZE_MAX	INT_MAX		/* max value for a ssize_t */
+
+#if !defined(_POSIX_SOURCE)
+#define	SIZE_T_MAX	UINT_MAX	/* max value for a size_t */
+
+/* GCC requires that quad constants be written as expressions. */
+#define	UQUAD_MAX	((u_quad_t)0-1)	/* max value for a uquad_t */
+					/* max value for a quad_t */
+#define	QUAD_MAX	((quad_t)(UQUAD_MAX >> 1))
+#define	QUAD_MIN	(-QUAD_MAX-1)	/* min value for a quad_t */
+#endif /* !_POSIX_SOURCE */
+#endif /* !_ANSI_SOURCE */
+
+#endif /* _MACHINE_LIMITS_H_ */
diff --git a/sys/arch/luna88k/include/locore.h b/sys/arch/luna88k/include/locore.h
new file mode 100644
index 00000000000..ab5b2368a77
--- /dev/null
+++ b/sys/arch/luna88k/include/locore.h
@@ -0,0 +1,84 @@
+/*	$OpenBSD: locore.h,v 1.1 2004/04/21 15:23:57 aoyama Exp $	*/
+
+#ifndef _MACHINE_LOCORE_H_
+#define _MACHINE_LOCORE_H_
+
+#include <uvm/uvm_param.h>
+
+/*
+ * C prototypes for various routines defined in locore_* and friends
+ */
+
+/* locore_asm_routines.S */
+
+unsigned int do_load_word(vaddr_t address,
+    boolean_t supervisor_mode);
+unsigned int do_load_half(vaddr_t address,
+    boolean_t supervisor_mode);
+unsigned int do_load_byte(vaddr_t address,
+    boolean_t supervisor_mode);
+
+void do_store_word(vaddr_t address, unsigned int data,
+    boolean_t supervisor_mode);
+void do_store_half(vaddr_t address, unsigned int data,
+    boolean_t supervisor_mode);
+void do_store_byte(vaddr_t address, unsigned int data,
+    boolean_t supervisor_mode);
+
+unsigned do_xmem_word(vaddr_t address, unsigned int data,
+    boolean_t supervisor_mode);
+unsigned do_xmem_byte(vaddr_t address, unsigned int data,
+    boolean_t supervisor_mode);
+
+unsigned read_processor_identification_register(void);
+int badaddr(vaddr_t addr, int size);
+#define badwordaddr(x) badaddr(x, 4)
+void set_cpu_number(unsigned number);
+void doboot(void);
+
+int guarded_access(unsigned char *volatile address,
+    unsigned len, u_char *vec);
+
+/* locore_c_routines.c */
+
+void dae_print(unsigned *eframe);
+void data_access_emulation(unsigned *eframe);
+
+unsigned getipl(void);
+
+/* machdep.c */
+
+void _doboot(void);
+vaddr_t get_slave_stack(void);
+void slave_pre_main(void);
+int slave_main(void);
+int intr_findvec(int start, int end);
+void bugsyscall(void);
+void myetheraddr(u_char *cp);
+void dosoftint(void);
+void MY_info(struct trapframe *f, caddr_t p, int flags, char *s);
+void MY_info_done(struct trapframe *f, int flags);
+void luna88k_bootstrap(void);
+void luna88k_ext_int(u_int v, struct trapframe *eframe);
+unsigned int safe_level(unsigned mask, unsigned curlevel);
+
+/* eh.S */
+
+struct proc;
+void proc_do_uret(struct proc *);
+void sigsys(void);
+void sigtrap(void);
+void stepbpt(void);
+void userbpt(void);
+void syscall_handler(void);
+void m88110_sigsys(void);
+void m88110_sigtrap(void);
+void m88110_stepbpt(void);
+void m88110_userbpt(void);
+void m88110_syscall_handler(void);
+
+/* process.S */
+void savectx(struct pcb *);
+void switch_exit(struct proc *);
+
+#endif /* _MACHINE_LOCORE_H_ */
diff --git a/sys/arch/luna88k/include/m88100.h b/sys/arch/luna88k/include/m88100.h
new file mode 100644
index 00000000000..9609924e648
--- /dev/null
+++ b/sys/arch/luna88k/include/m88100.h
@@ -0,0 +1,59 @@
+/*	$OpenBSD: m88100.h,v 1.1 2004/04/21 15:23:57 aoyama Exp $ */
+/*
+ * Mach Operating System
+ * Copyright (c) 1993-1992 Carnegie Mellon University
+ * All Rights Reserved.
+ *
+ * Permission to use, copy, modify and distribute this software and its
+ * documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
+ * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie Mellon
+ * the rights to redistribute these changes.
+ */
+
+#ifndef __MACHINE_M88100_H__
+#define __MACHINE_M88100_H__
+
+/*
+ *	88100 RISC definitions
+ */
+
+/*
+ * DMT0, DMT1, DMT2 layout
+ *
+ * The DMT_SKIP bit is never set by the cpu.  It is used to mark 'known'
+ * transactions so that they don't get processed a second time by
+ * data_access_emulation().
+ */
+#define DMT_SKIP	0x00010000	/* skip this dmt */
+#define DMT_BO		0x00008000	/* Byte-Ordering */
+#define DMT_DAS		0x00004000	/* Data Access Space */
+#define DMT_DOUB1	0x00002000	/* Double Word */
+#define DMT_LOCKBAR	0x00001000	/* Bud Lock */
+#define DMT_DREG	0x00000F80	/* Destination Registers 5bits */
+#define DMT_SIGNED	0x00000040	/* Sign-Extended Bit */
+#define DMT_EN		0x0000003C	/* Byte Enable Bit */
+#define DMT_WRITE	0x00000002	/* Read/Write Transaction Bit */
+#define	DMT_VALID	0x00000001	/* Valid Transaction Bit */
+
+#define	DMT_DREGSHIFT	7
+#define	DMT_ENSHIFT	2
+
+#define	DMT_DREGBITS(x)	(((x) & DMT_DREG) >> DMT_DREGSHIFT)
+#define	DMT_ENBITS(x)	(((x) & DMT_EN) >> DMT_ENSHIFT)
+
+#endif /* __MACHINE_M88100_H__ */
diff --git a/sys/arch/luna88k/include/m8820x.h b/sys/arch/luna88k/include/m8820x.h
new file mode 100644
index 00000000000..94454ec7b81
--- /dev/null
+++ b/sys/arch/luna88k/include/m8820x.h
@@ -0,0 +1,169 @@
+/*	$OpenBSD: m8820x.h,v 1.1 2004/04/21 15:23:57 aoyama Exp $ */
+/*
+ * Copyright (c) 2004, Miodrag Vallat.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * Mach Operating System
+ * Copyright (c) 1993-1992 Carnegie Mellon University
+ * All Rights Reserved.
+ *
+ * Permission to use, copy, modify and distribute this software and its
+ * documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
+ * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie Mellon
+ * the rights to redistribute these changes.
+ */
+
+#ifndef	__MACHINE_M8820X_H__
+#define	__MACHINE_M8820X_H__
+
+/*
+ * 8820x CMMU definitions
+ */
+
+/* CMMU registers */
+#define CMMU_IDR	(0x000 / 4)	/* CMMU id register */
+#define CMMU_SCR	(0x004 / 4)	/* system command register */
+#define CMMU_SSR	(0x008 / 4)	/* system status register */
+#define CMMU_SAR	(0x00c / 4)	/* system address register */
+#define CMMU_SCTR	(0x104 / 4)	/* system control register */
+#define CMMU_PFSR	(0x108 / 4)	/* P bus fault status register */
+#define CMMU_PFAR	(0x10c / 4)	/* P bus fault address register */
+#define CMMU_SAPR	(0x200 / 4)	/* supervisor area pointer register */
+#define CMMU_UAPR	(0x204 / 4)	/* user area pointer register */
+#define CMMU_BWP0	(0x400 / 4)	/* block ATC writer port 0 */
+#define CMMU_BWP1	(0x404 / 4)	/* block ATC writer port 1 */
+#define CMMU_BWP2	(0x408 / 4)	/* block ATC writer port 2 */
+#define CMMU_BWP3	(0x40c / 4)	/* block ATC writer port 3 */
+#define CMMU_BWP4	(0x410 / 4)	/* block ATC writer port 4 */
+#define CMMU_BWP5	(0x414 / 4)	/* block ATC writer port 5 */
+#define CMMU_BWP6	(0x418 / 4)	/* block ATC writer port 6 */
+#define CMMU_BWP7	(0x41c / 4)	/* block ATC writer port 7 */
+#define CMMU_BWP(n)	(CMMU_BWP0 + (n))
+#define CMMU_CDP0	(0x800 / 4)	/* cache data port 0 */
+#define CMMU_CDP1	(0x804 / 4)	/* cache data port 1 */
+#define CMMU_CDP2	(0x808 / 4)	/* cache data port 2 */
+#define CMMU_CDP3	(0x80c / 4)	/* cache data port 3 */
+#define CMMU_CTP0	(0x840 / 4)	/* cache tag port 0 */
+#define CMMU_CTP1	(0x844 / 4)	/* cache tag port 1 */
+#define CMMU_CTP2	(0x848 / 4)	/* cache tag port 2 */
+#define CMMU_CTP3	(0x84c / 4)	/* cache tag port 3 */
+#define CMMU_CSSP0	(0x880 / 4)	/* cache set status register */
+#define CMMU_CSSP(n)	(CMMU_CSSP0 + (n))
+/* the following only exist on 88204 */
+#define CMMU_CSSP1	(0x890 / 4)	/* cache set status register */
+#define CMMU_CSSP2	(0x8a0 / 4)	/* cache set status register */
+#define CMMU_CSSP3	(0x8b0 / 4)	/* cache set status register */
+
+/* system commands */
+#define CMMU_FLUSH_CACHE_INV_LINE	0x14	/* data cache invalidate */
+#define CMMU_FLUSH_CACHE_INV_PAGE	0x15
+#define CMMU_FLUSH_CACHE_INV_SEGMENT	0x16
+#define CMMU_FLUSH_CACHE_INV_ALL	0x17
+#define CMMU_FLUSH_CACHE_CB_LINE	0x18	/* data cache copyback */
+#define CMMU_FLUSH_CACHE_CB_PAGE	0x19
+#define CMMU_FLUSH_CACHE_CB_SEGMENT	0x1a
+#define CMMU_FLUSH_CACHE_CB_ALL		0x1b
+#define CMMU_FLUSH_CACHE_CBI_LINE	0x1c	/* copyback and invalidate */
+#define CMMU_FLUSH_CACHE_CBI_PAGE	0x1d
+#define CMMU_FLUSH_CACHE_CBI_SEGMENT	0x1e
+#define CMMU_FLUSH_CACHE_CBI_ALL	0x1f
+#define CMMU_PROBE_USER			0x20	/* probe user address */
+#define CMMU_PROBE_SUPER		0x24	/* probe supervisor address */
+#define CMMU_FLUSH_USER_LINE		0x30	/* flush PATC */
+#define CMMU_FLUSH_USER_PAGE		0x31
+#define CMMU_FLUSH_USER_SEGMENT		0x32
+#define CMMU_FLUSH_USER_ALL		0x33
+#define CMMU_FLUSH_SUPER_LINE		0x34
+#define CMMU_FLUSH_SUPER_PAGE		0x35
+#define CMMU_FLUSH_SUPER_SEGMENT	0x36
+#define CMMU_FLUSH_SUPER_ALL		0x37
+
+/* system control values */
+#define CMMU_SCTR_PE	0x00008000	/* parity enable */
+#define CMMU_SCTR_SE	0x00004000	/* snoop enable */
+#define CMMU_SCTR_PR	0x00002000	/* priority arbitration */
+
+/* P bus fault status */
+#define	CMMU_PFSR_FAULT(pfsr)	(((pfsr) >> 16) & 0x07)
+#define CMMU_PFSR_SUCCESS	0	/* no fault */
+#define CMMU_PFSR_BERROR	3	/* bus error */
+#define CMMU_PFSR_SFAULT	4	/* segment fault */
+#define CMMU_PFSR_PFAULT	5	/* page fault */
+#define CMMU_PFSR_SUPER		6	/* supervisor violation */
+#define CMMU_PFSR_WRITE		7	/* writer violation */
+
+/* CSSP values */
+#define	CMMU_CSSP_L5		0x20000000
+#define	CMMU_CSSP_L4		0x10000000
+#define	CMMU_CSSP_L3		0x08000000
+#define	CMMU_CSSP_L2		0x04000000
+#define	CMMU_CSSP_L1		0x02000000
+#define	CMMU_CSSP_L0		0x01000000
+#define	CMMU_CSSP_D3		0x00800000
+#define	CMMU_CSSP_D2		0x00400000
+#define	CMMU_CSSP_D1		0x00200000
+#define	CMMU_CSSP_D0		0x00100000
+#define	CMMU_CSSP_VV(n,v)	(((v) & 0x03) << (12 + 2 * (n)))
+#define	CMMU_VV_EXCLUSIVE	0x00
+#define	CMMU_VV_MODIFIED	0x01
+#define	CMMU_VV_SHARED		0x02
+#define	CMMU_VV_INVALID		0x03
+
+/* IDR values */
+#define	CMMU_ID(idr)		((idr) >> 24)
+#define	CMMU_TYPE(idr)		(((idr) >> 21) & 0x07)
+#define	CMMU_VERSION(idr)	(((idr) >> 16) & 0x1f)
+#define	M88200_ID		5
+#define	M88204_ID		6
+
+/* SSR values */
+#define	CMMU_SSR_CE		0x00008000	/* copyback error */
+#define	CMMU_SSR_BE		0x00004000	/* bus error */
+#define	CMMU_SSR_BH		0x00000002	/* probe BATC hit */
+
+/*
+ * Cache line information
+ */
+
+#define	MC88200_CACHE_SHIFT	4
+#define	MC88200_CACHE_LINE	(1 << MC88200_CACHE_SHIFT)
+
+#define NBSG    	(1 << (PDT_BITS + PG_BITS))	/* segment size */
+
+#endif	/* __MACHINE_M8820X_H__ */
diff --git a/sys/arch/luna88k/include/mmu.h b/sys/arch/luna88k/include/mmu.h
new file mode 100644
index 00000000000..4d35be5be6d
--- /dev/null
+++ b/sys/arch/luna88k/include/mmu.h
@@ -0,0 +1,252 @@
+/*	$OpenBSD: mmu.h,v 1.1 2004/04/21 15:23:57 aoyama Exp $ */
+
+/*
+ * This file bears almost no resemblance to the original m68k file,
+ * so the following copyright notice is questionable, but we are
+ * nice people.
+ */
+
+/*
+ * Copyright (c) 1988 University of Utah.
+ * Copyright (c) 1982, 1986, 1990, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * the Systems Programming Group of the University of Utah Computer
+ * Science Department.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * from: Utah $Hdr: pte.h 1.13 92/01/20$
+ *
+ *	@(#)pte.h	8.1 (Berkeley) 6/10/93
+ */
+
+#ifndef	_MACHINE_MMU_H_
+#define	_MACHINE_MMU_H_
+
+/*
+ * Parameters which determine the 'geometry' of the m88K page tables in memory.
+ */
+
+#define SDT_BITS	10		/* M88K segment table size bits */
+#define PDT_BITS	10		/* M88K page table size bits */
+#define PG_BITS		PAGE_SHIFT	/* M88K hardware page size bits */
+
+/*
+ * Common fields for APR, SDT and PTE
+ */
+
+/* address frame */
+#define	PG_FRAME	0xfffff000
+#define	PG_SHIFT	PG_BITS
+#define	PG_PFNUM(x)	(((x) & PG_FRAME) >> PG_SHIFT)
+
+/* cache control bits */
+#define	CACHE_DFL	0x00000000
+#define	CACHE_INH	0x00000040	/* cache inhibit */
+#define	CACHE_GLOBAL	0x00000080	/* global scope */
+#define	CACHE_WT	0x00000200	/* write through */
+
+#define	CACHE_MASK	(CACHE_INH | CACHE_GLOBAL | CACHE_WT)
+
+/*
+ * Area descriptors
+ */
+
+#define	APR_V		0x00000001	/* valid bit */
+
+/*
+ * 88200 PATC (TLB)
+ */
+
+#define PATC_ENTRIES	56
+
+/*
+ * BATC entries
+ */
+
+#define	BATC_V		0x00000001
+#define	BATC_PROT	0x00000002
+#define	BATC_INH	0x00000004
+#define	BATC_GLOBAL	0x00000008
+#define	BATC_WT		0x00000010
+#define	BATC_SO		0x00000020
+
+
+/*
+ * Segment table entries
+ */
+
+typedef u_int32_t	sdt_entry_t;
+
+#define	SDT_ENTRY_NULL	((sdt_entry_t *) 0)
+
+#define	SG_V		0x00000001
+#define	SG_NV		0x00000000
+#define	SG_PROT		0x00000004
+#define	SG_RO		0x00000004
+#define	SG_RW		0x00000000
+#define	SG_SO		0x00000100
+
+#define	SDT_VALID(sdt)	(*(sdt) & SG_V)
+#define	SDT_SUP(sdt)	(*(sdt) & SG_SO)
+#define	SDT_WP(sdt)	(*(sdt) & SG_PROT)
+
+/*
+ * Page table entries
+ */
+
+typedef u_int32_t	pt_entry_t;
+
+#define	PT_ENTRY_NULL	((pt_entry_t *) 0)
+
+#define	PG_V		0x00000001
+#define	PG_NV		0x00000000
+#define	PG_PROT		0x00000004
+#define	PG_U		0x00000008
+#define	PG_M		0x00000010
+#define	PG_RO		0x00000004
+#define	PG_RW		0x00000000
+#define	PG_SO		0x00000100
+#define	PG_W		0x00000020	/* XXX unused but reserved field */
+#define	PG_U0		0x00000400	/* U0 bit for M88110 */
+#define	PG_U1		0x00000800	/* U1 bit for M88110 */
+
+#define	PDT_VALID(pte)	(*(pte) & PG_V)
+#define	PDT_SUP(pte)	(*(pte) & PG_SO)
+#define	PDT_WP(pte)	(*(pte) & PG_PROT)
+
+/*
+ * Indirect descriptors (mc81110)
+ */
+
+typedef	u_int32_t	pt_ind_entry_t;
+
+/* validity bits */
+#define	IND_V		0x00000001
+#define	IND_NV		0x00000000
+#define	IND_MASKED	0x00000002
+#define	IND_UNMASKED	0x00000003
+#define	IND_MASK	0x00000003
+
+#define	IND_FRAME	0xfffffffc
+#define	IND_SHIFT	2
+
+#define	IND_PDA(x)	((x) & IND_FRAME >> IND_SHIFT)
+
+/*
+ * Number of entries in a page table.
+ */
+
+#define	SDT_ENTRIES	(1<<(SDT_BITS))
+#define PDT_ENTRIES	(1<<(PDT_BITS))
+
+/*
+ * Size in bytes of a single page table.
+ */
+
+#define SDT_SIZE	(sizeof(sdt_entry_t) * SDT_ENTRIES)
+#define PDT_SIZE	(sizeof(pt_entry_t) * PDT_ENTRIES)
+
+/*
+ * Shifts and masks
+ */
+
+#define SDT_SHIFT	(PDT_BITS + PG_BITS)
+#define PDT_SHIFT	(PG_BITS)
+
+#define SDT_MASK	(((1 << SDT_BITS) - 1) << SDT_SHIFT)
+#define PDT_MASK	(((1 << PDT_BITS) - 1) << PDT_SHIFT)
+
+#define	SDTIDX(va)	(((va) & SDT_MASK) >> SDT_SHIFT)
+#define	PDTIDX(va)	(((va) & PDT_MASK) >> PDT_SHIFT)
+
+/* XXX uses knowledge of pmap structure */
+#define SDTENT(map, va)	((sdt_entry_t *)((map)->pm_stab + SDTIDX(va)))
+
+/*
+ * Va spaces mapped by tables and PDT table group.
+ */
+
+#define PDT_VA_SPACE			(PDT_ENTRIES * PAGE_SIZE)
+
+/*
+ * Number of sdt entries used to map user and kernel space.
+ */
+
+#define USER_SDT_ENTRIES	SDTIDX(VM_MIN_KERNEL_ADDRESS)
+#define KERNEL_SDT_ENTRIES	(SDT_ENTRIES - USER_SDT_ENTRIES)
+
+/*
+ * Parameters and macros for BATC
+ */
+
+/* number of bits to BATC shift (log2(BATC_BLKBYTES)) */
+#define BATC_BLKSHIFT	19
+/* 'block' size of a BATC entry mapping */
+#define BATC_BLKBYTES	(1 << BATC_BLKSHIFT)
+/* BATC block mask */
+#define BATC_BLKMASK	(BATC_BLKBYTES-1)
+/* number of BATC entries */
+#define BATC_MAX	8
+
+/* physical and logical block address */
+#define	BATC_PSHIFT	6
+#define	BATC_VSHIFT	(BATC_PSHIFT + (32 - BATC_BLKSHIFT))
+
+#define BATC_BLK_ALIGNED(x)	((x & BATC_BLKMASK) == 0)
+
+#define M88K_BTOBLK(x)	(x >> BATC_BLKSHIFT)
+
+/*
+ * DMA and caching control
+ */
+#define DMA_CACHE_SYNC		0x1
+#define DMA_CACHE_SYNC_INVAL	0x2
+#define DMA_CACHE_INV		0x3
+
+static pt_entry_t invalidate_pte(pt_entry_t *);
+static __inline__ pt_entry_t
+invalidate_pte(pt_entry_t *pte)
+{
+	pt_entry_t oldpte;
+
+	oldpte = PG_NV;
+	__asm__ __volatile__
+	    ("xmem %0, %2, r0" : "=r"(oldpte) : "0"(oldpte), "r"(pte));
+	__asm__ __volatile__ ("tb1 0, r0, 0");
+	return oldpte;
+}
+
+extern vaddr_t kmapva;
+
+#define kvtopte(va)	\
+	((pt_entry_t *)(PG_PFNUM(*((sdt_entry_t *)kmapva + \
+	    SDTIDX(va) + SDT_ENTRIES)) << PDT_SHIFT) + PDTIDX(va))
+
+u_int kvtop(vaddr_t);
+
+#endif /* __MACHINE_MMU_H__ */
diff --git a/sys/arch/luna88k/include/param.h b/sys/arch/luna88k/include/param.h
new file mode 100644
index 00000000000..b4d43f2595b
--- /dev/null
+++ b/sys/arch/luna88k/include/param.h
@@ -0,0 +1,183 @@
+/*	$OpenBSD: param.h,v 1.1 2004/04/21 15:23:57 aoyama Exp $ */
+/*
+ * Copyright (c) 1999 Steve Murphree, Jr.
+ * Copyright (c) 1988 University of Utah.
+ * Copyright (c) 1982, 1986, 1990 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * the Systems Programming Group of the University of Utah Computer
+ * Science Department.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * from: Utah $Hdr: machparam.h 1.11 89/08/14$
+ *
+ *	@(#)param.h	7.8 (Berkeley) 6/28/91
+ */
+#ifndef _MACHINE_PARAM_H_
+#define _MACHINE_PARAM_H_
+
+#ifdef _KERNEL
+#ifndef _LOCORE
+#include <machine/cpu.h>
+#endif	/* _LOCORE */
+#endif
+
+#define  _MACHINE       luna88k
+#define  MACHINE        "luna88k"
+#define  _MACHINE_ARCH  m88k
+#define  MACHINE_ARCH   "m88k"
+#define  MID_MACHINE    MID_M88K
+
+/*
+ * Round p (pointer or byte index) down to a correctly-aligned value
+ * for all data types (int, long, ...).   The result is u_int and
+ * must be cast to any desired pointer type. ALIGN() is used for
+ * aligning stack, which needs to be on a double word boundary for
+ * 88k.
+ */
+
+#define  ALIGNBYTES		15		/* 64 bit alignment */
+#define  ALIGN(p)		(((u_int)(p) + ALIGNBYTES) & ~ALIGNBYTES)
+#define  ALIGNED_POINTER(p,t)	((((u_long)(p)) & (sizeof(t)-1)) == 0)
+
+#define NBPG		(1 << PGSHIFT)	/* bytes/page */
+#define PGOFSET		(NBPG-1)	/* byte offset into page */
+#define PGSHIFT		12		/* LOG2(NBPG) */
+
+#define	PAGE_SHIFT	12
+#define	PAGE_SIZE	(1 << PAGE_SHIFT)
+#define	PAGE_MASK	(PAGE_SIZE - 1)
+
+#define NPTEPG		(PAGE_SIZE / (sizeof(pt_entry_t)))
+
+/*
+ * The ROM monitor uses the bottom 128KB. The kernel will allocate PTEs to map this
+ * space, but the kernel must be linked with a start address past these 128KB.
+ */
+#define KERNBASE	0x00000000	/* start of kernel virtual */
+#define	KERNTEXTOFF	0x00020000	/* start of kernel text */
+
+#define DEV_BSHIFT	9		/* log2(DEV_BSIZE) */
+#define DEV_BSIZE	(1 << DEV_BSHIFT)
+#define BLKDEV_IOSIZE	2048
+#define MAXPHYS		(64 * 1024)	/* max raw I/O transfer size */
+
+#define SSIZE		1		/* initial stack size/NBPG */
+#define SINCR		1		/* increment of stack/NBPG */
+
+#define UPAGES		3		/* pages of u-area */
+#define USPACE		(UPAGES * NBPG)
+
+#define UADDR		0xeee00000	/* address of u */
+
+/*
+ * Constants related to network buffer management.
+ * MCLBYTES must be no larger than the software page size, and,
+ * on machines that exchange pages of input or output buffers with mbuf
+ * clusters (MAPPED_MBUFS), MCLBYTES must also be an integral multiple
+ * of the hardware page size.
+ */
+#define MSIZE		256		/* size of an mbuf */
+#define MCLSHIFT	11		/* convert bytes to m_buf clusters */
+#define MCLBYTES	(1 << MCLSHIFT)	/* size of a m_buf cluster */
+#define MCLOFSET	(MCLBYTES - 1)	/* offset within a m_buf cluster */
+
+#ifndef NMBCLUSTERS
+#ifdef   GATEWAY
+#define NMBCLUSTERS	1024		/* map size, max cluster allocation */
+#else
+#define NMBCLUSTERS	512		/* map size, max cluster allocation */
+#endif
+#endif
+
+/*
+ * Minimum and maximum sizes of the kernel malloc arena in PAGE_SIZE-sized
+ * logical pages.
+ */
+#define	NKMEMPAGES_MIN_DEFAULT	((4 * 1024 * 1024) >> PAGE_SHIFT)
+#define	NKMEMPAGES_MAX_DEFAULT	((4 * 1024 * 1024) >> PAGE_SHIFT)
+
+#define MSGBUFSIZE	PAGE_SIZE
+
+/* pages ("clicks") to disk blocks */
+#define ctod(x)			((x) << (PGSHIFT - DEV_BSHIFT))
+#define dtoc(x)			((x) >> (PGSHIFT - DEV_BSHIFT))
+
+/* pages to bytes */
+#define ctob(x)			((x) << PGSHIFT)
+#define btoc(x)			(((x) + PGOFSET) >> PGSHIFT)
+
+/* bytes to disk blocks */
+#define btodb(x)		((x) >> DEV_BSHIFT)
+#define dbtob(x)		((x) << DEV_BSHIFT)
+
+/*
+ * Map a ``block device block'' to a file system block.
+ * This should be device dependent, and should use the bsize
+ * field from the disk label.
+ * For now though just use DEV_BSIZE.
+ */
+#define bdbtofsb(bn)		((bn) / (BLKDEV_IOSIZE/DEV_BSIZE))
+
+/*
+ * Get interrupt glue.
+ */
+#include <machine/intr.h>
+
+#ifdef   _KERNEL
+extern void delay(int);
+#define  DELAY(x)             delay(x)
+
+extern int cputyp;
+extern int brdtyp;
+extern int cpumod;
+#endif
+
+/*
+ * Values for the brdtyp variable.
+ */
+#define BRD_187		0x187
+#define BRD_188		0x188
+#define BRD_197		0x197
+#define BRD_8120	0x8120
+
+/*
+ * Values for the cputyp variable.
+ */
+#define CPU_88100	0x100
+#define CPU_88110	0x110
+
+/*
+ * Values for the cpumod variable.
+ */
+#define MOD_LE		0x01
+#define MOD_SP		0x02
+#define MOD_DP		0x03
+
+#endif /* !_MACHINE_PARAM_H_ */
+
+
diff --git a/sys/arch/luna88k/include/pcb.h b/sys/arch/luna88k/include/pcb.h
new file mode 100644
index 00000000000..3df7ed511e6
--- /dev/null
+++ b/sys/arch/luna88k/include/pcb.h
@@ -0,0 +1,149 @@
+/*	$OpenBSD: pcb.h,v 1.1 2004/04/21 15:23:57 aoyama Exp $ */
+/*
+ * Copyright (c) 1996 Nivas Madhur
+ * Mach Operating System
+ * Copyright (c) 1993-1992 Carnegie Mellon University
+ * All Rights Reserved.
+ *
+ * Permission to use, copy, modify and distribute this software and its
+ * documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON AND OMRON ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION.  CARNEGIE MELLON AND OMRON DISCLAIM ANY LIABILITY OF ANY KIND
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie Mellon
+ * the rights to redistribute these changes.
+ */
+/*
+ * Motorola 88100 pcb definitions
+ *
+ */
+/*
+ */
+#ifndef _M88K_PCB_H_
+#define _M88K_PCB_H_
+
+#include <machine/reg.h>
+
+/*
+ * Our PCB is the regular PCB+Save area for kernel frame.
+ * Upon entering kernel mode from user land, save the user context
+ * in the saved_state area - this is passed as the exception frame.
+ * On a context switch, only registers that need to be saved by the
+ * C calling convention and few other regs (pc, psr etc) are saved
+ * in the kernel_state part of the PCB. Typically, trap frames are
+ * saved on the stack (by low level handlers or by hardware) but,
+ * we just decided to do it in the PCB.
+ */
+
+struct m88100_pcb {
+	unsigned pcb_pc;	/* address to return */
+	unsigned pcb_ipl;
+	unsigned pcb_r14;
+	unsigned pcb_r15;
+	unsigned pcb_r16;
+	unsigned pcb_r17;
+	unsigned pcb_r18;
+	unsigned pcb_r19;
+	unsigned pcb_r20;
+	unsigned pcb_r21;
+	unsigned pcb_r22;
+	unsigned pcb_r23;
+	unsigned pcb_r24;
+	unsigned pcb_r25;
+	unsigned pcb_r26;
+	unsigned pcb_r27;
+	unsigned pcb_r28;
+	unsigned pcb_r29;
+	unsigned pcb_r30;
+	unsigned pcb_sp; 	/* kernel stack pointer */
+	/* floating-point state */
+	unsigned pcb_fcr62;
+	unsigned pcb_fcr63;
+};
+
+struct trapframe {
+	struct reg	tf_regs;
+	register_t	tf_vector;	/* exception vector number */
+	register_t	tf_mask;	/* interrupt mask level */
+	register_t	tf_mode;	/* interrupt mode */
+	register_t	tf_scratch1;	/* reserved for use by locore */
+	register_t	tf_ipfsr;	/* P BUS status */
+	register_t	tf_dpfsr;	/* P BUS status */
+	register_t	tf_cpu;		/* cpu number */
+};
+
+#define	tf_r		tf_regs.r
+#define	tf_sp		tf_regs.r[31]
+#define	tf_epsr		tf_regs.epsr
+#define	tf_fpsr		tf_regs.fpsr
+#define	tf_fpcr		tf_regs.fpcr
+#define	tf_sxip		tf_regs.sxip
+#define	tf_snip		tf_regs.snip
+#define	tf_sfip		tf_regs.sfip
+#define	tf_exip		tf_regs.sxip
+#define	tf_enip		tf_regs.snip
+#define	tf_ssbr		tf_regs.ssbr
+#define	tf_dmt0		tf_regs.dmt0
+#define	tf_dmd0		tf_regs.dmd0
+#define	tf_dma0		tf_regs.dma0
+#define	tf_dmt1		tf_regs.dmt1
+#define	tf_dmd1		tf_regs.dmd1
+#define	tf_dma1		tf_regs.dma1
+#define	tf_dmt2		tf_regs.dmt2
+#define	tf_dmd2		tf_regs.dmd2
+#define	tf_dma2		tf_regs.dma2
+#define	tf_duap		tf_regs.ssbr
+#define	tf_dsr		tf_regs.dmt0
+#define	tf_dlar		tf_regs.dmd0
+#define	tf_dpar		tf_regs.dma0
+#define	tf_isr		tf_regs.dmt1
+#define	tf_ilar		tf_regs.dmd1
+#define	tf_ipar		tf_regs.dma1
+#define	tf_isap		tf_regs.dmt2
+#define	tf_dsap		tf_regs.dmd2
+#define	tf_iuap		tf_regs.dma2
+#define	tf_fpecr	tf_regs.fpecr
+#define	tf_fphs1	tf_regs.fphs1
+#define	tf_fpls1	tf_regs.fpls1
+#define	tf_fphs2	tf_regs.fphs2
+#define	tf_fpls2	tf_regs.fpls2
+#define	tf_fppt		tf_regs.fppt
+#define	tf_fprh		tf_regs.fprh
+#define	tf_fprl		tf_regs.fprl
+#define	tf_fpit		tf_regs.fpit
+
+struct pcb
+{
+	struct m88100_pcb	kernel_state;
+	struct trapframe	user_state;
+	int			pcb_onfault;
+};
+
+/*
+ *	Location of saved user registers for the proc.
+ */
+#define	USER_REGS(p) \
+	(((struct reg *)(&((p)->p_addr->u_pcb.user_state))))
+/*
+ * The pcb is augmented with machine-dependent additional data for
+ * core dumps.  Note that the trapframe here is a copy of the one
+ * from the top of the kernel stack (included here so that the kernel
+ * stack itself need not be dumped).
+ */
+struct md_coredump {
+	struct	trapframe md_tf;
+};
+
+#endif /* _M88K_PCB_H_ */
diff --git a/sys/arch/luna88k/include/pmap.h b/sys/arch/luna88k/include/pmap.h
new file mode 100644
index 00000000000..27ba17dd1b1
--- /dev/null
+++ b/sys/arch/luna88k/include/pmap.h
@@ -0,0 +1,77 @@
+/*	$OpenBSD: pmap.h,v 1.1 2004/04/21 15:23:57 aoyama Exp $ */
+/*
+ * Mach Operating System
+ * Copyright (c) 1991 Carnegie Mellon University
+ * Copyright (c) 1991 OMRON Corporation
+ * All Rights Reserved.
+ *
+ * Permission to use, copy, modify and distribute this software and its
+ * documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ */
+#ifndef _MACHINE_PMAP_H_
+#define _MACHINE_PMAP_H_
+
+#include <machine/mmu.h>
+#include <machine/pcb.h>
+
+/*
+ * PMAP structure
+ */
+
+/* #define PMAP_USE_BATC */
+struct pmap {
+	sdt_entry_t		*pm_stab;	/* virtual pointer to sdt */
+	u_int32_t		pm_apr;
+	int			pm_count;	/* reference count */
+	/* cpus using of this pmap; NCPU must be <= 32 */
+	u_int32_t		pm_cpus;
+	struct simplelock	pm_lock;
+	struct pmap_statistics	pm_stats;	/* pmap statistics */
+#ifdef	PMAP_USE_BATC
+	u_int32_t		pm_ibatc[BATC_MAX];	/* instruction BATCs */
+	u_int32_t		pm_dbatc[BATC_MAX];	/* data BATCs */
+#endif
+};
+
+#define PMAP_NULL ((pmap_t) 0)
+
+/* 	The PV (Physical to virtual) List.
+ *
+ * For each vm_page_t, pmap keeps a list of all currently valid virtual
+ * mappings of that page. An entry is a pv_entry_t; the list is the
+ * pv_head_table. This is used by things like pmap_remove, when we must
+ * find and remove all mappings for a particular physical page.
+ */
+/* XXX - struct pv_entry moved to vmparam.h because of include ordering issues */
+
+typedef struct pmap *pmap_t;
+typedef struct pv_entry *pv_entry_t;
+
+#ifdef	_KERNEL
+
+extern	pmap_t		kernel_pmap;
+extern	struct pmap	kernel_pmap_store;
+extern	caddr_t		vmmap;
+
+#define	pmap_kernel()			(&kernel_pmap_store)
+#define pmap_resident_count(pmap)	((pmap)->pm_stats.resident_count)
+#define	pmap_wired_count(pmap)		((pmap)->pm_stats.wired_count)
+#define pmap_phys_address(frame)        ((paddr_t)(ptoa(frame)))
+
+#define pmap_copy(dp,sp,d,l,s)		do { /* nothing */ } while (0)
+#define pmap_update(pmap)		do { /* nothing (yet) */ } while (0)
+
+#define	pmap_clear_modify(pg)		pmap_unsetbit(pg, PG_M)
+#define	pmap_clear_reference(pg)	pmap_unsetbit(pg, PG_U)
+
+void pmap_bootstrap(vaddr_t, paddr_t *, paddr_t *, vaddr_t *, vaddr_t *);
+void pmap_cache_ctrl(pmap_t, vaddr_t, vaddr_t, u_int);
+boolean_t pmap_unsetbit(struct vm_page *, int);
+
+#endif	/* _KERNEL */
+
+#endif /* _MACHINE_PMAP_H_ */
diff --git a/sys/arch/luna88k/include/pmap_table.h b/sys/arch/luna88k/include/pmap_table.h
new file mode 100644
index 00000000000..be2a91cb8b1
--- /dev/null
+++ b/sys/arch/luna88k/include/pmap_table.h
@@ -0,0 +1,49 @@
+/*	$OpenBSD: pmap_table.h,v 1.1 2004/04/21 15:23:58 aoyama Exp $ */
+/*
+ * Mach Operating System
+ * Copyright (c) 1992 Carnegie Mellon University
+ * All Rights Reserved.
+ *
+ * Permission to use, copy, modify and distribute this software and its
+ * documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
+ * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie Mellon
+ * the rights to redistribute these changes.
+ */
+
+#ifndef __MACHINE_PMAP_TABLE_H__
+#define __MACHINE_PMAP_TABLE_H__
+
+/*
+ * Built-in mappings list.
+ * An entry is considered invalid if pm_size = 0, and
+ * end of list is indicated by pm_size 0xffffffff
+ */
+typedef struct {
+	vaddr_t		phys_start;	/* in bytes */
+	vaddr_t		virt_start;	/* in bytes */
+	vsize_t		size;		/* in bytes */
+	unsigned int	prot;		/* vm_prot_read, vm_prot_write */
+	unsigned int	cacheability;	/* none, writeback, normal */
+} pmap_table_entry;
+
+typedef const pmap_table_entry *pmap_table_t;
+
+pmap_table_t pmap_table_build(void);
+
+#endif	/* __MACHINE_PMAP_TABLE_H__ */
+
diff --git a/sys/arch/luna88k/include/proc.h b/sys/arch/luna88k/include/proc.h
new file mode 100644
index 00000000000..f5e679e8957
--- /dev/null
+++ b/sys/arch/luna88k/include/proc.h
@@ -0,0 +1,64 @@
+/*	$OpenBSD: proc.h,v 1.1 2004/04/21 15:23:58 aoyama Exp $ */
+/*
+ * Copyright (c) 1992, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This software was developed by the Computer Systems Engineering group
+ * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
+ * contributed to Berkeley.
+ *
+ * All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ *	This product includes software developed by the University of
+ *	California, Lawrence Berkeley Laboratory.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	@(#)proc.h	8.1 (Berkeley) 6/11/93
+ *
+ * from: Header: proc.h,v 1.6 92/11/26 02:04:41 torek Exp  (LBL)
+ */
+
+#ifndef __MACHINE_PROC_H__
+#define __MACHINE_PROC_H__
+
+#include <machine/pcb.h>
+
+/*
+ * Machine-dependent part of the proc structure for mvme88k.
+ */
+struct mdproc {
+	struct   trapframe *md_tf;    /* trap/syscall registers */
+	struct   fpstate *md_fpstate; /* fpu state, if any; always resident */
+	int      md_upte[UPAGES];     /* ptes for mapping u page */
+
+	unsigned md_ss_addr;          /* single step address for ptrace */
+	unsigned md_ss_instr;         /* single step instruction for ptrace */
+	unsigned md_ss_taken_addr;    /* single step address for ptrace */
+	unsigned md_ss_taken_instr;   /* single step instruction for ptrace */
+};
+
+#endif /* __MACHINE_PROC_H__ */
+
diff --git a/sys/arch/luna88k/include/psl.h b/sys/arch/luna88k/include/psl.h
new file mode 100644
index 00000000000..82afeafef2a
--- /dev/null
+++ b/sys/arch/luna88k/include/psl.h
@@ -0,0 +1,93 @@
+/*	$OpenBSD: psl.h,v 1.1 2004/04/21 15:23:58 aoyama Exp $ */
+/*
+ * Copyright (c) 1996 Nivas Madhur
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *      This product includes software developed by Nivas Madhur.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/*
+ * Mach Operating System
+ * Copyright (c) 1991 Carnegie Mellon University
+ * Copyright (c) 1991 OMRON Corporation
+ * All Rights Reserved.
+ *
+ * Permission to use, copy, modify and distribute this software and its
+ * documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ */
+
+#ifndef __M88K_PSL_H__
+#define __M88K_PSL_H__
+
+/*
+ * 88100 control registers
+ */
+
+/*
+ * processor identification register (PID)
+ */
+#define PID_ARN		0x0000FF00U	/* architectural revision number */
+#define PID_VN		0x000000FEU	/* version number */
+#define PID_MC		0x00000001U	/* master/checker */
+
+/*
+ * processor status register
+ */
+
+#define PSR_MODE	0x80000000U	/* supervisor/user mode */
+#define PSR_BO		0x40000000U	/* byte-ordering 0:big 1:little */
+#define PSR_SER		0x20000000U	/* 88110 serial mode */
+#define PSR_C		0x10000000U	/* carry */
+#define PSR_SGN		0x04000000U	/* 88110 Signed Immediate mode */
+#define PSR_SRM		0x02000000U	/* 88110 Serialize Memory */
+#define PSR_TRACE	0x00800000U	/* 88110 hardware trace */
+#define PSR_SFD		0x000003E0U	/* SFU disable */
+#define PSR_SFD2	0x00000010U	/* 88110 SFU2 (Graphics) disable */
+#define PSR_SFD1	0x00000008U	/* SFU1 (FPU) disable */
+#define PSR_MXM		0x00000004U	/* misaligned access enable */
+#define PSR_IND		0x00000002U	/* interrupt disable */
+#define PSR_SFRZ	0x00000001U	/* shadow freeze */
+
+#define PSR_SUPERVISOR	(PSR_MODE | PSR_SFD)
+#define PSR_USER	(PSR_SFD)
+#define PSR_SET_BY_USER	(PSR_BO | PSR_SER | PSR_C | PSR_MXM)
+
+#define FIP_V		0x00000002U	/* valid */
+#define FIP_E		0x00000001U	/* exception */
+#define FIP_ADDR	0xFFFFFFFCU	/* address mask */
+#define NIP_V		0x00000002U	/* valid */
+#define NIP_E		0x00000001U	/* exception */
+#define NIP_ADDR	0xFFFFFFFCU	/* address mask */
+#define XIP_V		0x00000002U	/* valid */
+#define XIP_E		0x00000001U	/* exception */
+#define XIP_ADDR	0xFFFFFFFCU	/* address mask */
+
+#endif /* __M88K_PSL_H__ */
+
diff --git a/sys/arch/luna88k/include/ptrace.h b/sys/arch/luna88k/include/ptrace.h
new file mode 100644
index 00000000000..d375507d13b
--- /dev/null
+++ b/sys/arch/luna88k/include/ptrace.h
@@ -0,0 +1,62 @@
+/*	$OpenBSD: ptrace.h,v 1.1 2004/04/21 15:23:58 aoyama Exp $ */
+/*
+ * Copyright (c) 1999, Steve Murphree, Jr.
+ * Copyright (c) 1992, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This software was developed by the Computer Systems Engineering group
+ * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
+ * contributed to Berkeley.
+ *
+ * All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ *	This product includes software developed by the University of
+ *	California, Lawrence Berkeley Laboratory.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	@(#)ptrace.h	8.1 (Berkeley) 6/11/93
+ *
+ * from: Header: ptrace.h,v 1.6 92/11/26 02:04:43 torek Exp  (LBL)
+ */
+
+/*
+ * m88k-dependent ptrace definitions.
+ */
+
+#ifndef __MACHINE_PTRACE_H__
+#define __MACHINE_PTRACE_H__
+
+#define	PT_STEP		(PT_FIRSTMACH + 0)
+#define	PT_GETREGS	(PT_FIRSTMACH + 1)
+#define	PT_SETREGS	(PT_FIRSTMACH + 2)
+#define	PT_GETFPREGS	(PT_FIRSTMACH + 3)
+#define	PT_SETFPREGS	(PT_FIRSTMACH + 4)
+
+#ifdef _KERNEL
+int cpu_singlestep(struct proc *);
+#endif
+
+#endif /* __MACHINE_PTRACE_H__ */
diff --git a/sys/arch/luna88k/include/reg.h b/sys/arch/luna88k/include/reg.h
new file mode 100644
index 00000000000..893a32042ea
--- /dev/null
+++ b/sys/arch/luna88k/include/reg.h
@@ -0,0 +1,90 @@
+/*	$OpenBSD: reg.h,v 1.1 2004/04/21 15:23:58 aoyama Exp $ */
+/*
+ * Copyright (c) 1999 Steve Murphree, Jr.
+ * Copyright (c) 1996 Nivas Madhur
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *      This product includes software developed by Nivas Madhur.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef _M88K_REG_H_
+#define _M88K_REG_H_
+
+struct reg {
+	unsigned int	r[32];  /* 0 - 31 */
+	unsigned int	epsr;   /* 32 */
+	unsigned int	fpsr;
+	unsigned int	fpcr;
+	unsigned int	sxip;
+#define exip sxip	/* mc88110 */
+	unsigned int	snip;
+#define enip snip	/* mc88110 */
+	unsigned int	sfip;
+	unsigned int	ssbr;
+#define duap ssbr	/* mc88110 */
+	unsigned int	dmt0;
+#define dsr dmt0	/* mc88110 */
+	unsigned int	dmd0;
+#define dlar dmd0	/* mc88110 */
+	unsigned int	dma0;
+#define dpar dma0	/* mc88110 */
+	unsigned int	dmt1;
+#define isr dmt1	/* mc88110 */
+	unsigned int	dmd1;
+#define ilar dmd1	/* mc88110 */
+	unsigned int	dma1;
+#define ipar dma1	/* mc88110 */
+	unsigned int	dmt2;
+#define isap dmt2	/* mc88110 */
+	unsigned int	dmd2;
+#define dsap dmd2	/* mc88110 */
+	unsigned int	dma2;
+#define iuap dma2	/* mc88110 */
+	unsigned int	fpecr;
+	unsigned int	fphs1;
+	unsigned int	fpls1;
+	unsigned int	fphs2;
+	unsigned int	fpls2;
+	unsigned int	fppt;
+	unsigned int	fprh;
+	unsigned int	fprl;
+	unsigned int	fpit;
+};
+
+struct fpreg {
+	unsigned int	fp_fpecr;
+	unsigned int	fp_fphs1;
+	unsigned int	fp_fpls1;
+	unsigned int	fp_fphs2;
+	unsigned int	fp_fpls2;
+	unsigned int	fp_fppt;
+	unsigned int	fp_fprh;
+	unsigned int	fp_fprl;
+	unsigned int	fp_fpit;
+};
+
+#endif /* _M88K_REG_H_ */
diff --git a/sys/arch/luna88k/include/setjmp.h b/sys/arch/luna88k/include/setjmp.h
new file mode 100644
index 00000000000..aa7ab9e888a
--- /dev/null
+++ b/sys/arch/luna88k/include/setjmp.h
@@ -0,0 +1,9 @@
+/*	$OpenBSD: setjmp.h,v 1.1 2004/04/21 15:23:58 aoyama Exp $	*/
+
+/*
+ * machine/setjmp.h: machine dependent setjmp-related information.
+ */
+#ifndef __MACHINE_SETJMP_H__
+#define __MACHINE_SETJMP_H__
+#define	_JBLEN	21		/* size, in longs, of a jmp_buf */
+#endif /* __MACHINE_SETJMP_H__ */
diff --git a/sys/arch/luna88k/include/signal.h b/sys/arch/luna88k/include/signal.h
new file mode 100644
index 00000000000..abda50594f8
--- /dev/null
+++ b/sys/arch/luna88k/include/signal.h
@@ -0,0 +1,56 @@
+/*	$OpenBSD: signal.h,v 1.1 2004/04/21 15:23:58 aoyama Exp $ */
+/*
+ * Copyright (c) 1996 Nivas Madhur
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *      This product includes software developed by Nivas Madhur.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef __MACHINE_SIGNAL_H__
+#define __MACHINE_SIGNAL_H__
+
+#include <machine/reg.h>
+
+typedef int sig_atomic_t;
+
+/*
+ * Information pushed on stack when a signal is delivered.
+ * This is used by the kernel to restore state following
+ * execution of the signal handler. It is also made available
+ * to the handler to allow it to restore state properly if
+ * a non-standard exit is performed.
+ *
+ * All machines must have an sc_onstack and sc_mask.
+ */
+struct  sigcontext {
+        int     sc_onstack;             /* sigstack state to restore */
+        int     sc_mask;                /* signal mask to restore */
+	/* begin machine dependent portion */
+	struct reg sc_regs;
+};
+
+#endif /* __MACHINE_SIGNAL_H__ */
diff --git a/sys/arch/luna88k/include/spinlock.h b/sys/arch/luna88k/include/spinlock.h
new file mode 100644
index 00000000000..c9a2369f12f
--- /dev/null
+++ b/sys/arch/luna88k/include/spinlock.h
@@ -0,0 +1,10 @@
+/*	$OpenBSD: spinlock.h,v 1.1 2004/04/21 15:23:58 aoyama Exp $	*/
+
+#ifndef _M88K_SPINLOCK_H_
+#define _M88K_SPINLOCK_H_
+
+#define _SPINLOCK_UNLOCKED	(0)
+#define _SPINLOCK_LOCKED	(1)
+typedef int _spinlock_lock_t;
+
+#endif
diff --git a/sys/arch/luna88k/include/stdarg.h b/sys/arch/luna88k/include/stdarg.h
new file mode 100644
index 00000000000..95f5e13ab06
--- /dev/null
+++ b/sys/arch/luna88k/include/stdarg.h
@@ -0,0 +1,16 @@
+/*	$OpenBSD: stdarg.h,v 1.1 2004/04/21 15:23:58 aoyama Exp $	*/
+
+#ifndef _M88K_STDARGS_H_
+#define _M88K_STDARGS_H_
+
+#include <machine/ansi.h>
+
+#ifndef	_STDARG_H
+#define	_STDARG_H
+#endif
+
+#include <machine/va-m88k.h>
+
+typedef	_BSD_VA_LIST_	va_list;
+
+#endif	/* _M88K_STDARGS_H_ */
diff --git a/sys/arch/luna88k/include/trap.h b/sys/arch/luna88k/include/trap.h
new file mode 100644
index 00000000000..d328d37464e
--- /dev/null
+++ b/sys/arch/luna88k/include/trap.h
@@ -0,0 +1,78 @@
+/*	$OpenBSD: trap.h,v 1.1 2004/04/21 15:23:58 aoyama Exp $ */
+/*
+ * Mach Operating System
+ * Copyright (c) 1992 Carnegie Mellon University
+ * All Rights Reserved.
+ *
+ * Permission to use, copy, modify and distribute this software and its
+ * documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
+ * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie Mellon
+ * the rights to redistribute these changes.
+ */
+/*
+ * Trap codes
+ */
+#ifndef __MACHINE_TRAP_H__
+#define __MACHINE_TRAP_H__
+
+/*
+ * Trap type values
+ */
+
+#define T_RESADFLT	0	/* reserved addressing fault */
+#define T_PRIVINFLT	1	/* privileged instruction fault */
+#define T_RESOPFLT	2	/* reserved operand fault */
+#define T_INSTFLT	3	/* instruction access exception */
+#define T_DATAFLT	4	/* data access exception */
+#define T_MISALGNFLT	5	/* misaligned access exception */
+#define T_ILLFLT	6	/* unimplemented opcode exception */
+#define T_BNDFLT	7	/* bounds check violation exception */
+#define T_ZERODIV	8	/* illegal divide exception */
+#define T_OVFFLT	9	/* integer overflow exception */
+#define T_ERRORFLT	10	/* error exception */
+#define T_FPEPFLT	11	/* floating point precise exception */
+#define T_FPEIFLT	12	/* floating point imprecise exception */
+#define T_ASTFLT	13	/* software trap */
+#define	T_KDB_ENTRY	14	/* force entry to kernel debugger */
+#define T_KDB_BREAK	15	/* break point hit */
+#define T_KDB_TRACE	16	/* trace */
+#define T_UNKNOWNFLT	17	/* unknown exception */
+#define T_SIGTRAP	18	/* generate SIGTRAP */
+#define T_SIGSYS	19	/* generate SIGSYS */
+#define T_STEPBPT	20	/* special breakpoint for single step */
+#define T_USERBPT	21	/* user set breakpoint (for debugger) */
+#define T_SYSCALL	22	/* Syscall */
+#define T_NON_MASK	23	/* MVME197 Non-Maskable Interrupt */
+#define	T_KDB_WATCH	24	/* watchpoint hit */
+#define T_197_READ	25	/* MVME197 Data Read Miss (Software Table Searches) */
+#define T_197_WRITE	26	/* MVME197 Data Write Miss (Software Table Searches) */
+#define T_197_INST	27	/* MVME197 Inst ATC Miss (Software Table Searches) */
+#define T_INT		28	/* interrupt exception */
+#define T_USER		29	/* user mode fault */
+
+#ifndef _LOCORE
+
+void m88100_trap(unsigned, struct trapframe *);
+void m88100_syscall(register_t, struct trapframe *);
+
+void m88110_trap(unsigned, struct trapframe *);
+void m88110_syscall(register_t, struct trapframe *);
+
+#endif /* _LOCORE */
+
+#endif /* __MACHINE_TRAP_H__ */
diff --git a/sys/arch/luna88k/include/types.h b/sys/arch/luna88k/include/types.h
new file mode 100644
index 00000000000..562e969a0ad
--- /dev/null
+++ b/sys/arch/luna88k/include/types.h
@@ -0,0 +1,80 @@
+/*	$NetBSD: types.h,v 1.7 1995/07/05 17:46:11 pk Exp $ */
+/*	$OpenBSD: types.h,v 1.1 2004/04/21 15:23:58 aoyama Exp $ */
+
+/*
+ * Copyright (c) 1992, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This software was developed by the Computer Systems Engineering group
+ * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
+ * contributed to Berkeley.
+ *
+ * All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ *	This product includes software developed by the University of
+ *	California, Lawrence Berkeley Laboratory.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	@(#)types.h	8.1 (Berkeley) 6/11/93
+ */
+
+#ifndef	_MACHTYPES_H_
+#define	_MACHTYPES_H_
+
+#include <sys/cdefs.h>
+
+#if !defined(_ANSI_SOURCE) && !defined(_POSIX_SOURCE)
+typedef struct label_t {
+	int val[19];
+} label_t;
+#endif
+
+typedef unsigned long	vaddr_t;
+typedef unsigned long	paddr_t;
+typedef unsigned long	vsize_t;
+typedef unsigned long	psize_t;
+
+/*
+ * Basic integral types.  Omit the typedef if
+ * not possible for a machine/compiler combination.
+ */
+#define	__BIT_TYPES_DEFINED__
+typedef	__signed char		   int8_t;
+typedef	unsigned char		 u_int8_t;
+typedef	unsigned char		  uint8_t;
+typedef	short			  int16_t;
+typedef	unsigned short		u_int16_t;
+typedef	unsigned short		 uint16_t;
+typedef	int			  int32_t;
+typedef	unsigned int		u_int32_t;
+typedef	unsigned int		 uint32_t;
+typedef	long long		  int64_t;
+typedef	unsigned long long	u_int64_t;
+typedef	unsigned long long	 uint64_t;
+
+typedef int32_t			register_t;
+
+#endif	/* _MACHTYPES_H_ */
diff --git a/sys/arch/luna88k/include/va-m88k.h b/sys/arch/luna88k/include/va-m88k.h
new file mode 100644
index 00000000000..4e1e6b58ea1
--- /dev/null
+++ b/sys/arch/luna88k/include/va-m88k.h
@@ -0,0 +1,82 @@
+/*	$OpenBSD: va-m88k.h,v 1.1 2004/04/21 15:23:58 aoyama Exp $	*/
+
+/* This file has local changes by MOTOROLA
+Thu Sep  9 09:06:29 CDT 1993 Dale Rahn (drahn@pacific)
+	* Due to C-Front's usage of __alignof__ builtin the
+	usage of it must be changed to have an object of that type
+	as the argument not just the type.
+ */
+/* GNU C varargs support for the Motorola 88100  */
+
+/* Define __gnuc_va_list.  */
+
+#ifndef __GNUC_VA_LIST
+#define __GNUC_VA_LIST
+
+typedef struct __va_list_tag {
+	unsigned int  __va_arg;		/* argument number */
+	unsigned int *__va_stk;		/* start of args passed on stack */
+	unsigned int *__va_reg;		/* start of args passed in regs */
+} __va_list[1], __gnuc_va_list[1];
+
+#endif /* not __GNUC_VA_LIST */
+
+/* If this is for internal libc use, don't define anything but
+   __gnuc_va_list.  */
+#if defined (_STDARG_H) || defined (_VARARGS_H)
+
+#define __va_start_common(AP,FAKE) \
+__extension__ ({							\
+   (AP) = (struct __va_list_tag *)__builtin_alloca(sizeof(__gnuc_va_list)); \
+  __builtin_memcpy ((AP), __builtin_saveregs (), sizeof(__gnuc_va_list)); \
+  })
+
+#ifdef _STDARG_H /* stdarg.h support */
+
+/* Calling __builtin_next_arg gives the proper error message if LASTARG is
+   not indeed the last argument.  */
+#define va_start(AP,LASTARG) \
+  (__builtin_next_arg (LASTARG), __va_start_common (AP, 0))
+
+#else /* varargs.h support */
+
+#define va_start(AP) __va_start_common (AP, 1)
+#define va_alist __va_1st_arg
+#define va_dcl register int va_alist; ...
+
+#endif /* _STDARG_H */
+
+#define __va_reg_p(TYPE) \
+  (__builtin_classify_type(*(TYPE *)0) < 12 \
+   ? sizeof(TYPE) <= 8 : sizeof(TYPE) == 4 && __alignof__(*(TYPE *)0) == 4)
+
+#define	__va_size(TYPE) ((sizeof(TYPE) + 3) >> 2)
+
+/* We cast to void * and then to TYPE * because this avoids
+   a warning about increasing the alignment requirement.  */
+#define va_arg(AP,TYPE)							   \
+  ( (AP)->__va_arg = (((AP)->__va_arg + (1 << (__alignof__(*(TYPE *)0) >> 3)) - 1) \
+		     & ~((1 << (__alignof__(*(TYPE *)0) >> 3)) - 1))	   \
+    + __va_size(TYPE),							   \
+    *((TYPE *) (void *) ((__va_reg_p(TYPE)				   \
+			  && (AP)->__va_arg < 8 + __va_size(TYPE)	   \
+			  ? (AP)->__va_reg : (AP)->__va_stk)		   \
+			 + ((AP)->__va_arg - __va_size(TYPE)))))
+
+#define va_end(AP)
+
+/* Copy __gnuc_va_list into another variable of this type.  */
+#define __va_copy(dest, src) \
+__extension__ ({ \
+	(dest) =  \
+	   (struct __va_list_tag *)__builtin_alloca(sizeof(__gnuc_va_list)); \
+	*(dest) = *(src);\
+  })
+
+#if !defined(_ANSI_SOURCE) && \
+    (!defined(_POSIX_C_SOURCE) && !defined(_XOPEN_SOURCE) || \
+	defined(_ISOC99_SOURCE) || (__STDC_VERSION__ - 0) >= 199901L)
+#define va_copy(dest, src) __va_copy(dest, src)
+#endif
+
+#endif /* defined (_STDARG_H) || defined (_VARARGS_H) */
diff --git a/sys/arch/luna88k/include/varargs.h b/sys/arch/luna88k/include/varargs.h
new file mode 100644
index 00000000000..f85d4737ace
--- /dev/null
+++ b/sys/arch/luna88k/include/varargs.h
@@ -0,0 +1,13 @@
+/*	$OpenBSD: varargs.h,v 1.1 2004/04/21 15:23:58 aoyama Exp $	*/
+
+#ifndef _M88K_VARARGS_H_
+#define _M88K_VARARGS_H_
+
+#define	_VARARGS_H
+
+#include <machine/ansi.h>
+#include <machine/va-m88k.h>
+
+typedef	_BSD_VA_LIST_	va_list;
+
+#endif	/* _M88K_VARARGS_H_ */
diff --git a/sys/arch/luna88k/include/vmparam.h b/sys/arch/luna88k/include/vmparam.h
new file mode 100644
index 00000000000..129ef221832
--- /dev/null
+++ b/sys/arch/luna88k/include/vmparam.h
@@ -0,0 +1,133 @@
+/*	$OpenBSD: vmparam.h,v 1.1 2004/04/21 15:23:58 aoyama Exp $ */
+/*
+ * Mach Operating System
+ * Copyright (c) 1992 Carnegie Mellon University
+ * All Rights Reserved.
+ *
+ * Permission to use, copy, modify and distribute this software and its
+ * documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
+ * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie Mellon
+ * the rights to redistribute these changes.
+ */
+
+/*
+ *	machine dependent virtual memory parameters.
+ */
+
+
+#ifndef	_MACHINE_VM_PARAM_
+#define _MACHINE_VM_PARAM_
+
+/*
+ * USRTEXT is the start of the user text/data space, while USRSTACK
+ * is the top (end) of the user stack.
+ */
+#define	USRTEXT		0x1000			/* Start of user text */
+#define	USRSTACK	0x80000000		/* Start of user stack */
+
+/*
+ * Virtual memory related constants, all in bytes
+ */
+#ifndef MAXTSIZ
+#define	MAXTSIZ		(8*1024*1024)		/* max text size */
+#endif
+#ifndef DFLDSIZ
+#define	DFLDSIZ		(32*1024*1024)		/* initial data size limit */
+#endif
+#ifndef MAXDSIZ
+#define	MAXDSIZ		(64*1024*1024)		/* max data size */
+#endif
+#ifndef	DFLSSIZ
+#define	DFLSSIZ		(2*1024*1024)		/* initial stack size limit */
+#endif
+#ifndef	MAXSSIZ
+#define	MAXSSIZ		MAXDSIZ			/* max stack size */
+#endif
+
+/*
+ * Size of shared memory map
+ */
+#ifndef SHMMAXPGS
+#define SHMMAXPGS	1024
+#endif
+
+/*
+ * The time for a process to be blocked before being very swappable.
+ * This is a number of seconds which the system takes as being a non-trivial
+ * amount of real time.  You probably shouldn't change this;
+ * it is used in subtle ways (fractions and multiples of it are, that is, like
+ * half of a ``long time'', almost a long time, etc.)
+ * It is related to human patience and other factors which don't really
+ * change over time.
+ */
+#define	MAXSLP 		20
+
+#define	VM_MIN_ADDRESS		((vaddr_t) 0)
+#define	VM_MAX_ADDRESS		((vaddr_t) 0xffc00000)
+#define VM_MAXUSER_ADDRESS	VM_MAX_ADDRESS
+
+/* on vme188, max = 0xf0000000 */
+
+#define VM_MIN_KERNEL_ADDRESS	((vaddr_t) 0)
+#define VM_MAX_KERNEL_ADDRESS	((vaddr_t) 0x20000000)
+
+#define KERNEL_STACK_SIZE	(3 * PAGE_SIZE)	/* kernel stack size */
+#define INTSTACK_SIZE		(4 * PAGE_SIZE)	/* interrupt stack size */
+
+/* virtual sizes (bytes) for various kernel submaps */
+#define VM_PHYS_SIZE		(1 * NPTEPG * PAGE_SIZE)
+
+/*
+ * Constants which control the way the VM system deals with memory segments.
+ * The mvme88k only has one physical memory segment.
+ */
+#define	VM_PHYSSEG_MAX		1
+#define	VM_PHYSSEG_STRAT	VM_PSTRAT_BSEARCH
+#define	VM_PHYSSEG_NOADD
+
+#define VM_NFREELIST		1
+#define VM_FREELIST_DEFAULT	0
+
+#ifndef _LOCORE
+/*
+ * pmap-specific data stored in the vm_physmem[] array.
+ */
+
+/* XXX - belongs in pmap.h, but put here because of ordering issues */
+struct pv_entry {
+	struct pv_entry	*pv_next;	/* next pv_entry */
+	struct pmap	*pv_pmap;	/* pmap where mapping lies */
+	vaddr_t		pv_va;		/* virtual address for mapping */
+	int		pv_flags;
+};
+
+#define	__HAVE_VM_PAGE_MD
+struct vm_page_md {
+	struct pv_entry pvent;
+};
+
+#define	VM_MDPAGE_INIT(pg) do {			\
+	(pg)->mdpage.pvent.pv_next = NULL;	\
+	(pg)->mdpage.pvent.pv_pmap = PMAP_NULL;	\
+	(pg)->mdpage.pvent.pv_va = 0;		\
+	(pg)->mdpage.pvent.pv_flags = 0;	\
+} while (0)
+
+#endif /* _LOCORE */
+
+#endif /* _MACHINE_VM_PARAM_ */