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authorMiod Vallat <miod@cvs.openbsd.org>2024-03-03 11:03:14 +0000
committerMiod Vallat <miod@cvs.openbsd.org>2024-03-03 11:03:14 +0000
commitff85caf196e34729455e7d5fcf8507a6c963a624 (patch)
treeef3f80fd07bf6ea3946e3f9c0df87d8918657052 /sys/arch/m88k
parent7c0627865bb445062dff313cf817835d9c5ec7f2 (diff)
Workaround a 88100 errata where a FPU imprecise exception may be raised
for floating-point-to-int conversions by mistake (these instructions are not supposed to raise this exception).
Diffstat (limited to 'sys/arch/m88k')
-rw-r--r--sys/arch/m88k/m88k/m88100_fp.c20
1 files changed, 19 insertions, 1 deletions
diff --git a/sys/arch/m88k/m88k/m88100_fp.c b/sys/arch/m88k/m88k/m88100_fp.c
index 199e0191904..250cfe3fc14 100644
--- a/sys/arch/m88k/m88k/m88100_fp.c
+++ b/sys/arch/m88k/m88k/m88100_fp.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: m88100_fp.c,v 1.5 2020/08/19 10:10:58 mpi Exp $ */
+/* $OpenBSD: m88100_fp.c,v 1.6 2024/03/03 11:03:13 miod Exp $ */
/*
* Copyright (c) 2007, 2014, Miodrag Vallat.
@@ -356,6 +356,24 @@ m88100_fpu_imprecise_exception(struct trapframe *frame)
__asm__ volatile ("fstcr %r0, %fcr0");
/*
+ * The 88100 errata for mask C82N (rev 0x0a) documents that an
+ * imprecise exception may be raised for integer instructions
+ * returning an inexact result.
+ * However, there is nothing to do in this case, since the result
+ * is not a floating-point value, and has been correctly put in
+ * the destination register; we simply need to to ignore that
+ * exception.
+ */
+ switch ((frame->tf_fpit >> 11) & 0x1f) {
+ case 0x09: /* int */
+ case 0x0a: /* nint */
+ case 0x0b: /* trnc */
+ return;
+ default:
+ break;
+ }
+
+ /*
* Pick the inexact result, build a float32 or a float64 out of it, and
* normalize it to the destination width.
*/