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authorMiod Vallat <miod@cvs.openbsd.org>2009-12-07 19:06:00 +0000
committerMiod Vallat <miod@cvs.openbsd.org>2009-12-07 19:06:00 +0000
commit53e1c67a5dae79bc59f1199125c850bf2a57dfc0 (patch)
tree32c1b7e026610e5658bf45d41972e9e4f68d6f02 /sys/arch/mips64/include/cpu.h
parent6787a6dee8a58db4796d89947bb1f7e765b3b73b (diff)
Support for 16KB page size kernels; page size is now set in <machine/param.h>
rather than <mips64/param.h>. For now, kernels are kept at 4KB to give people some time to build 16KB compatible binaries; this will change before the end of this release cycle. Use of 16KB page size kernels yields a 18% speedup (which, offset by the 1.6% slowdown caused by the pmap changes, yields a 16.6% overall speedup).
Diffstat (limited to 'sys/arch/mips64/include/cpu.h')
-rw-r--r--sys/arch/mips64/include/cpu.h11
1 files changed, 6 insertions, 5 deletions
diff --git a/sys/arch/mips64/include/cpu.h b/sys/arch/mips64/include/cpu.h
index f17c7ffa028..8ef35ced8ef 100644
--- a/sys/arch/mips64/include/cpu.h
+++ b/sys/arch/mips64/include/cpu.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: cpu.h,v 1.46 2009/11/25 17:39:51 syuu Exp $ */
+/* $OpenBSD: cpu.h,v 1.47 2009/12/07 19:05:57 miod Exp $ */
/*-
* Copyright (c) 1992, 1993
@@ -554,12 +554,13 @@ extern u_int CpuOnboardCacheOn; /* RM7K */
struct tlb_entry;
struct user;
-void tlb_set_wired(int);
-void tlb_set_pid(int);
-u_int cp0_get_prid(void);
-u_int cp1_get_prid(void);
u_int cp0_get_count(void);
+u_int cp0_get_prid(void);
void cp0_set_compare(u_int);
+u_int cp1_get_prid(void);
+void tlb_set_page_mask(uint32_t);
+void tlb_set_pid(int);
+void tlb_set_wired(int);
/*
* Define soft selected cache functions.