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authorTakuya ASADA <syuu@cvs.openbsd.org>2010-09-13 21:59:08 +0000
committerTakuya ASADA <syuu@cvs.openbsd.org>2010-09-13 21:59:08 +0000
commitadbda52fbb890551925233cce5dda0908c890d5c (patch)
tree3e25a173d41bc2fa520c71eb06a13b687e083a78 /sys/arch/mips64/include/cpu.h
parentd0cd63a90f50fe5328147657a1a166d40d4978d8 (diff)
Added OCTEON in cpu type. ok miod@
Diffstat (limited to 'sys/arch/mips64/include/cpu.h')
-rw-r--r--sys/arch/mips64/include/cpu.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/sys/arch/mips64/include/cpu.h b/sys/arch/mips64/include/cpu.h
index c2aa30758d7..cbd48fcee14 100644
--- a/sys/arch/mips64/include/cpu.h
+++ b/sys/arch/mips64/include/cpu.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: cpu.h,v 1.61 2010/09/12 18:30:19 miod Exp $ */
+/* $OpenBSD: cpu.h,v 1.62 2010/09/13 21:59:07 syuu Exp $ */
/*-
* Copyright (c) 1992, 1993
@@ -544,6 +544,7 @@ void cpu_startclock(struct cpu_info *);
#define MIPS_R4000 0x04 /* MIPS R4000/4400 CPU ISA III */
#define MIPS_R3LSI 0x05 /* LSI Logic R3000 derivate ISA I */
#define MIPS_R6000A 0x06 /* MIPS R6000A CPU ISA II */
+#define MIPS_OCTEON 0x06 /* Cavium OCTEON MIPS64R2*/
#define MIPS_R3IDT 0x07 /* IDT R3000 derivate ISA I */
#define MIPS_R10000 0x09 /* MIPS R10000/T5 CPU ISA IV */
#define MIPS_R4200 0x0a /* MIPS R4200 CPU (ICE) ISA III */