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authorVisa Hankala <visa@cvs.openbsd.org>2019-08-21 16:14:35 +0000
committerVisa Hankala <visa@cvs.openbsd.org>2019-08-21 16:14:35 +0000
commit8cb1a48eef9deacb41419fd5c2bf34a9e1665667 (patch)
tree739549f5371c619d7e5a9957ae1cb0e6f8688cf7 /sys/arch/mips64/include
parent4f74f46798e48f16726d9230265d67293e730884 (diff)
Fix a race in invalidation of remote TLB entries.
If a CPU updates a pmap concurrently with the activation of that pmap on another CPU, invalidation of TLB entries might be incomplete. It is also possible that a CPU altogether stops updating its TLB. Prevent the race by synchronizing pmap activations and logic that determines where to send TLB invalidation IPIs. To avoid mutex wait without ability to process IPIs, the context switch code is adjusted to call pmap_activate() with interrupts enabled. In practice, interrupts up to IPL_SCHED are still disabled on context switch.
Diffstat (limited to 'sys/arch/mips64/include')
-rw-r--r--sys/arch/mips64/include/pmap.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/sys/arch/mips64/include/pmap.h b/sys/arch/mips64/include/pmap.h
index df76f26e314..b38f09aa01f 100644
--- a/sys/arch/mips64/include/pmap.h
+++ b/sys/arch/mips64/include/pmap.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: pmap.h,v 1.47 2018/10/22 17:31:25 krw Exp $ */
+/* $OpenBSD: pmap.h,v 1.48 2019/08/21 16:14:34 visa Exp $ */
/*
* Copyright (c) 1987 Carnegie-Mellon University
@@ -117,6 +117,7 @@ struct pmap_asid_info {
*/
typedef struct pmap {
struct mutex pm_mtx; /* pmap lock */
+ struct mutex pm_swmtx; /* pmap switch lock */
int pm_count; /* pmap reference count */
struct pmap_statistics pm_stats; /* pmap statistics */
struct segtab *pm_segtab; /* pointers to pages of PTEs */