diff options
author | Visa Hankala <visa@cvs.openbsd.org> | 2022-01-28 16:20:10 +0000 |
---|---|---|
committer | Visa Hankala <visa@cvs.openbsd.org> | 2022-01-28 16:20:10 +0000 |
commit | 2e6994a186e75b71c30bf7b3a5762bfabf77e8a0 (patch) | |
tree | 8aa7f57e5743fff1ecd0c6bd25ec41aaa2652776 /sys/arch/mips64 | |
parent | ec30c32b460b570e53144bee953c49c0b990b22c (diff) |
Remove unused guarded read and write routines.
No objection from miod@
Diffstat (limited to 'sys/arch/mips64')
-rw-r--r-- | sys/arch/mips64/include/cpu.h | 7 | ||||
-rw-r--r-- | sys/arch/mips64/include/trap.h | 3 | ||||
-rw-r--r-- | sys/arch/mips64/mips64/lcore_access.S | 126 |
3 files changed, 3 insertions, 133 deletions
diff --git a/sys/arch/mips64/include/cpu.h b/sys/arch/mips64/include/cpu.h index 83202954dd9..451aa7861ba 100644 --- a/sys/arch/mips64/include/cpu.h +++ b/sys/arch/mips64/include/cpu.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.h,v 1.137 2021/10/07 13:08:17 visa Exp $ */ +/* $OpenBSD: cpu.h,v 1.138 2022/01/28 16:20:09 visa Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -426,11 +426,6 @@ void MipsSaveCurFPState16(struct proc *); void MipsSwitchFPState(struct proc *, struct trapframe *); void MipsSwitchFPState16(struct proc *, struct trapframe *); -int guarded_read_1(paddr_t, uint8_t *); -int guarded_read_2(paddr_t, uint16_t *); -int guarded_read_4(paddr_t, uint32_t *); -int guarded_write_4(paddr_t, uint32_t); - void MipsFPTrap(struct trapframe *); register_t MipsEmulateBranch(struct trapframe *, vaddr_t, uint32_t, uint32_t); diff --git a/sys/arch/mips64/include/trap.h b/sys/arch/mips64/include/trap.h index 4e087910aa2..adee5b1c7d4 100644 --- a/sys/arch/mips64/include/trap.h +++ b/sys/arch/mips64/include/trap.h @@ -1,4 +1,4 @@ -/* $OpenBSD: trap.h,v 1.16 2014/04/09 21:10:34 miod Exp $ */ +/* $OpenBSD: trap.h,v 1.17 2022/01/28 16:20:09 visa Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -77,7 +77,6 @@ #define KT_COPYERR 1 /* User space copy error */ #define KT_KCOPYERR 2 /* Kernel space copy error */ #define KT_DDBERR 3 /* DDB access error */ -#define KT_GUARDERR 4 /* guarded access error */ #ifndef _LOCORE diff --git a/sys/arch/mips64/mips64/lcore_access.S b/sys/arch/mips64/mips64/lcore_access.S index 3be8ea655a4..36ec534e2f4 100644 --- a/sys/arch/mips64/mips64/lcore_access.S +++ b/sys/arch/mips64/mips64/lcore_access.S @@ -1,4 +1,4 @@ -/* $OpenBSD: lcore_access.S,v 1.31 2021/05/01 16:11:11 visa Exp $ */ +/* $OpenBSD: lcore_access.S,v 1.32 2022/01/28 16:20:09 visa Exp $ */ /* * Copyright (c) 2001-2003 Opsycon AB (www.opsycon.se / www.opsycon.com) @@ -64,7 +64,6 @@ onfault_table: #else PTR_VAL 0 #endif - PTR_VAL _guarderr .text /* @@ -326,126 +325,3 @@ _kcopyerr: PTR_ADDU sp, sp, FRAMESZ(CF_SZ + REGSZ) j ra li v0, EFAULT # return error - -/* - * Guarded ``memory'' access routines - * int guarded_read_1(paddr_t address, uint8_t *dest); - * int guarded_read_2(paddr_t address, uint16_t *dest); - * int guarded_read_4(paddr_t address, uint32_t *dest); - * int guarded_write_4(paddr_t address, uint32_t src); - */ - -LEAF(guarded_read_1, 0) - GET_CPU_INFO(t1, t0) - PTR_L t3, CI_CURPROCPADDR(t1) - - li a3, SR_BOOT_EXC_VEC - MFC0 a2, COP_0_STATUS_REG - or a4, a2, a3 - xor a4, a4, a3 - - li v0, KT_GUARDERR - lw v1, PCB_ONFAULT(t3) - sw v0, PCB_ONFAULT(t3) - - MTC0 a4, COP_0_STATUS_REG - MTC0_HAZARD - - lb v0, 0(a0) - sb v0, 0(a1) - - MTC0 a2, COP_0_STATUS_REG - MTC0_HAZARD - - sw v1, PCB_ONFAULT(t3) - j ra - move v0, zero -END(guarded_read_1) - -LEAF(guarded_read_2, 0) - GET_CPU_INFO(t1, t0) - PTR_L t3, CI_CURPROCPADDR(t1) - - li a3, SR_BOOT_EXC_VEC - MFC0 a2, COP_0_STATUS_REG - or a4, a2, a3 - xor a4, a4, a3 - - li v0, KT_GUARDERR - lw v1, PCB_ONFAULT(t3) - sw v0, PCB_ONFAULT(t3) - - MTC0 a4, COP_0_STATUS_REG - MTC0_HAZARD - - lh v0, 0(a0) - sh v0, 0(a1) - - MTC0 a2, COP_0_STATUS_REG - MTC0_HAZARD - - sw v1, PCB_ONFAULT(t3) - j ra - move v0, zero -END(guarded_read_2) - -LEAF(guarded_read_4, 0) - GET_CPU_INFO(t1, t0) - PTR_L t3, CI_CURPROCPADDR(t1) - - li a3, SR_BOOT_EXC_VEC - MFC0 a2, COP_0_STATUS_REG - or a4, a2, a3 - xor a4, a4, a3 - - li v0, KT_GUARDERR - lw v1, PCB_ONFAULT(t3) - sw v0, PCB_ONFAULT(t3) - - MTC0 a4, COP_0_STATUS_REG - MTC0_HAZARD - - lw v0, 0(a0) - sw v0, 0(a1) - - MTC0 a2, COP_0_STATUS_REG - MTC0_HAZARD - - sw v1, PCB_ONFAULT(t3) - j ra - move v0, zero -END(guarded_read_4) - -LEAF(guarded_write_4, 0) - GET_CPU_INFO(t1, t0) - PTR_L t3, CI_CURPROCPADDR(t1) - - li a3, SR_BOOT_EXC_VEC - MFC0 a2, COP_0_STATUS_REG - or a4, a2, a3 - xor a4, a4, a3 - - li v0, KT_GUARDERR - lw v1, PCB_ONFAULT(t3) - sw v0, PCB_ONFAULT(t3) - - MTC0 a4, COP_0_STATUS_REG - MTC0_HAZARD - - sw a1, 0(a0) - - MTC0 a2, COP_0_STATUS_REG - MTC0_HAZARD - - sw v1, PCB_ONFAULT(t3) - j ra - move v0, zero -END(guarded_write_4) - -_guarderr: - MTC0 a2, COP_0_STATUS_REG - MTC0_HAZARD - - sw v1, PCB_ONFAULT(t3) - j ra - li v0, EFAULT # return error |