octeon's internal counter clock speed is same as the processor clock. ok miod@

2 files changed, 47 insertions, 7 deletions

diff --git a/sys/arch/mips64/mips64/clock.c b/sys/arch/mips64/mips64/clock.c
index 4237351a1d7..614b05dea77 100644
--- a/sys/arch/mips64/mips64/clock.c
+++ b/sys/arch/mips64/mips64/clock.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: clock.c,v 1.34 2010/09/20 06:33:47 matthew Exp $ */
+/*	$OpenBSD: clock.c,v 1.35 2011/05/10 07:42:16 syuu Exp $ */
 
 /*
  * Copyright (c) 2001-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -194,7 +194,11 @@ delay(int n)
 
 	delayconst = ci->ci_delayconst;
 	if (delayconst == 0)
+#if CPU_OCTEON
+		delayconst = bootcpu_hwinfo.clock;
+#else
 		delayconst = bootcpu_hwinfo.clock / 2;
+#endif
 	p = cp0_get_count();
 	dly = (delayconst / 1000000) * n;
 	while (dly > 0) {
@@ -262,7 +266,11 @@ cpu_initclocks()
 	tick = 1000000 / hz;	/* number of micro-seconds between interrupts */
 	tickadj = 240000 / (60 * hz);		/* can adjust 240ms in 60s */
 
+#ifdef CPU_OCTEON
+	cp0_timecounter.tc_frequency = (uint64_t)ci->ci_hw.clock;
+#else
 	cp0_timecounter.tc_frequency = (uint64_t)ci->ci_hw.clock / 2;
+#endif
 	tc_init(&cp0_timecounter);
 	cpu_startclock(ci);
 }
@@ -285,7 +293,11 @@ cpu_startclock(struct cpu_info *ci)
 
 	/* Start the clock. */
 	s = splclock();
+#ifdef CPU_OCTEON
+	ci->ci_cpu_counter_interval = (ci->ci_hw.clock) / hz;
+#else
 	ci->ci_cpu_counter_interval = (ci->ci_hw.clock / 2) / hz;
+#endif
 	ci->ci_cpu_counter_last = cp0_get_count() + ci->ci_cpu_counter_interval;
 	cp0_set_compare(ci->ci_cpu_counter_last);
 	ci->ci_clock_started++;
diff --git a/sys/arch/mips64/mips64/ipifuncs.c b/sys/arch/mips64/mips64/ipifuncs.c
index f1fa738794a..e306e8e886e 100644
--- a/sys/arch/mips64/mips64/ipifuncs.c
+++ b/sys/arch/mips64/mips64/ipifuncs.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: ipifuncs.c,v 1.6 2010/08/30 08:52:10 syuu Exp $ */
+/* $OpenBSD: ipifuncs.c,v 1.7 2011/05/10 07:42:16 syuu Exp $ */
 /* $NetBSD: ipifuncs.c,v 1.40 2008/04/28 20:23:10 martin Exp $ */
 
 /*-
@@ -42,6 +42,8 @@
 #include <machine/intr.h>
 #include <machine/atomic.h>
 
+#include <ddb/db_output.h>
+
 static int	mips64_ipi_intr(void *);
 static void	mips64_ipi_nop(void);
 static void	smp_rendezvous_action(void);
@@ -160,6 +162,15 @@ mips64_ipi_nop(void)
 #endif
 }
 
+#if defined(MP_LOCKDEBUG)
+#ifndef DDB
+#error "MP_LOCKDEBUG requires DDB"
+#endif
+
+/* CPU-dependent timing, needs this to be settable from ddb. */
+extern int __mp_lock_spinout;
+#endif
+
 /*
  * All-CPU rendezvous.  CPUs are signalled, all execute the setup function 
  * (if specified), rendezvous, execute the action function (if specified),
@@ -169,18 +180,26 @@ mips64_ipi_nop(void)
  * Note that the supplied external functions _must_ be reentrant and aware
  * that they are running in parallel and in an unknown lock context.
  */
-
 void
 smp_rendezvous_action(void)
 {
 	void* local_func_arg = smp_rv_func_arg;
 	void (*local_action_func)(void*) = smp_rv_action_func;
 	unsigned int cpumask = 1 << cpu_number();
+#ifdef MP_LOCKDEBUG
+	int ticks = __mp_lock_spinout;
+#endif
 
 	/* Ensure we have up-to-date values. */
 	atomic_setbits_int(&smp_rv_waiters[0], cpumask);
-	while (smp_rv_waiters[0] != smp_rv_map)
-		;
+	while (smp_rv_waiters[0] != smp_rv_map) {
+#ifdef MP_LOCKDEBUG
+		if (--ticks == 0) {
+			db_printf("smp_rendezvous_action timeout\n");
+			Debugger();
+		} 
+#endif
+	}
 
 	/* action function */
 	if (local_action_func != NULL)
@@ -196,6 +215,9 @@ smp_rendezvous_cpus(unsigned long map,
 	void *arg)
 {
 	unsigned int cpumask = 1 << cpu_number();
+#ifdef MP_LOCKDEBUG
+	int ticks = __mp_lock_spinout;
+#endif
 
 	if (ncpus == 1) {
 		if (action_func != NULL)
@@ -220,8 +242,14 @@ smp_rendezvous_cpus(unsigned long map,
 	if (map & cpumask)
 		smp_rendezvous_action();
 
-	while (smp_rv_waiters[1] != smp_rv_map)
-		;
+	while (smp_rv_waiters[1] != smp_rv_map) {
+#ifdef MP_LOCKDEBUG
+		if (--ticks == 0) {
+			db_printf("smp_rendezvous_action timeout\n");
+			Debugger();
+		} 
+#endif
+	}
 	/* release lock */
 	mtx_leave(&smp_ipi_mtx);
 }