diff options
| author | Visa Hankala <visa@cvs.openbsd.org> | 2018-12-13 16:35:08 +0000 |
|---|---|---|
| committer | Visa Hankala <visa@cvs.openbsd.org> | 2018-12-13 16:35:08 +0000 |
| commit | 8f8f28d969b9db6e73884422cca47c953b806f1d (patch) | |
| tree | 18338e7d4d7538140dd87c6b38c2985a992d7bae /sys/arch/mips64 | |
| parent | 900eed1ec714253d6c2f2f15ca4adbe281098bb5 (diff) | |
Use a faster, more reliable way to figure out how many TLB entries are
available on RM7000 processors.
From miod@
Diffstat (limited to 'sys/arch/mips64')
| -rw-r--r-- | sys/arch/mips64/mips64/tlbhandler.S | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/sys/arch/mips64/mips64/tlbhandler.S b/sys/arch/mips64/mips64/tlbhandler.S index 4c726a75db4..481e24a17d8 100644 --- a/sys/arch/mips64/mips64/tlbhandler.S +++ b/sys/arch/mips64/mips64/tlbhandler.S @@ -1,4 +1,4 @@ -/* $OpenBSD: tlbhandler.S,v 1.47 2016/12/22 15:33:36 visa Exp $ */ +/* $OpenBSD: tlbhandler.S,v 1.48 2018/12/13 16:35:07 visa Exp $ */ /* * Copyright (c) 1995-2004 Opsycon AB (www.opsycon.se / www.opsycon.com) @@ -686,6 +686,18 @@ LEAF(tlb_set_wired, 0) nop END(tlb_set_wired) +#ifdef CPU_RM7000 +/* + * Similar to tlb_set_wired() above, but returns the value of the random + * register. + */ +LEAF(tlb_set_wired_get_random, 0) + mtc0 a0, COP_0_TLB_WIRED + j ra + mfc0 v0, COP_0_TLB_RANDOM +END(tlb_set_wired_get_random) +#endif + /* * Initialize the TLB page mask. */ |