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authorDale S. Rahn <rahnds@cvs.openbsd.org>1997-03-03 19:32:35 +0000
committerDale S. Rahn <rahnds@cvs.openbsd.org>1997-03-03 19:32:35 +0000
commit90ff5a441368313fa226376473fea6908c2c3539 (patch)
tree38e1de6dcfb2805194734736d7209f51e06fa9e1 /sys/arch/mvme88k/machine/asm_macro.h
parent7848f1c3b3e234584c90f67e60c6164590478f49 (diff)
Third try at importing the mvme88k port. This is a working kernel
from nivas. Userland and compiler still need to be worked on. Make certain what directory the import is done from.
Diffstat (limited to 'sys/arch/mvme88k/machine/asm_macro.h')
-rw-r--r--sys/arch/mvme88k/machine/asm_macro.h116
1 files changed, 116 insertions, 0 deletions
diff --git a/sys/arch/mvme88k/machine/asm_macro.h b/sys/arch/mvme88k/machine/asm_macro.h
new file mode 100644
index 00000000000..55cd2c1d25d
--- /dev/null
+++ b/sys/arch/mvme88k/machine/asm_macro.h
@@ -0,0 +1,116 @@
+/*
+ * Mach Operating System
+ * Copyright (c) 1993-1991 Carnegie Mellon University
+ * Copyright (c) 1991 OMRON Corporation
+ * All Rights Reserved.
+ *
+ * Permission to use, copy, modify and distribute this software and its
+ * documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON AND OMRON ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION. CARNEGIE MELLON AND OMRON DISCLAIM ANY LIABILITY OF ANY KIND
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
+ * School of Computer Science
+ * Carnegie Mellon University
+ * Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+/*
+ * HISTORY
+ * $Log: asm_macro.h,v $
+ * Revision 1.1 1997/03/03 19:30:24 rahnds
+ * Initial revision
+ *
+ * Revision 2.2 93/01/26 18:07:26 danner
+ * Created.
+ * [93/01/24 jfriedl]
+ *
+ */
+
+#ifndef __M88K_ASM_MACRO_H__
+#define __M88K_ASM_MACRO_H__
+
+/*
+ ** Various compiler macros used for speed and efficiency.
+ ** Anyone can include.
+ */
+
+/*
+ * PSR_TYPE is the type of the Process Status Register.
+ */
+typedef unsigned long m88k_psr_type;
+
+/*
+ * disable_interrupts_return_psr()
+ *
+ * The INTERRUPT_DISABLE bit is set in the PSR and the *PREVIOUS*
+ * PSR is returned. Intended to be used with set_psr() [below] as in:
+ *
+ * {
+ * m88k_psr_type psr;
+ * .
+ * .
+ * psr = disable_interrupts_return_psr();
+ * .
+ * SHORT [time-wise] CRITICAL SECTION HERE
+ * .
+ * set_psr(psr);
+ * .
+ * .
+ */
+static inline m88k_psr_type disable_interrupts_return_psr(void)
+{
+ m88k_psr_type temp, oldpsr;
+ asm volatile (
+ "ldcr %0, cr1 \n"
+ "set %1, %0, 1<1> \n"
+ "stcr %1, cr1 \n"
+ "tcnd ne0, r0, 0 " : "=r" (oldpsr), "=r" (temp));
+ return oldpsr;
+}
+#define disable_interrupt() (void)disable_interrupts_return_psr()
+
+/*
+ * Sets the PSR. See comments above.
+ */
+static inline void set_psr(m88k_psr_type psr)
+{
+ asm volatile ("stcr %0, cr1" :: "r" (psr));
+}
+
+/*
+ * Enables interrupts.
+ */
+static inline m88k_psr_type enable_interrupts_return_psr(void)
+{
+ m88k_psr_type temp, oldpsr; /* need a temporary register */
+ asm volatile (
+ "ldcr %0, cr1 \n"
+ "clr %1, %0, 1<1> \n"
+ "stcr %1, cr1 " : "=r" (oldpsr), "=r" (temp));
+ return oldpsr;
+}
+#define enable_interrupt() (void)enable_interrupts_return_psr()
+
+#define db_enable_interrupt enable_interrupt
+#define db_disable_interrupt disable_interrupt
+
+/*
+ * flushes the data pipeline.
+ */
+static inline void flush_pipeline()
+{
+ asm volatile ("tcnd ne0, r0, 0");
+}
+#define db_flush_pipeline flush_pipeline
+
+#endif /* __M88K_ASM_MACRO_H__ */