Split octeon interrupt code into a glue layer and a CIU driver.

This makes possible to add drivers for other interrupt controllers
on the platform.

The glue layer has been derived from arm64/armv7.

1 files changed, 23 insertions, 2 deletions

diff --git a/sys/arch/octeon/include/intr.h b/sys/arch/octeon/include/intr.h
index 0956a02def9..1b905f83840 100644
--- a/sys/arch/octeon/include/intr.h
+++ b/sys/arch/octeon/include/intr.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: intr.h,v 1.11 2017/06/18 11:05:20 visa Exp $ */
+/*	$OpenBSD: intr.h,v 1.12 2017/06/18 13:58:45 visa Exp $ */
 
 /*
  * Copyright (c) 2001-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -184,14 +184,35 @@ void	set_intr(int, uint32_t, uint32_t(*)(uint32_t, struct trapframe *));
 uint32_t updateimask(uint32_t);
 void	dosoftint(void);
 
+struct intr_controller {
+	void	  *ic_cookie;
+	void	 (*ic_init)(void);
+	void	*(*ic_establish)(int, int, int (*)(void *), void *,
+		    const char *);
+	void	*(*ic_establish_fdt_idx)(void *, int, int, int,
+		    int (*)(void *), void *, const char *);
+	void	 (*ic_disestablish)(void *);
+
+#ifdef MULTIPROCESSOR
+	int	 (*ic_ipi_establish)(int (*)(void *), cpuid_t);
+	void	 (*ic_ipi_set)(cpuid_t);
+	void	 (*ic_ipi_clear)(cpuid_t);
+#endif /* MULTIPROCESSOR */
+
+	int	   ic_node;
+	int	   ic_phandle;
+	LIST_ENTRY(intr_controller) ic_list;
+};
+
 #ifdef MULTIPROCESSOR
 #define ENABLEIPI() updateimask(~CR_INT_1) /* enable IPI interrupt level */
 #endif
-void	octeon_intr_init(void);
+
 void   *octeon_intr_establish(int, int, int (*)(void *),
 	    void *, const char *);
 void	octeon_intr_disestablish(void *);
 void	octeon_intr_init(void);
+void	octeon_intr_register(struct intr_controller *);
 
 void	*octeon_intr_establish_fdt(int, int, int (*)(void *),
 	    void *, const char *);