diff options
| author | Dale Rahn <drahn@cvs.openbsd.org> | 2001-11-05 22:26:58 +0000 |
|---|---|---|
| committer | Dale Rahn <drahn@cvs.openbsd.org> | 2001-11-05 22:26:58 +0000 |
| commit | e45e51059ce9ca535b377adfc9a87566382d8f1e (patch) | |
| tree | 8467fd2523374710f8abb0fb8b0b280177c85615 /sys/arch/powerpc | |
| parent | 9289a58f6152b14fc74bd3e2180109415be07420 (diff) | |
Workaround to prevent Altivec Unavilable problem.
Why did Motorola put this exception misaligned with respect to all other
exceptions?
Altivec is not supported. This will cause any process executing altivec
instructions to recieve an illegal instruction signal.
Diffstat (limited to 'sys/arch/powerpc')
| -rw-r--r-- | sys/arch/powerpc/powerpc/trap.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/sys/arch/powerpc/powerpc/trap.c b/sys/arch/powerpc/powerpc/trap.c index 5cad508fb23..d5778172955 100644 --- a/sys/arch/powerpc/powerpc/trap.c +++ b/sys/arch/powerpc/powerpc/trap.c @@ -1,4 +1,4 @@ -/* $OpenBSD: trap.c,v 1.33 2001/09/20 13:46:04 drahn Exp $ */ +/* $OpenBSD: trap.c,v 1.34 2001/11/05 22:26:57 drahn Exp $ */ /* $NetBSD: trap.c,v 1.3 1996/10/13 03:31:37 christos Exp $ */ /* @@ -413,6 +413,14 @@ for (i = 0; i < errnum; i++) { break; } + /* This is not really a perf exception, but is an ALTIVEC unavail + * which we do not handle, kill the process with illegal instruction. + */ + case EXC_PERF|EXC_USER: + sv.sival_int = frame->srr0; + trapsignal(p, SIGILL, 0, ILL_ILLOPC, sv); + break; + case EXC_AST|EXC_USER: /* This is just here that we trap */ break; |