diff options
| author | Kenneth R Westerback <krw@cvs.openbsd.org> | 2018-10-22 17:31:26 +0000 |
|---|---|---|
| committer | Kenneth R Westerback <krw@cvs.openbsd.org> | 2018-10-22 17:31:26 +0000 |
| commit | 434c76b446722a16c01e2876accd9f0fb6dc1840 (patch) | |
| tree | fc76c6aebe35d7f050d1b1756ad5a64a22e6c2d4 /sys/arch/powerpc | |
| parent | af2a4a3e76ab12afc46cc2224c71d38fd0511e40 (diff) | |
More "explicitely" -> "explicitly" in various comments.
ok guenther@ tb@ deraadt@
Diffstat (limited to 'sys/arch/powerpc')
| -rw-r--r-- | sys/arch/powerpc/powerpc/pmap.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/sys/arch/powerpc/powerpc/pmap.c b/sys/arch/powerpc/powerpc/pmap.c index 2adb27d3f4b..e85e69785ca 100644 --- a/sys/arch/powerpc/powerpc/pmap.c +++ b/sys/arch/powerpc/powerpc/pmap.c @@ -1,4 +1,4 @@ -/* $OpenBSD: pmap.c,v 1.167 2017/05/16 20:52:54 kettenis Exp $ */ +/* $OpenBSD: pmap.c,v 1.168 2018/10/22 17:31:25 krw Exp $ */ /* * Copyright (c) 2015 Martin Pieuchot @@ -1086,7 +1086,7 @@ pmap_zero_page(struct vm_page *pg) /* * Loop over & zero cache lines. This code assumes that 64-bit - * CPUs have 128-byte cache lines. We explicitely use ``dcbzl'' + * CPUs have 128-byte cache lines. We explicitly use ``dcbzl'' * here because we do not clear the DCBZ_SIZE bit of the HID5 * register in order to be compatible with code using ``dcbz'' * and assuming that cache line size is 32. |