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authorMark Kettenis <kettenis@cvs.openbsd.org>2022-12-29 11:35:02 +0000
committerMark Kettenis <kettenis@cvs.openbsd.org>2022-12-29 11:35:02 +0000
commitee90c601aaa241e50187c2be95213e4f4ec0a40e (patch)
tree330057ad28bae36ecc30dd2bc3ec94c5ad1666bf /sys/arch/riscv64/include
parent5a0d6275947e329e587c2a43e5aa6fc00006eb6b (diff)
Avoid doing cache flush/invalidate operations for DMA memory allocated with
the BUS_DMA_COHERENT flag. ok miod@
Diffstat (limited to 'sys/arch/riscv64/include')
-rw-r--r--sys/arch/riscv64/include/bus.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/sys/arch/riscv64/include/bus.h b/sys/arch/riscv64/include/bus.h
index 2e7c71d5716..14a324c04d3 100644
--- a/sys/arch/riscv64/include/bus.h
+++ b/sys/arch/riscv64/include/bus.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: bus.h,v 1.4 2021/05/12 01:20:52 jsg Exp $ */
+/* $OpenBSD: bus.h,v 1.5 2022/12/29 11:35:01 kettenis Exp $ */
/*
* Copyright (c) 2003-2004 Opsycon AB Sweden. All rights reserved.
@@ -361,6 +361,7 @@ struct machine_bus_dma_segment {
paddr_t _ds_paddr; /* CPU address */
vaddr_t _ds_vaddr; /* CPU address */
+ int _ds_coherent; /* Coherently mapped */
};
typedef struct machine_bus_dma_segment bus_dma_segment_t;