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authorMark Kettenis <kettenis@cvs.openbsd.org>2007-09-04 20:36:53 +0000
committerMark Kettenis <kettenis@cvs.openbsd.org>2007-09-04 20:36:53 +0000
commita785087c8f518f504aa2499776a27def20d8f958 (patch)
tree2e8f7a8d8a6bfb99d744073a325749f481593b56 /sys/arch/sparc64
parentd634e3d96597a69b532b1fcabc08cdf3432dacb2 (diff)
UltraSPARC CPUs always have an on-chip FPU. There really is no need to have
the code to detect the various FPUs of earlier SPARC V7 and V8 CPUs. ok deraadt@, miod@
Diffstat (limited to 'sys/arch/sparc64')
-rw-r--r--sys/arch/sparc64/include/cpu.h3
-rw-r--r--sys/arch/sparc64/sparc64/cpu.c102
-rw-r--r--sys/arch/sparc64/sparc64/trap.c11
3 files changed, 6 insertions, 110 deletions
diff --git a/sys/arch/sparc64/include/cpu.h b/sys/arch/sparc64/include/cpu.h
index 52eced2f583..25ecdad817a 100644
--- a/sys/arch/sparc64/include/cpu.h
+++ b/sys/arch/sparc64/include/cpu.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: cpu.h,v 1.40 2007/05/14 21:38:08 kettenis Exp $ */
+/* $OpenBSD: cpu.h,v 1.41 2007/09/04 20:36:52 kettenis Exp $ */
/* $NetBSD: cpu.h,v 1.28 2001/06/14 22:56:58 thorpej Exp $ */
/*
@@ -191,7 +191,6 @@ extern int want_ast;
* XXX this must be per-cpu (eventually)
*/
extern struct proc *fpproc; /* FPU owner */
-extern int foundfpu; /* true => we have an FPU */
/* machdep.c */
int ldcontrolb(caddr_t);
diff --git a/sys/arch/sparc64/sparc64/cpu.c b/sys/arch/sparc64/sparc64/cpu.c
index c844fdb809a..374b8ae1bec 100644
--- a/sys/arch/sparc64/sparc64/cpu.c
+++ b/sys/arch/sparc64/sparc64/cpu.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: cpu.c,v 1.20 2007/05/02 18:46:07 kettenis Exp $ */
+/* $OpenBSD: cpu.c,v 1.21 2007/09/04 20:36:52 kettenis Exp $ */
/* $NetBSD: cpu.c,v 1.13 2001/05/26 21:27:15 chs Exp $ */
/*
@@ -79,7 +79,6 @@ char machine[] = MACHINE; /* from <machine/param.h> */
char cpu_model[100];
struct proc *fpproc;
-int foundfpu;
int want_ast;
extern int want_resched;
@@ -93,8 +92,6 @@ struct cfattach cpu_ca = {
extern struct cfdriver cpu_cd;
-static char *fsrtoname(int, int, int, char *, size_t);
-
#define IU_IMPL(v) ((((u_int64_t)(v))&VER_IMPL) >> VER_IMPL_SHIFT)
#define IU_VERS(v) ((((u_int64_t)(v))&VER_MASK) >> VER_MASK_SHIFT)
@@ -123,14 +120,12 @@ cpu_attach(parent, dev, aux)
{
int node;
long clk;
- int impl, vers, fver;
+ int impl, vers;
char *cpuname;
- char *fpuname;
struct mainbus_attach_args *ma = aux;
struct fpstate64 *fpstate;
struct fpstate64 fps[2];
char *sep;
- char fpbuf[40];
register int i, l;
u_int64_t ver;
extern u_int64_t cpu_clockrate[];
@@ -148,15 +143,9 @@ cpu_attach(parent, dev, aux)
*/
fpstate->fs_fsr = 7 << FSR_VER_SHIFT; /* 7 is reserved for "none" */
savefpstate(fpstate);
- fver = (fpstate->fs_fsr >> FSR_VER_SHIFT) & (FSR_VER >> FSR_VER_SHIFT);
ver = getver();
impl = IU_IMPL(ver);
vers = IU_VERS(ver);
- if (fver != 7) {
- foundfpu = 1;
- fpuname = fsrtoname(impl, vers, fver, fpbuf, sizeof fpbuf);
- } else
- fpuname = "no";
/* tell them what we have */
node = ma->ma_node;
@@ -175,9 +164,8 @@ cpu_attach(parent, dev, aux)
cpuname = getpropstring(node, "name");
if (strcmp(cpuname, "cpu") == 0)
cpuname = getpropstring(node, "compatible");
- snprintf(cpu_model, sizeof cpu_model,
- "%s (rev %d.%d) @ %s MHz, %s FPU", cpuname,
- vers >> 4, vers & 0xf, clockfreq(clk), fpuname);
+ snprintf(cpu_model, sizeof cpu_model, "%s (rev %d.%d) @ %s MHz",
+ cpuname, vers >> 4, vers & 0xf, clockfreq(clk));
printf(": %s\n", cpu_model);
cacheinfo.c_physical = 1; /* Dunno... */
@@ -292,88 +280,6 @@ cpu_attach(parent, dev, aux)
}
}
-/*
- * The following tables convert <IU impl, IU version, FPU version> triples
- * into names for the CPU and FPU chip. In most cases we do not need to
- * inspect the FPU version to name the IU chip, but there is one exception
- * (for Tsunami), and this makes the tables the same.
- *
- * The table contents (and much of the structure here) are from Guy Harris.
- *
- */
-struct info {
- u_char valid;
- u_char iu_impl;
- u_char iu_vers;
- u_char fpu_vers;
- char *name;
-};
-
-#define ANY 0xff /* match any FPU version (or, later, IU version) */
-
-
-/* NB: table order matters here; specific numbers must appear before ANY. */
-static struct info fpu_types[] = {
- /*
- * Vendor 0, IU Fujitsu0.
- */
- { 1, 0x0, ANY, 0, "MB86910 or WTL1164/5" },
- { 1, 0x0, ANY, 1, "MB86911 or WTL1164/5" },
- { 1, 0x0, ANY, 2, "L64802 or ACT8847" },
- { 1, 0x0, ANY, 3, "WTL3170/2" },
- { 1, 0x0, 4, 4, "on-chip" }, /* Swift */
- { 1, 0x0, ANY, 4, "L64804" },
-
- /*
- * Vendor 1, IU ROSS0/1 or Pinnacle.
- */
- { 1, 0x1, 0xf, 0, "on-chip" }, /* Pinnacle */
- { 1, 0x1, ANY, 0, "L64812 or ACT8847" },
- { 1, 0x1, ANY, 1, "L64814" },
- { 1, 0x1, ANY, 2, "TMS390C602A" },
- { 1, 0x1, ANY, 3, "RT602 or WTL3171" },
-
- /*
- * Vendor 2, IU BIT0.
- */
- { 1, 0x2, ANY, 0, "B5010 or B5110/20 or B5210" },
-
- /*
- * Vendor 4, Texas Instruments.
- */
- { 1, 0x4, ANY, 0, "on-chip" }, /* Viking */
- { 1, 0x4, ANY, 4, "on-chip" }, /* Tsunami */
-
- /*
- * Vendor 5, IU Matsushita0.
- */
- { 1, 0x5, ANY, 0, "on-chip" },
-
- /*
- * Vendor 9, Weitek.
- */
- { 1, 0x9, ANY, 3, "on-chip" },
-
- { 0 }
-};
-
-static char *
-fsrtoname(impl, vers, fver, buf, buflen)
- register int impl, vers, fver;
- char *buf;
- size_t buflen;
-{
- register struct info *p;
-
- for (p = fpu_types; p->valid; p++)
- if (p->iu_impl == impl &&
- (p->iu_vers == vers || p->iu_vers == ANY) &&
- (p->fpu_vers == fver))
- return (p->name);
- snprintf(buf, buflen, "version %x", fver);
- return (buf);
-}
-
struct cfdriver cpu_cd = {
NULL, "cpu", DV_DULL
};
diff --git a/sys/arch/sparc64/sparc64/trap.c b/sys/arch/sparc64/sparc64/trap.c
index 388896d733d..4ef5c0c9e2b 100644
--- a/sys/arch/sparc64/sparc64/trap.c
+++ b/sys/arch/sparc64/sparc64/trap.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: trap.c,v 1.51 2007/07/05 22:16:30 kettenis Exp $ */
+/* $OpenBSD: trap.c,v 1.52 2007/09/04 20:36:52 kettenis Exp $ */
/* $NetBSD: trap.c,v 1.73 2001/08/09 01:03:01 eeh Exp $ */
/*
@@ -544,15 +544,6 @@ badtrap:
fs->fs_qsize = 0;
p->p_md.md_fpstate = fs;
}
- /*
- * If we have not found an FPU, we have to emulate it.
- *
- * Since All UltraSPARC CPUs have an FPU how can this happen?
- */
- if (!foundfpu) {
- trapsignal(p, SIGILL, 0, ILL_COPROC, sv);
- break;
- }
/*
* We may have more FPEs stored up and/or ops queued.