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authorMiod Vallat <miod@cvs.openbsd.org>2006-07-26 21:35:10 +0000
committerMiod Vallat <miod@cvs.openbsd.org>2006-07-26 21:35:10 +0000
commit9e2786347a7934511bb7ca9f8045d41ae0861ce9 (patch)
tree26619b298dfe433d11c4c9e2d2453764e3527e8a /sys/arch/vax
parenta161cadce9f49c87fd4de7634ae53caa55942f86 (diff)
More files which have changed name or location since some time already and
are only confusing things.
Diffstat (limited to 'sys/arch/vax')
-rw-r--r--sys/arch/vax/if/if_zereg.h218
-rw-r--r--sys/arch/vax/uba/uba.c926
-rw-r--r--sys/arch/vax/uba/uba_mainbus.c133
-rw-r--r--sys/arch/vax/uba/ubavar.h183
-rw-r--r--sys/arch/vax/uba/uda.c521
-rw-r--r--sys/arch/vax/vsa/ncr.h76
6 files changed, 0 insertions, 2057 deletions
diff --git a/sys/arch/vax/if/if_zereg.h b/sys/arch/vax/if/if_zereg.h
deleted file mode 100644
index e64ed6f9f42..00000000000
--- a/sys/arch/vax/if/if_zereg.h
+++ /dev/null
@@ -1,218 +0,0 @@
-/* $OpenBSD: if_zereg.h,v 1.2 2003/06/02 23:27:57 millert Exp $ */
-/* $NetBSD: if_zereg.h,v 1.1 1998/07/01 10:52:10 ragge Exp $ */
-/*
- * Copyright (c) 1988 Regents of the University of California.
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Digital Equipment Corp.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-
-/* Driver for SGEC (second generation Ethernet controller) chip, type DC-541,
- found on the KA670 (and prob ably other) CPU.
-
- 17 May 1998...Jay Maynard, jmaynard@phoenix.net
-*/
-
-/* SGEC CSRs */
-struct zedevice {
- u_long ze_nicsr0; /* vector address, IPL, sync mode */
- u_long ze_nicsr1; /* TX poll demand */
- u_long ze_nicsr2; /* RX poll demand */
- struct ze_rdes *ze_nicsr3; /* RX descriptor list address */
- struct ze_tdes *ze_nicsr4; /* TX descriptor list address */
- u_long ze_nicsr5; /* SGEC status */
- u_long ze_nicsr6; /* SGEC command/mode */
- u_long ze_nicsr7; /* system page table base address */
- u_long ze_nivcsr8; /* reserved virtual CSR */
- u_long ze_nivcsr9; /* watchdog timers (virtual) */
- u_long ze_nivcsr10; /* revision, missed frame count (v) */
- u_long ze_nivcsr11; /* boot message verification (low) (v) */
- u_long ze_nivcsr12; /* boot message verification (high) (v) */
- u_long ze_nivcsr13; /* boot message processor (v) */
- u_long ze_nivcsr14; /* diagnostic breakpoint (v) */
- u_long ze_nicsr15; /* monitor command */
-};
-
-/* SGEC bit definitions */
-/* NICSR0: */
-#define ZE_NICSR0_IPL 0xc0000000 /* interrupt priority level: */
-#define ZE_NICSR0_IPL14 0x00000000 /* 0x14 */
-#define ZE_NICSR0_IPL15 0x40000000 /* 0x15 */
-#define ZE_NICSR0_IPL16 0x80000000 /* 0x16 */
-#define ZE_NICSR0_IPL17 0xc0000000 /* 0x17 */
-#define ZE_NICSR0_SA 0x20000000 /* sync(1)/async mode */
-#define ZE_NICSR0_MBO 0x1fff0003 /* must be set to one on write */
-#define ZE_NICSR0_IV_MASK 0x0000fffc /* bits for the interrupt vector */
-
-/* NICSR1: */
-#define ZE_NICSR1_TXPD 0xffffffff /* transmit polling demand */
-
-/* NICSR2: */
-#define ZE_NICSR2_RXPD 0xffffffff /* receive polling demand */
-
-/* NICSR3 and NICSR4 are pure addresses */
-/* NICSR5: */
-#define ZE_NICSR5_ID 0x80000000 /* init done */
-#define ZE_NICSR5_SF 0x40000000 /* self-test failed */
-#define ZE_NICSR5_SS 0x3c000000 /* self-test status field */
-#define ZE_NICSR5_TS 0x03000000 /* transmission state: */
-#define ZE_NICSR5_TS_STOP 0x00000000 /* stopped */
-#define ZE_NICSR5_TS_RUN 0x01000000 /* running */
-#define ZE_NICSR5_TS_SUSP 0x02000000 /* suspended */
-#define ZE_NICSR5_RS 0x00c00000 /* reception state: */
-#define ZE_NICSR5_RS_STOP 0x00000000 /* stopped */
-#define ZE_NICSR5_RS_RUN 0x00400000 /* running */
-#define ZE_NICSR5_RS_SUSP 0x00800000 /* suspended */
-#define ZE_NICSR5_OM 0x00060000 /* operating mode: */
-#define ZE_NICSR5_OM_NORM 0x00000000 /* normal */
-#define ZE_NICSR5_OM_ILBK 0x00020000 /* internal loopback */
-#define ZE_NICSR5_OM_ELBK 0x00040000 /* external loopback */
-#define ZE_NICSR5_OM_DIAG 0x00060000 /* reserved for diags */
-#define ZE_NICSR5_DN 0x00010000 /* virtual CSR access done */
-#define ZE_NICSR5_MBO 0x0038ff00 /* must be one */
-#define ZE_NICSR5_BO 0x00000080 /* boot message received */
-#define ZE_NICSR5_TW 0x00000040 /* transmit watchdog timeout */
-#define ZE_NICSR5_RW 0x00000020 /* receive watchdog timeout */
-#define ZE_NICSR5_ME 0x00000010 /* memory error */
-#define ZE_NICSR5_RU 0x00000008 /* receive buffer unavailable */
-#define ZE_NICSR5_RI 0x00000004 /* receiver interrupt */
-#define ZE_NICSR5_TI 0x00000002 /* transmitter interrupt */
-#define ZE_NICSR5_IS 0x00000001 /* interrupt summary */
-/* whew! */
-
-/* NICSR6: */
-#define ZE_NICSR6_RE 0x80000000 /* reset */
-#define ZE_NICSR6_IE 0x40000000 /* interrupt enable */
-#define ZE_NICSR6_MBO 0x01e7f000 /* must be one */
-#define ZE_NICSR6_BL 0x1e000000 /* burst limit mask */
-#define ZE_NICSR6_BL_8 0x10000000 /* 8 longwords */
-#define ZE_NICSR6_BL_4 0x08000000 /* 4 longwords */
-#define ZE_NICSR6_BL_2 0x04000000 /* 2 longwords */
-#define ZE_NICSR6_BL_1 0x02000000 /* 1 longword */
-#define ZE_NICSR6_BE 0x00100000 /* boot message enable */
-#define ZE_NICSR6_SE 0x00080000 /* single cycle enable */
-#define ZE_NICSR6_ST 0x00000800 /* start(1)/stop(0) transmission */
-#define ZE_NICSR6_SR 0x00000400 /* start(1)/stop(0) reception */
-#define ZE_NICSR6_OM 0x00000300 /* operating mode: */
-#define ZE_NICSR6_OM_NORM 0x00000000 /* normal */
-#define ZE_NICSR6_OM_ILBK 0x00000100 /* internal loopback */
-#define ZE_NICSR6_OM_ELBK 0x00000200 /* external loopback */
-#define ZE_NICSR6_OM_DIAG 0x00000300 /* reserved for diags */
-#define ZE_NICSR6_DC 0x00000080 /* disable data chaining */
-#define ZE_NICSR6_FC 0x00000040 /* force collision mode */
-#define ZE_NICSR6_PB 0x00000008 /* pass bad frames */
-#define ZE_NICSR6_AF 0x00000006 /* address filtering mode: */
-#define ZE_NICSR6_AF_NORM 0x00000000 /* normal filtering */
-#define ZE_NICSR6_AF_PROM 0x00000002 /* promiscuous mode */
-#define ZE_NICSR6_AF_ALLM 0x00000004 /* all multicasts */
-
-/* NICSR7 is an address, NICSR8 is reserved */
-/* NICSR9: */
-#define ZE_VNICSR9_RT 0xffff0000 /* receiver timeout, *1.6 us */
-#define ZE_VNICSR9_TT 0x0000ffff /* transmitter timeout */
-
-/* NICSR10: */
-#define ZE_VNICSR10_RN 0x001f0000 /* SGEC version */
-#define ZE_VNICSR10_MFC 0x0000ffff /* missed frame counter */
-
-/* if you want to know what's in NICSRs 11-15, define them yourself! */
-
-/* Descriptors: */
-/* Receive descriptor */
-struct ze_rdes {
- u_short ze_rdes0; /* descriptor word 0 flags */
- u_short ze_framelen; /* received frame length */
- u_char ze_rsvd1[3]; /* unused bytes */
- u_char ze_rdes1; /* descriptor word 1 flags */
- short ze_pageoffset; /* offset of buffer in page */
- short ze_bufsize; /* length of data buffer */
- u_char *ze_bufaddr; /* address of data buffer */
-};
-
-/* Receive descriptor bits */
-#define ZE_FRAMELEN_OW 0x8000 /* SGEC owns this descriptor */
-#define ZE_RDES0_ES 0x8000 /* an error has occurred */
-#define ZE_RDES0_LE 0x4000 /* length error */
-#define ZE_RDES0_DT 0x3000 /* data type: */
-#define ZE_RDES0_DT_NORM 0x0000 /* normal frame */
-#define ZE_RDES0_DT_ILBK 0x1000 /* internally looped back frame */
-#define ZE_RDES0_DT_ELBK 0x2000 /* externally looped back frame */
-#define ZE_RDES0_RF 0x0800 /* runt frame */
-#define ZE_RDES0_BO 0x0400 /* buffer overflow */
-#define ZE_RDES0_FS 0x0200 /* first segment */
-#define ZE_RDES0_LS 0x0100 /* last segment */
-#define ZE_RDES0_TL 0x0080 /* frame too long */
-#define ZE_RDES0_CS 0x0040 /* collision seen */
-#define ZE_RDES0_FT 0x0020 /* Ethernet frame type */
-#define ZE_RDES0_TN 0x0008 /* address translation not valid */
-#define ZE_RDES0_DB 0x0004 /* dribbling bits seen */
-#define ZE_RDES0_CE 0x0002 /* CRC error */
-#define ZE_RDES0_OF 0x0001 /* internal FIFO overflow */
-#define ZE_RDES1_CA 0x80 /* chain address */
-#define ZE_RDES1_VA 0x40 /* virtual address */
-#define ZE_RDES1_VT 0x20 /* virtual(1)/phys PTE address */
-
-/* Transmit descriptor */
-struct ze_tdes {
- u_short ze_tdes0; /* descriptor word 0 flags */
- u_short ze_tdr; /* TDR count of cable fault */
- u_char ze_rsvd1[2]; /* unused bytes */
- u_short ze_tdes1; /* descriptor word 1 flags */
- short ze_pageoffset; /* offset of buffer in page */
- short ze_bufsize; /* length of data buffer */
- u_char *ze_bufaddr; /* address of data buffer */
-};
-
-/* Receive descriptor bits */
-#define ZE_TDR_OW 0x8000 /* SGEC owns this descriptor */
-#define ZE_TDES0_ES 0x8000 /* an error has occurred */
-#define ZE_TDES0_TO 0x4000 /* transmit watchdog timeout */
-#define ZE_TDES0_LE 0x1000 /* length error */
-#define ZE_TDES0_LO 0x0800 /* loss of carrier */
-#define ZE_TDES0_NC 0x0400 /* no carrier */
-#define ZE_TDES0_LC 0x0200 /* late collision */
-#define ZE_TDES0_EC 0x0100 /* excessive collisions */
-#define ZE_TDES0_HF 0x0080 /* heartbeat fail */
-#define ZE_TDES0_CC 0x0078 /* collision count mask */
-#define ZE_TDES0_TN 0x0004 /* address translation invalid */
-#define ZE_TDES0_UF 0x0002 /* underflow */
-#define ZE_TDES0_DE 0x0001 /* transmission deferred */
-#define ZE_TDES1_CA 0x8000 /* chain address */
-#define ZE_TDES1_VA 0x4000 /* virtual address */
-#define ZE_TDES1_DT 0x3000 /* data type: */
-#define ZE_TDES1_DT_NORM 0x0000 /* normal transmit frame */
-#define ZE_TDES1_DT_SETUP 0x2000 /* setup frame */
-#define ZE_TDES1_DT_DIAG 0x3000 /* diagnostic frame */
-#define ZE_TDES1_AC 0x0800 /* CRC disable */
-#define ZE_TDES1_FS 0x0400 /* first segment */
-#define ZE_TDES1_LS 0x0200 /* last segment */
-#define ZE_TDES1_IC 0x0100 /* interrupt on completion */
-#define ZE_TDES1_VT 0x0080 /* virtual(1)/phys PTE address */
-
diff --git a/sys/arch/vax/uba/uba.c b/sys/arch/vax/uba/uba.c
deleted file mode 100644
index 49d602eeeea..00000000000
--- a/sys/arch/vax/uba/uba.c
+++ /dev/null
@@ -1,926 +0,0 @@
-/* $OpenBSD: uba.c,v 1.23 2006/06/05 08:46:29 miod Exp $ */
-/* $NetBSD: uba.c,v 1.43 2000/01/24 02:40:36 matt Exp $ */
-/*
- * Copyright (c) 1996 Jonathan Stone.
- * Copyright (c) 1994, 1996 Ludd, University of Lule}, Sweden.
- * Copyright (c) 1982, 1986 The Regents of the University of California.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)uba.c 7.10 (Berkeley) 12/16/90
- * @(#)autoconf.c 7.20 (Berkeley) 5/9/91
- */
-
-#include <sys/param.h>
-#include <sys/types.h>
-#include <sys/time.h>
-#include <sys/systm.h>
-#include <sys/extent.h>
-#include <sys/buf.h>
-#include <sys/proc.h>
-#include <sys/user.h>
-#include <sys/conf.h>
-#include <sys/dkstat.h>
-#include <sys/kernel.h>
-#include <sys/malloc.h>
-#include <sys/device.h>
-
-#include <uvm/uvm_extern.h>
-
-#include <machine/pte.h>
-#include <machine/cpu.h>
-#include <machine/mtpr.h>
-#include <machine/nexus.h>
-#include <machine/sid.h>
-#include <machine/scb.h>
-#include <machine/trap.h>
-#include <machine/frame.h>
-
-#include <vax/uba/ubareg.h>
-#include <vax/uba/ubavar.h>
-
-volatile int /* rbr, rcvec,*/ svec;
-
-static int ubasearch(struct device *, struct cfdata *, void *);
-static int ubaprint(void *, const char *);
-#if 0
-static void ubastray(int);
-#endif
-static void ubainitmaps(struct uba_softc *, int);
-
-extern struct cfdriver uba_cd;
-
-#define spluba spl7
-
-#if defined(DW780) || defined(DW750)
-
-int dw_match(struct device *, struct cfdata *, void *);
-
-int
-dw_match(parent, cf, aux)
- struct device *parent;
- struct cfdata *cf;
- void *aux;
-{
- struct sbi_attach_args *sa = (struct sbi_attach_args *)aux;
-
- if ((cf->cf_loc[0] != sa->nexnum) && (cf->cf_loc[0] > -1 ))
- return 0;
-
- /*
- * The uba type is actually only telling where the uba
- * space is in nexus space.
- */
- if ((sa->type & ~3) != NEX_UBA0)
- return 0;
-
- return 1;
-}
-#endif
-
-#ifdef DW780
-/*
- * The DW780 are directly connected to the SBI on 11/780 and 8600.
- */
-void dw780_attach(struct device *, struct device *, void *);
-void dw780_beforescan(struct uba_softc *);
-void dw780_afterscan(struct uba_softc *);
-int dw780_errchk(struct uba_softc *);
-void dw780_init(struct uba_softc *);
-void dw780_purge(struct uba_softc *, int);
-void uba_dw780int(int);
-static void ubaerror(struct uba_softc *, int *, int *);
-
-struct cfattach uba_sbi_ca = {
- sizeof(struct uba_softc), dw_match, dw780_attach
-};
-
-char ubasr_bits[] = UBASR_BITS;
-
-void
-dw780_attach(parent, self, aux)
- struct device *parent, *self;
- void *aux;
-{
- struct uba_softc *sc = (void *)self;
- struct sbi_attach_args *sa = aux;
- int ubaddr = sa->type & 3;
- int i;
-
- printf(": DW780\n");
-
- /*
- * Fill in bus specific data.
- */
- sc->uh_uba = (void *)sa->nexaddr;
- sc->uh_nbdp = NBDP780;
- sc->uh_nr = sa->nexnum * (parent->dv_unit + 1);
- sc->uh_beforescan = dw780_beforescan;
- sc->uh_afterscan = dw780_afterscan;
- sc->uh_errchk = dw780_errchk;
- sc->uh_ubapurge = dw780_purge;
- sc->uh_ubainit = dw780_init;
- sc->uh_type = DW780;
- sc->uh_memsize = UBAPAGES;
- sc->uh_ibase = VAX_NBPG + ubaddr * VAX_NBPG;
- sc->uh_mr = sc->uh_uba->uba_map;
-
- for (i = 0; i < 4; i++)
- scb_vecalloc(256 + i * 64 + sa->nexnum * 4, uba_dw780int,
- sc->uh_dev.dv_unit, SCB_ISTACK);
-
- uba_attach(sc, (parent->dv_unit ? UMEMB8600(ubaddr) :
- UMEMA8600(ubaddr)) + (UBAPAGES * VAX_NBPG));
-}
-
-void
-dw780_beforescan(sc)
- struct uba_softc *sc;
-{
- volatile int *hej = &sc->uh_uba->uba_sr;
-
- *hej = *hej;
- sc->uh_uba->uba_cr = UBACR_IFS|UBACR_BRIE;
-}
-
-void
-dw780_afterscan(sc)
- struct uba_softc *sc;
-{
- sc->uh_uba->uba_cr = UBACR_IFS | UBACR_BRIE |
- UBACR_USEFIE | UBACR_SUEFIE |
- (sc->uh_uba->uba_cr & 0x7c000000);
-}
-
-/*
- * On DW780 badaddr() in uba space sets a bit in uba_sr instead of
- * doing a machine check.
- */
-int
-dw780_errchk(sc)
- struct uba_softc *sc;
-{
- volatile int *hej = &sc->uh_uba->uba_sr;
-
- if (*hej) {
- *hej = *hej;
- return 1;
- }
- return 0;
-}
-
-void
-uba_dw780int(uba)
- int uba;
-{
- int br, vec;
- struct uba_softc *sc = uba_cd.cd_devs[uba];
- struct uba_regs *ur = sc->uh_uba;
-
- br = mfpr(PR_IPL);
- vec = ur->uba_brrvr[br - 0x14];
- if (vec <= 0) {
- ubaerror(sc, &br, (int *)&vec);
- if (svec == 0)
- return;
- }
- if (cold)
- scb_fake(vec + sc->uh_ibase, br);
- else {
- struct ivec_dsp *scb_vec = (struct ivec_dsp *)((int)scb + 512 + vec * 4);
- (*scb_vec->hoppaddr)(scb_vec->pushlarg);
-
- }
-}
-
-void
-dw780_init(sc)
- struct uba_softc *sc;
-{
- sc->uh_uba->uba_cr = UBACR_ADINIT;
- sc->uh_uba->uba_cr = UBACR_IFS|UBACR_BRIE|UBACR_USEFIE|UBACR_SUEFIE;
- while ((sc->uh_uba->uba_cnfgr & UBACNFGR_UBIC) == 0)
- ;
-}
-
-void
-dw780_purge(sc, bdp)
- struct uba_softc *sc;
- int bdp;
-{
- sc->uh_uba->uba_dpr[bdp] |= UBADPR_BNE;
-}
-
-int ubawedgecnt = 10;
-int ubacrazy = 500;
-int zvcnt_max = 5000; /* in 8 sec */
-int ubaerrcnt;
-/*
- * This routine is called by the locore code to process a UBA
- * error on an 11/780 or 8600. The arguments are passed
- * on the stack, and value-result (through some trickery).
- * In particular, the uvec argument is used for further
- * uba processing so the result aspect of it is very important.
- * It must not be declared register.
- */
-/*ARGSUSED*/
-void
-ubaerror(uh, ipl, uvec)
- register struct uba_softc *uh;
- int *ipl, *uvec;
-{
- struct uba_regs *uba = uh->uh_uba;
- register int sr, s;
-
- if (*uvec == 0) {
- /*
- * Declare dt as unsigned so that negative values
- * are handled as >8 below, in case time was set back.
- */
- u_long dt = time.tv_sec - uh->uh_zvtime;
-
- uh->uh_zvtotal++;
- if (dt > 8) {
- uh->uh_zvtime = time.tv_sec;
- uh->uh_zvcnt = 0;
- }
- if (++uh->uh_zvcnt > zvcnt_max) {
- printf("%s: too many zero vectors (%d in <%d sec)\n",
- uh->uh_dev.dv_xname, uh->uh_zvcnt, (int)dt + 1);
- printf("\tIPL 0x%x\n\tcnfgr: %b Adapter Code: 0x%x\n",
- *ipl, uba->uba_cnfgr&(~0xff), UBACNFGR_BITS,
- uba->uba_cnfgr&0xff);
- printf("\tsr: %b\n\tdcr: %x (MIC %sOK)\n",
- uba->uba_sr, ubasr_bits, uba->uba_dcr,
- (uba->uba_dcr&0x8000000)?"":"NOT ");
- ubareset(uh->uh_dev.dv_unit);
- }
- return;
- }
- if (uba->uba_cnfgr & NEX_CFGFLT) {
- printf("%s: sbi fault sr=%b cnfgr=%b\n",
- uh->uh_dev.dv_xname, uba->uba_sr, ubasr_bits,
- uba->uba_cnfgr, NEXFLT_BITS);
- ubareset(uh->uh_dev.dv_unit);
- *uvec = 0;
- return;
- }
- sr = uba->uba_sr;
- s = spluba();
- printf("%s: uba error sr=%b fmer=%x fubar=%o\n", uh->uh_dev.dv_xname,
- uba->uba_sr, ubasr_bits, uba->uba_fmer, 4*uba->uba_fubar);
- splx(s);
- uba->uba_sr = sr;
- *uvec &= UBABRRVR_DIV;
- if (++ubaerrcnt % ubawedgecnt == 0) {
- if (ubaerrcnt > ubacrazy)
- panic("uba crazy");
- printf("ERROR LIMIT ");
- ubareset(uh->uh_dev.dv_unit);
- *uvec = 0;
- return;
- }
- return;
-}
-#endif
-
-#ifdef DW750
-/*
- * The DW780 and DW750 are quite similar to their function from
- * a programmers point of view. Differencies are number of BDP's
- * and bus status/command registers, the latter are (partly) IPR's
- * on 750.
- */
-void dw750_attach(struct device *, struct device *, void *);
-void dw750_init(struct uba_softc *);
-void dw750_purge(struct uba_softc *, int);
-
-struct cfattach uba_cmi_ca = {
- sizeof(struct uba_softc), dw_match, dw750_attach
-};
-
-void
-dw750_attach(parent, self, aux)
- struct device *parent, *self;
- void *aux;
-{
- struct uba_softc *sc = (void *)self;
- struct sbi_attach_args *sa = aux;
- int ubaddr = sa->nexinfo & 1;
-
- printf(": DW750\n");
-
- /*
- * Fill in bus specific data.
- */
- sc->uh_uba = (void *)sa->nexaddr;
- sc->uh_nbdp = NBDP750;
- sc->uh_nr = sa->nexnum;
- sc->uh_ubapurge = dw750_purge;
- sc->uh_ubainit = dw750_init;
- sc->uh_type = DW750;
- sc->uh_memsize = UBAPAGES;
- sc->uh_mr = sc->uh_uba->uba_map;
-
- uba_attach(sc, UMEM750(ubaddr) + (UBAPAGES * VAX_NBPG));
-}
-
-void
-dw750_init(sc)
- struct uba_softc *sc;
-{
- mtpr(0, PR_IUR);
- DELAY(500000);
-}
-
-void
-dw750_purge(sc, bdp)
- struct uba_softc *sc;
- int bdp;
-{
- sc->uh_uba->uba_dpr[bdp] |= UBADPR_PURGE | UBADPR_NXM | UBADPR_UCE;
-}
-#endif
-
-#ifdef QBA
-/*
- * The Q22 bus is the main IO bus on MicroVAX II/MicroVAX III systems.
- * It has an address space of 4MB (22 address bits), therefore the name,
- * and is hardware compatible with all 16 and 18 bits Q-bus devices.
- * This driver can only handle map registers up to 1MB due to map info
- * storage, but that should be enough for normal purposes.
- */
-int qba_match(struct device *, struct cfdata *, void *);
-void qba_attach(struct device *, struct device *, void *);
-void qba_beforescan(struct uba_softc*);
-void qba_init(struct uba_softc*);
-
-struct cfattach uba_mainbus_ca = {
- sizeof(struct uba_softc), qba_match, qba_attach
-};
-
-int
-qba_match(parent, vcf, aux)
- struct device *parent;
- struct cfdata *vcf;
- void *aux;
-{
- struct bp_conf *bp = aux;
-
- if (strcmp(bp->type, "uba"))
- return 0;
-
- return 1;
-}
-
-void
-qba_attach(parent, self, aux)
- struct device *parent, *self;
- void *aux;
-{
- struct uba_softc *sc = (void *)self;
-
- printf(": Q22\n");
- /*
- * Fill in bus specific data.
- */
-/* sc->uh_uba not used; no regs */
-/* sc->uh_nbdp is 0; Qbus has no BDP's */
-/* sc->uh_nr is 0; there can be only one! */
-/* sc->uh_afterscan; not used */
-/* sc->uh_errchk; not used */
- sc->uh_beforescan = qba_beforescan;
- sc->uh_ubainit = qba_init;
- sc->uh_type = QBA;
- sc->uh_memsize = QBAPAGES;
- /*
- * Map in the UBA page map into kernel space. On other UBAs,
- * the map registers are in the bus IO space.
- */
- sc->uh_mr = (void *)vax_map_physmem(QBAMAP,
- (QBAPAGES * sizeof(pt_entry_t)) / VAX_NBPG);
-
- uba_attach(sc, QIOPAGE);
-}
-
-/*
- * Called when the QBA is set up; to enable DMA access from
- * QBA devices to main memory.
- */
-void
-qba_beforescan(sc)
- struct uba_softc *sc;
-{
- *((u_short *)(sc->uh_iopage + QIPCR)) = Q_LMEAE;
-}
-
-void
-qba_init(sc)
- struct uba_softc *sc;
-{
- mtpr(0, PR_IUR);
- DELAY(500000);
- qba_beforescan(sc);
-}
-#endif
-#ifdef DW730
-struct cfattach uba_dw730_ca = {
- sizeof(struct uba_softc), dw730_match, dw730_attach
-};
-#endif
-#if 0
-/*
- * Stray interrupt vector handler, used when nowhere else to go to.
- */
-void
-ubastray(arg)
- int arg;
-{
- struct callsframe *cf = FRAMEOFFSET(arg);
- struct uba_softc *sc = uba_cd.cd_devs[arg];
- int vektor;
-
- rbr = mfpr(PR_IPL);
-#ifdef DW780
- if (sc->uh_type == DW780)
- vektor = svec >> 2;
- else
-#endif
- vektor = (cf->ca_pc - (unsigned)&sc->uh_idsp[0]) >> 4;
-
- if (cold) {
-#ifdef DW780
- if (sc->uh_type != DW780)
-#endif
- rcvec = vektor;
- } else
- printf("uba%d: unexpected interrupt, vector 0x%x, br 0x%x\n",
- arg, svec, rbr);
-}
-#endif
-/*
- * Do transfer on device argument. The controller
- * and uba involved are implied by the device.
- * We queue for resource wait in the uba code if necessary.
- * We return 1 if the transfer was started, 0 if it was not.
- *
- * The onq argument must be zero iff the device is not on the
- * queue for this UBA. If onq is set, the device must be at the
- * head of the queue. In any case, if the transfer is started,
- * the device will be off the queue, and if not, it will be on.
- *
- * Drivers that allocate one BDP and hold it for some time should
- * set ud_keepbdp. In this case um_bdp tells which BDP is allocated
- * to the controller, unless it is zero, indicating that the controller
- * does not now have a BDP.
- */
-int
-ubaqueue(uu, bp)
- register struct uba_unit *uu;
- struct buf *bp;
-{
- register struct uba_softc *uh;
- register int s;
-
- uh = (void *)((struct device *)(uu->uu_softc))->dv_parent;
- s = spluba();
- /*
- * Honor exclusive BDP use requests.
- */
- if ((uu->uu_xclu && uh->uh_users > 0) || uh->uh_xclu)
- goto rwait;
- if (uu->uu_keepbdp) {
- /*
- * First get just a BDP (though in fact it comes with
- * one map register too).
- */
- if (uu->uu_bdp == 0) {
- uu->uu_bdp = uballoc(uh, (caddr_t)0, 0,
- UBA_NEEDBDP|UBA_CANTWAIT);
- if (uu->uu_bdp == 0)
- goto rwait;
- }
- /* now share it with this transfer */
- uu->uu_ubinfo = ubasetup(uh, bp,
- uu->uu_bdp|UBA_HAVEBDP|UBA_CANTWAIT);
- } else
- uu->uu_ubinfo = ubasetup(uh, bp, UBA_NEEDBDP|UBA_CANTWAIT);
- if (uu->uu_ubinfo == 0)
- goto rwait;
- uh->uh_users++;
- if (uu->uu_xclu)
- uh->uh_xclu = 1;
-
- splx(s);
- return (1);
-
-rwait:
- SIMPLEQ_INSERT_TAIL(&uh->uh_resq, uu, uu_resq);
- splx(s);
- return (0);
-}
-
-void
-ubadone(uu)
- struct uba_unit *uu;
-{
- struct uba_softc *uh = (void *)((struct device *)
- (uu->uu_softc))->dv_parent;
-
- if (uu->uu_xclu)
- uh->uh_xclu = 0;
- uh->uh_users--;
- if (uu->uu_keepbdp)
- uu->uu_ubinfo &= ~BDPMASK; /* keep BDP for misers */
- ubarelse(uh, &uu->uu_ubinfo);
-}
-
-/*
- * Allocate and setup UBA map registers, and bdp's
- * Flags says whether bdp is needed, whether the caller can't
- * wait (e.g. if the caller is at interrupt level).
- * Return value encodes map register plus page offset,
- * bdp number and number of map registers.
- */
-int
-ubasetup(uh, bp, flags)
- struct uba_softc *uh;
- struct buf *bp;
- int flags;
-{
- int npf;
- int temp;
- int reg, bdp;
- int a, o, ubinfo;
- vaddr_t addr;
-
- if (uh->uh_nbdp == 0)
- flags &= ~UBA_NEEDBDP;
-
- o = (int)bp->b_data & VAX_PGOFSET;
- npf = vax_btoc(bp->b_bcount + o) + 1;
- if (npf > UBA_MAXNMR)
- panic("uba xfer too big");
- a = spluba();
-
- error = extent_alloc(uh->uh_ext, npf * VAX_NBPG, VAX_NBPG, 0,
- EX_NOBOUNDARY, (flags & UBA_CANTWAIT) ? EX_NOWAIT : EX_WAITOK,
- (u_long *)addr);
-
- if (error != 0) {
- splx(a);
- return (0);
- }
-
- reg = vax_btoc(addr);
- if ((flags & UBA_NEED16) && reg + npf > 128) {
- /*
- * Could hang around and try again (if we can ever succeed).
- * Won't help any current device...
- */
- extent_free(uh->uh_ext, (u_long)addr, npf * VAX_NBPG,
- EX_NOWAIT);
- splx(a);
- return (0);
- }
- bdp = 0;
- if (flags & UBA_NEEDBDP) {
- while ((bdp = ffs((long)uh->uh_bdpfree)) == 0) {
- if (flags & UBA_CANTWAIT) {
- extent_free(uh->uh_ext, (u_long)addr,
- npf * VAX_NBPG, EX_NOWAIT);
- splx(a);
- return (0);
- }
- uh->uh_bdpwant++;
- tsleep((caddr_t)&uh->uh_bdpwant, PSWP, "ubasetup", 0);
- }
- uh->uh_bdpfree &= ~(1 << (bdp-1));
- } else if (flags & UBA_HAVEBDP)
- bdp = (flags >> 28) & 0xf;
- splx(a);
- reg--;
- ubinfo = UBAI_INFO(o, reg, npf, bdp);
- temp = (bdp << 21) | UBAMR_MRV;
- if (bdp && (o & 01))
- temp |= UBAMR_BO;
-
- disk_reallymapin(bp, uh->uh_mr, reg, temp | PG_V);
-
- return (ubinfo);
-}
-
-/*
- * Non buffer setup interface... set up a buffer and call ubasetup.
- */
-int
-uballoc(uh, addr, bcnt, flags)
- struct uba_softc *uh;
- caddr_t addr;
- int bcnt, flags;
-{
- struct buf ubabuf;
-
- ubabuf.b_data = addr;
- ubabuf.b_flags = B_BUSY;
- ubabuf.b_bcount = bcnt;
- /* that's all the fields ubasetup() needs */
- return (ubasetup(uh, &ubabuf, flags));
-}
-
-/*
- * Release resources on uba uban, and then unblock resource waiters.
- * The map register parameter is by value since we need to block
- * against uba resets on 11/780's.
- */
-void
-ubarelse(uh, amr)
- struct uba_softc *uh;
- int *amr;
-{
- struct uba_unit *uu;
- register int bdp, reg, npf, s;
- int mr;
-
- /*
- * Carefully see if we should release the space, since
- * it may be released asynchronously at uba reset time.
- */
- s = spluba();
- mr = *amr;
- if (mr == 0) {
- /*
- * A ubareset() occurred before we got around
- * to releasing the space... no need to bother.
- */
- splx(s);
- return;
- }
- *amr = 0;
- bdp = UBAI_BDP(mr);
- if (bdp) {
- if (uh->uh_ubapurge)
- (*uh->uh_ubapurge)(uh, bdp);
-
- uh->uh_bdpfree |= 1 << (bdp-1); /* atomic */
- if (uh->uh_bdpwant) {
- uh->uh_bdpwant = 0;
- wakeup((caddr_t)&uh->uh_bdpwant);
- }
- }
- /*
- * Put back the registers in the resource map.
- * The map code must not be reentered,
- * nor can the registers be freed twice.
- * Unblock interrupts once this is done.
- */
- npf = UBAI_NMR(mr);
- reg = UBAI_MR(mr) + 1;
- extent_free(uh->uh_ext, reg * VAX_NBPG, npf * VAX_NBPG, EX_NOWAIT);
- splx(s);
-
- /*
- * Wakeup sleepers for map registers,
- * and also, if there are processes blocked in dgo(),
- * give them a chance at the UNIBUS.
- */
- if (uh->uh_mrwant) {
- uh->uh_mrwant = 0;
- wakeup((caddr_t)&uh->uh_mrwant);
- }
- while ((uu = SIMPLEQ_FIRST(&uh->uh_resq)) != NULL) {
- SIMPLEQ_REMOVE_HEAD(&uh->uh_resq, uu_resq);
- if ((*uu->uu_ready)(uu) == 0)
- break;
- }
-}
-
-void
-ubainitmaps(uhp, reset)
- struct uba_softc *uhp;
- int reset;
-{
- int error;
-
- if (uhp->uh_memsize > UBA_MAXMR)
- uhp->uh_memsize = UBA_MAXMR;
- if (reset)
- extent_destroy(uhp->uh_ext);
- uhp->uh_ext = extent_create("uba", 0, uhp->uh_memsize * VAX_NBPG,
- M_DEVBUF, uhp->uh_extspace, EXTENT_FIXED_STORAGE_SIZE(UAMSIZ),
- EX_NOWAIT);
- uhp->uh_bdpfree = (1 << uhp->uh_nbdp) - 1;
-}
-
-/*
- * Generate a reset on uba number uban. Then
- * call each device that asked to be called during attach,
- * giving it a chance to clean up so as to be able to continue.
- */
-void
-ubareset(uban)
- int uban;
-{
- register struct uba_softc *uh = uba_cd.cd_devs[uban];
- int s, i;
-
- s = spluba();
- uh->uh_users = 0;
- uh->uh_zvcnt = 0;
- uh->uh_xclu = 0;
- SIMPLEQ_INIT(&uh->uh_resq);
- uh->uh_bdpwant = 0;
- uh->uh_mrwant = 0;
- ubainitmaps(uh, 1);
- wakeup((caddr_t)&uh->uh_bdpwant);
- wakeup((caddr_t)&uh->uh_mrwant);
- printf("%s: reset", uh->uh_dev.dv_xname);
- (*uh->uh_ubainit)(uh);
-
- for (i = 0; i < uh->uh_resno; i++)
- (*uh->uh_reset[i])(uh->uh_resarg[i]);
- printf("\n");
- splx(s);
-}
-
-#ifdef notyet
-/*
- * Determine the interrupt priority of a Q-bus
- * peripheral. The device probe routine must spl6(),
- * attempt to make the device request an interrupt,
- * delaying as necessary, then call this routine
- * before resetting the device.
- */
-int
-qbgetpri()
-{
- int pri;
-
- for (pri = 0x17; pri > 0x14; ) {
- if (rcvec && rcvec != 0x200) /* interrupted at pri */
- break;
- pri--;
- splx(pri - 1);
- }
- spl0();
- return (pri);
-}
-#endif
-
-/*
- * The common attach routines:
- * Allocates interrupt vectors.
- * Puts correct values in uba_softc.
- * Calls the scan routine to search for uba devices.
- */
-void
-uba_attach(sc, iopagephys)
- struct uba_softc *sc;
- paddr_t iopagephys;
-{
-
- /*
- * Set last free interrupt vector for devices with
- * programmable interrupt vectors. Use is to decrement
- * this number and use result as interrupt vector.
- */
- sc->uh_lastiv = 0x200;
- SIMPLEQ_INIT(&sc->uh_resq);
-
- /*
- * Allocate place for unibus memory in virtual space.
- */
- sc->uh_iopage = (caddr_t)vax_map_physmem(iopagephys, UBAIOPAGES);
- if (sc->uh_iopage == 0)
- return; /* vax_map_physmem() will complain for us */
- /*
- * Initialize the UNIBUS, by freeing the map
- * registers and the buffered data path registers
- */
- sc->uh_extspace = (char *)malloc(EXTENT_FIXED_STORAGE_SIZE(UAMSIZ),
- M_DEVBUF, M_NOWAIT);
- if (sc->uh_extspace == NULL)
- panic("uba_attach");
- ubainitmaps(sc, 0);
-
- /*
- * Map the first page of UNIBUS i/o space to the first page of memory
- * for devices which will need to dma to produce an interrupt.
- */
- *(int *)(&sc->uh_mr[0]) = UBAMR_MRV;
-
- if (sc->uh_beforescan)
- (*sc->uh_beforescan)(sc);
- /*
- * Now start searching for devices.
- */
- config_search(ubasearch,(struct device *)sc, NULL);
-
- if (sc->uh_afterscan)
- (*sc->uh_afterscan)(sc);
-}
-
-int
-ubasearch(parent, cf, aux)
- struct device *parent;
- struct cfdata *cf;
- void *aux;
-{
- struct uba_softc *sc = (struct uba_softc *)parent;
- struct uba_attach_args ua;
- int i, vec, br;
-
- ua.ua_addr = (caddr_t)((int)sc->uh_iopage + ubdevreg(cf->cf_loc[0]));
- ua.ua_reset = NULL;
-
- if (badaddr(ua.ua_addr, 2) || (sc->uh_errchk ? (*sc->uh_errchk)(sc):0))
- goto forgetit;
-
- scb_vecref(0, 0); /* Clear vector ref */
- i = (*cf->cf_attach->ca_match) (parent, cf, &ua);
-
- if (sc->uh_errchk)
- if ((*sc->uh_errchk)(sc))
- goto forgetit;
- if (i == 0)
- goto forgetit;
-
- i = scb_vecref(&vec, &br);
- if (i == 0)
- goto fail;
- if (vec == 0)
- goto fail;
-
- scb_vecalloc(vec, ua.ua_ivec, cf->cf_unit, SCB_ISTACK);
- if (ua.ua_reset) { /* device wants ubareset */
- if (sc->uh_resno == 0) {
- sc->uh_reset = malloc(1024, M_DEVBUF, M_NOWAIT);
- if (sc->uh_reset == NULL)
- panic("ubasearch");
- sc->uh_resarg = (int *)sc->uh_reset + 128;
- }
-#ifdef DIAGNOSTIC
- if (sc->uh_resno > 127) {
- printf("%s: Expand reset table, skipping reset %s%d\n",
- sc->uh_dev.dv_xname, cf->cf_driver->cd_name,
- cf->cf_unit);
- } else
-#endif
- {
- sc->uh_resarg[sc->uh_resno] = cf->cf_unit;
- sc->uh_reset[sc->uh_resno++] = ua.ua_reset;
- }
- }
- ua.ua_br = br;
- ua.ua_cvec = vec;
- ua.ua_iaddr = cf->cf_loc[0];
-
- config_attach(parent, cf, &ua, ubaprint);
- return 0;
-
-fail:
- printf("%s%d at %s csr %o %s\n",
- cf->cf_driver->cd_name, cf->cf_unit, parent->dv_xname,
- cf->cf_loc[0], (i ? "zero vector" : "didn't interrupt"));
-
-forgetit:
- return 0;
-}
-
-/*
- * Print out some interesting info common to all unibus devices.
- */
-int
-ubaprint(aux, uba)
- void *aux;
- const char *uba;
-{
- struct uba_attach_args *ua = aux;
-
- printf(" csr %o vec %d ipl %x", ua->ua_iaddr,
- ua->ua_cvec & 511, ua->ua_br);
- return UNCONF;
-}
diff --git a/sys/arch/vax/uba/uba_mainbus.c b/sys/arch/vax/uba/uba_mainbus.c
deleted file mode 100644
index fc8b5a219cf..00000000000
--- a/sys/arch/vax/uba/uba_mainbus.c
+++ /dev/null
@@ -1,133 +0,0 @@
-/* $OpenBSD: uba_mainbus.c,v 1.3 2003/06/02 23:27:58 millert Exp $ */
-/* $NetBSD: uba_mainbus.c,v 1.2 1999/06/06 19:00:53 ragge Exp $ */
-/*
- * Copyright (c) 1996 Jonathan Stone.
- * Copyright (c) 1994, 1996 Ludd, University of Lule}, Sweden.
- * Copyright (c) 1982, 1986 The Regents of the University of California.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)uba.c 7.10 (Berkeley) 12/16/90
- * @(#)autoconf.c 7.20 (Berkeley) 5/9/91
- */
-
-#include <sys/param.h>
-#include <sys/device.h>
-#include <sys/systm.h>
-
-#define _VAX_BUS_DMA_PRIVATE
-#include <machine/bus.h>
-#include <machine/mtpr.h>
-#include <machine/nexus.h>
-#include <machine/cpu.h>
-#include <machine/sgmap.h>
-
-#include <arch/vax/qbus/ubavar.h>
-
-#include <arch/vax/uba/uba_common.h>
-
-/* Some Qbus-specific defines */
-#define QBASIZE (8192 * VAX_NBPG)
-#define QBAMAP 0x20088000
-#define QIOPAGE 0x20000000
-
-/*
- * The Q22 bus is the main IO bus on MicroVAX II/MicroVAX III systems.
- * It has an address space of 4MB (22 address bits), therefore the name,
- * and is hardware compatible with all 16 and 18 bits Q-bus devices.
- */
-static int qba_match(struct device *, struct cfdata *, void *);
-static void qba_attach(struct device *, struct device *, void *);
-static void qba_beforescan(struct uba_softc*);
-static void qba_init(struct uba_softc*);
-
-struct cfattach uba_mainbus_ca = {
- sizeof(struct uba_vsoftc), qba_match, qba_attach
-};
-
-extern struct vax_bus_space vax_mem_bus_space;
-
-int
-qba_match(parent, vcf, aux)
- struct device *parent;
- struct cfdata *vcf;
- void *aux;
-{
- struct bp_conf *bp = aux;
-
- if (strcmp(bp->type, "uba"))
- return 0;
-
- return 1;
-}
-
-void
-qba_attach(parent, self, aux)
- struct device *parent, *self;
- void *aux;
-{
- struct uba_vsoftc *sc = (void *)self;
-
- printf(": Q22\n");
- /*
- * Fill in bus specific data.
- */
- sc->uv_sc.uh_beforescan = qba_beforescan;
- sc->uv_sc.uh_ubainit = qba_init;
- sc->uv_sc.uh_iot = &vax_mem_bus_space;
- sc->uv_sc.uh_dmat = &sc->uv_dmat;
-
- /*
- * Fill in variables used by the sgmap system.
- */
- sc->uv_size = QBASIZE; /* Size in bytes of Qbus space */
- sc->uv_addr = QBAMAP; /* Physical address of map registers */
-
- uba_dma_init(sc);
- uba_attach(&sc->uv_sc, QIOPAGE);
-}
-
-/*
- * Called when the QBA is set up; to enable DMA access from
- * QBA devices to main memory.
- */
-void
-qba_beforescan(sc)
- struct uba_softc *sc;
-{
-#define QIPCR 0x1f40
-#define Q_LMEAE 0x20
- bus_space_write_2(sc->uh_tag, sc->uh_ioh, QIPCR, Q_LMEAE);
-}
-
-void
-qba_init(sc)
- struct uba_softc *sc;
-{
- mtpr(0, PR_IUR);
- DELAY(500000);
- qba_beforescan(sc);
-}
diff --git a/sys/arch/vax/uba/ubavar.h b/sys/arch/vax/uba/ubavar.h
deleted file mode 100644
index 18006778322..00000000000
--- a/sys/arch/vax/uba/ubavar.h
+++ /dev/null
@@ -1,183 +0,0 @@
-/* $OpenBSD: ubavar.h,v 1.14 2003/11/10 21:05:06 miod Exp $ */
-/* $NetBSD: ubavar.h,v 1.21 1999/01/19 21:04:48 ragge Exp $ */
-
-/*
- * Copyright (c) 1982, 1986 Regents of the University of California.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)ubavar.h 7.7 (Berkeley) 6/28/90
- */
-
-/*
- * This file contains definitions related to the kernel structures
- * for dealing with the unibus adapters.
- *
- * Each uba has a uba_softc structure.
- * Each unibus controller which is not a device has a uba_ctlr structure.
- * Each unibus device has a uba_device structure.
- */
-
-#include <sys/buf.h>
-#include <sys/device.h>
-
-#include <machine/trap.h> /* For struct ivec_dsp */
-/*
- * Per-uba structure.
- *
- * This structure holds the interrupt vector for the uba,
- * and its address in physical and virtual space. At boot time
- * we determine the devices attached to the uba's and their
- * interrupt vectors, filling in uh_vec. We free the map
- * register and bdp resources of the uba into the structures
- * defined here.
- *
- * During normal operation, resources are allocated and returned
- * to the structures here. We watch the number of passive releases
- * on each uba, and if the number is excessive may reset the uba.
- *
- * When uba resources are needed and not available, or if a device
- * which can tolerate no other uba activity (rk07) gets on the bus,
- * then device drivers may have to wait to get to the bus and are
- * queued here. It is also possible for processes to block in
- * the unibus driver in resource wait (mrwant, bdpwant); these
- * wait states are also recorded here.
- */
-struct extent;
-struct uba_softc {
- struct device uh_dev; /* Device struct, autoconfig */
- SIMPLEQ_HEAD(, uba_unit) uh_resq; /* resource wait chain */
- int uh_type; /* type of adaptor */
- struct uba_regs *uh_uba; /* virt addr of uba adaptor regs */
- pt_entry_t *uh_mr; /* start of page map */
- int uh_memsize; /* size of uba memory, pages */
- caddr_t uh_iopage; /* start of uba io page */
- void (**uh_reset)(int); /* UBA reset function array */
- int *uh_resarg; /* array of ubareset args */
- int uh_resno; /* Number of devices to reset */
- short uh_mrwant; /* someone is waiting for map reg */
- short uh_bdpwant; /* someone awaits bdp's */
- int uh_bdpfree; /* free bdp's */
- int uh_zvcnt; /* number of recent 0 vectors */
- long uh_zvtime; /* time over which zvcnt accumulated */
- int uh_zvtotal; /* total number of 0 vectors */
- int uh_lastiv; /* last free interrupt vector */
- short uh_users; /* transient bdp use count */
- short uh_xclu; /* an rk07 is using this uba! */
- int uh_lastmem; /* limit of any unibus memory */
- struct extent *uh_ext; /* register free map */
- char *uh_extspace; /* storage space for uh_ext */
- int (*uh_errchk)(struct uba_softc *);
- void (*uh_beforescan)(struct uba_softc *);
- void (*uh_afterscan)(struct uba_softc *);
- void (*uh_ubainit)(struct uba_softc *);
- void (*uh_ubapurge)(struct uba_softc *, int);
- short uh_nr; /* Unibus sequential number */
- short uh_nbdp; /* # of BDP's */
- int uh_ibase; /* Base address for vectors */
-};
-
-#define UAMSIZ 100
-
-/*
- * Per-controller structure.
- * The unit struct is common to both the adapter and the controller
- * to which it belongs. It is only used on controllers that handles
- * BDP's, and calls the adapter queueing subroutines.
- */
-struct uba_unit {
- SIMPLEQ_ENTRY(uba_unit) uu_resq;/* Queue while waiting for resources */
- void *uu_softc; /* Pointer to units softc */
- int uu_ubinfo; /* save unibus registers, etc */
- int uu_bdp; /* for controllers that hang on to bdp's */
- int (*uu_ready)(struct uba_unit *);
- short uu_xclu; /* want exclusive use of bdp's */
- short uu_keepbdp; /* hang on to bdp's once allocated */
-};
-
-/*
- * uba_attach_args is used during autoconfiguration. It is sent
- * from ubascan() to each (possible) device.
- */
-struct uba_attach_args {
- caddr_t ua_addr;
- /* Pointer to int routine, filled in by probe*/
- void (*ua_ivec)(int);
- /* UBA reset routine, filled in by probe */
- void (*ua_reset)(int);
- int ua_iaddr;
- int ua_br;
- int ua_cvec;
-};
-
-/*
- * Flags to UBA map/bdp allocation routines
- */
-#define UBA_NEEDBDP 0x01 /* transfer needs a bdp */
-#define UBA_CANTWAIT 0x02 /* don't block me */
-#define UBA_NEED16 0x04 /* need 16 bit addresses only */
-#define UBA_HAVEBDP 0x08 /* use bdp specified in high bits */
-
-/*
- * Macros to bust return word from map allocation routines.
- * SHOULD USE STRUCTURE TO STORE UBA RESOURCE ALLOCATION:
- */
-#ifdef notyet
-struct ubinfo {
- long ub_addr; /* unibus address: mr + boff */
- int ub_nmr; /* number of registers, 0 if empty */
- int ub_bdp; /* bdp number, 0 if none */
-};
-#define UBAI_MR(i) (((i) >> 9) & 0x7ff) /* starting map register */
-#define UBAI_BOFF(i) ((i)&0x1ff) /* page offset */
-#else
-#define UBAI_BDP(i) ((int)(((unsigned)(i)) >> 28))
-#define BDPMASK 0xf0000000
-#define UBAI_NMR(i) ((int)((i) >> 20) & 0xff) /* max 255 (=127.5K) */
-#define UBA_MAXNMR 255
-#define UBAI_MR(i) ((int)((i) >> 9) & 0x7ff) /* max 2047 */
-#define UBA_MAXMR 2047
-#define UBAI_BOFF(i) ((int)((i) & 0x1ff))
-#define UBAI_ADDR(i) ((int)((i) & 0xfffff)) /* uba addr (boff+mr) */
-#define UBAI_INFO(off, mr, nmr, bdp) \
- (((bdp) << 28) | ((nmr) << 20) | ((mr) << 9) | (off))
-#endif
-
-#ifndef _LOCORE
-#ifdef _KERNEL
-#define ubago(ui) ubaqueue(ui)
-#define b_forw b_hash.le_next /* Nice to have when handling uba queues */
-
-void uba_attach(struct uba_softc *, unsigned long);
-int uballoc(struct uba_softc *, caddr_t, int, int);
-void ubarelse(struct uba_softc *, int *);
-int ubaqueue(struct uba_unit *, struct buf *);
-void ubadone(struct uba_unit *);
-void ubareset(int);
-int ubasetup(struct uba_softc *, struct buf *, int);
-
-#endif /* _KERNEL */
-#endif /* !_LOCORE */
diff --git a/sys/arch/vax/uba/uda.c b/sys/arch/vax/uba/uda.c
deleted file mode 100644
index fd0e633c0f5..00000000000
--- a/sys/arch/vax/uba/uda.c
+++ /dev/null
@@ -1,521 +0,0 @@
-/* $OpenBSD: uda.c,v 1.12 2004/12/25 23:02:25 miod Exp $ */
-/* $NetBSD: uda.c,v 1.25 1997/07/04 13:26:02 ragge Exp $ */
-/*
- * Copyright (c) 1996 Ludd, University of Lule}, Sweden.
- * Copyright (c) 1988 Regents of the University of California.
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Chris Torek.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)uda.c 7.32 (Berkeley) 2/13/91
- */
-
-/*
- * UDA50 disk device driver
- */
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-
-#include <machine/sid.h>
-#include <machine/pte.h>
-#include <machine/cpu.h>
-
-#include <vax/uba/ubavar.h>
-#include <vax/uba/ubareg.h>
-#include <vax/uba/udareg.h>
-
-#include <vax/mscp/mscp.h>
-#include <vax/mscp/mscpvar.h>
-#include <vax/mscp/mscpreg.h>
-
-/*
- * Variants of SIMPLEQ macros for use with buf structs.
- */
-#define BUFQ_INSERT_TAIL(head, elm) { \
- (elm)->b_actf = NULL; \
- *(head)->sqh_last = (elm); \
- (head)->sqh_last = &(elm)->b_actf; \
-}
-
-#define BUFQ_REMOVE_HEAD(head, elm) { \
- if (((head)->sqh_first = (elm)->b_actf) == NULL) \
- (head)->sqh_last = &(head)->sqh_first; \
-}
-
-/*
- * Software status, per controller.
- */
-struct uda_softc {
- struct device sc_dev; /* Autoconfig info */
- struct uba_unit sc_unit; /* Struct common for UBA to communicate */
- SIMPLEQ_HEAD(, buf) sc_bufq; /* bufs awaiting for resources */
- struct mscp_pack *sc_uuda; /* Unibus address of uda struct */
- struct mscp_pack sc_uda; /* Struct for uda communication */
- struct udadevice *sc_udadev; /* pointer to ip/sa regs */
- struct mscp *sc_mscp; /* Keep pointer to active mscp */
- short sc_ipl; /* interrupt priority, Q-bus */
- struct mscp_softc *sc_softc; /* MSCP info (per mscpvar.h) */
- int sc_wticks; /* watchdog timer ticks */
-};
-
-static int udamatch(struct device *, void *, void *);
-static void udaattach(struct device *, struct device *, void *);
-static void udareset(int);
-static void mtcreset(int);
-static void reset(struct uda_softc *);
-static void udaintr(int);
-static void mtcintr(int);
-static void intr(struct uda_softc *);
-int udaready(struct uba_unit *);
-void udactlrdone(struct device *, int);
-int udaprint(void *, const char *);
-void udasaerror(struct device *, int);
-int udago(struct device *, struct buf *);
-
-struct cfdriver mtc_cd = {
- NULL, "mtc", DV_DULL
-};
-
-struct cfattach mtc_ca = {
- sizeof(struct uda_softc), udamatch, udaattach
-};
-
-struct cfdriver uda_cd = {
- NULL, "uda", DV_DULL
-};
-
-struct cfattach uda_ca = {
- sizeof(struct uda_softc), udamatch, udaattach
-};
-
-/*
- * More driver definitions, for generic MSCP code.
- */
-struct mscp_ctlr uda_mscp_ctlr = {
- udactlrdone,
- udago,
- udasaerror,
-};
-
-/*
- * Miscellaneous private variables.
- */
-static int ivec_no;
-
-int
-udaprint(aux, name)
- void *aux;
- const char *name;
-{
- if (name)
- printf("%s: mscpbus", name);
- return UNCONF;
-}
-
-/*
- * Poke at a supposed UDA50 to see if it is there.
- */
-int
-udamatch(parent, match, aux)
- struct device *parent;
- void *match, *aux;
-{
- struct uba_attach_args *ua = aux;
- struct device *dev = match;
- struct mscp_softc mi; /* Nice hack */
- struct uba_softc *ubasc;
- int tries;
-#if QBA && notyet
- extern volatile int rbr;
- int s;
-#endif
-
- /* Get an interrupt vector. */
- ubasc = (void *)parent;
- ivec_no = ubasc->uh_lastiv - 4;
-
- mi.mi_sa = &((struct udadevice *)ua->ua_addr)->udasa;
- mi.mi_ip = &((struct udadevice *)ua->ua_addr)->udaip;
-
- /*
- * Initialise the controller (partially). The UDA50 programmer's
- * manual states that if initialisation fails, it should be retried
- * at least once, but after a second failure the port should be
- * considered `down'; it also mentions that the controller should
- * initialise within ten seconds. Or so I hear; I have not seen
- * this manual myself.
- */
-#if 0
- s = spl6();
-#endif
- tries = 0;
-again:
-
- *mi.mi_ip = 0;
- if (mscp_waitstep(&mi, MP_STEP1, MP_STEP1) == 0)
- return 0; /* Nothing here... */
-
- *mi.mi_sa = MP_ERR | (NCMDL2 << 11) | (NRSPL2 << 8) | MP_IE |
- (ivec_no >> 2);
-
- if (mscp_waitstep(&mi, MP_STEP2, MP_STEP2) == 0) {
- printf("udaprobe: init step2 no change. sa=%x\n", *mi.mi_sa);
- goto bad;
- }
-
- /* should have interrupted by now */
-#if 0
- rbr = qbgetpri();
-#endif
- if (strcmp(dev->dv_cfdata->cf_driver->cd_name, mtc_cd.cd_name)) {
- ua->ua_ivec = udaintr;
- ua->ua_reset = udareset;
- } else {
- ua->ua_ivec = mtcintr;
- ua->ua_reset = mtcreset;
- }
-
- return 1;
-bad:
- if (++tries < 2)
- goto again;
-#if 0
- splx(s);
-#endif
- return 0;
-}
-
-void
-udaattach(parent, self, aux)
- struct device *parent, *self;
- void *aux;
-{
- struct uda_softc *sc = (void *)self;
- struct uba_attach_args *ua = aux;
- struct uba_softc *uh = (void *)parent;
- struct mscp_attach_args ma;
- int ctlr, ubinfo;
-
- printf("\n");
-
- uh->uh_lastiv -= 4; /* remove dynamic interrupt vector */
-#ifdef QBA
- sc->sc_ipl = ua->ua_br;
-#endif
-
- ctlr = sc->sc_dev.dv_unit;
- sc->sc_udadev = (struct udadevice *)ua->ua_addr;
- SIMPLEQ_INIT(&sc->sc_bufq);
-
- /*
- * Fill in the uba_unit struct, so we can communicate with the uba.
- */
- sc->sc_unit.uu_softc = sc; /* Backpointer to softc */
- sc->sc_unit.uu_ready = udaready;/* go routine called from adapter */
- sc->sc_unit.uu_keepbdp = vax_cputype == VAX_750 ? 1 : 0;
-
- /*
- * Map the communication area and command and
- * response packets into Unibus space.
- */
- ubinfo = uballoc((struct uba_softc *)sc->sc_dev.dv_parent,
- (caddr_t) &sc->sc_uda, sizeof (struct mscp_pack), UBA_CANTWAIT);
-
-#ifdef DIAGNOSTIC
- if (ubinfo == 0) {
- printf("%s: uballoc map failed\n", sc->sc_dev.dv_xname);
- return;
- }
-#endif
- sc->sc_uuda = (struct mscp_pack *) UBAI_ADDR(ubinfo);
-
- bzero(&sc->sc_uda, sizeof (struct mscp_pack));
-
- /*
- * The only thing that differ UDA's and Tape ctlr's is
- * their vcid. Beacuse there are no way to determine which
- * ctlr type it is, we check what is generated and later
- * set the correct vcid.
- */
- ma.ma_type = (strcmp(self->dv_cfdata->cf_driver->cd_name,
- mtc_cd.cd_name) ? MSCPBUS_DISK : MSCPBUS_TAPE);
-
- ma.ma_mc = &uda_mscp_ctlr;
- ma.ma_type |= MSCPBUS_UDA;
- ma.ma_uuda = sc->sc_uuda;
- ma.ma_uda = &sc->sc_uda;
- ma.ma_softc = &sc->sc_softc;
- ma.ma_ip = &sc->sc_udadev->udaip;
- ma.ma_sa = ma.ma_sw = &sc->sc_udadev->udasa;
- ma.ma_ivec = ivec_no;
- ma.ma_ctlrnr = (ua->ua_iaddr == 0172150 ? 0 : 1); /* XXX */
- ma.ma_adapnr = uh->uh_nr;
- config_found(&sc->sc_dev, &ma, udaprint);
-}
-
-/*
- * Start a transfer if there are free resources available, otherwise
- * let it go in udaready, forget it for now.
- */
-int
-udago(usc, bp)
- struct device *usc;
- struct buf *bp;
-{
- struct uda_softc *sc = (void *)usc;
- struct uba_unit *uu = &sc->sc_unit;
-
- /*
- * If we already are queued for resources, don't call ubaqueue
- * again. (Then we would trash the wait queue). Just queue the
- * buf and let the rest be done in udaready.
- */
- if (!SIMPLEQ_EMPTY(&sc->sc_bufq))
- BUFQ_INSERT_TAIL(&sc->sc_bufq, bp)
- else {
- if (ubaqueue(uu, bp))
- mscp_dgo(sc->sc_softc, (UBAI_ADDR(uu->uu_ubinfo) |
- (UBAI_BDP(uu->uu_ubinfo) << 24)),uu->uu_ubinfo,bp);
- else
- BUFQ_INSERT_TAIL(&sc->sc_bufq, bp)
- }
-
- return 0;
-}
-
-/*
- * Called if we have been blocked for resources, and resources
- * have been freed again. Return 1 if we could start all
- * transfers again, 0 if we still are waiting.
- */
-int
-udaready(uu)
- struct uba_unit *uu;
-{
- struct uda_softc *sc = uu->uu_softc;
- struct buf *bp;
-
- while ((bp = SIMPLEQ_FIRST(&sc->sc_bufq)) != NULL) {
- if (ubaqueue(uu, bp)) {
- BUFQ_REMOVE_HEAD(&sc->sc_bufq, bp);
- mscp_dgo(sc->sc_softc, (UBAI_ADDR(uu->uu_ubinfo) |
- (UBAI_BDP(uu->uu_ubinfo) << 24)),uu->uu_ubinfo,bp);
- } else
- return 0;
- }
- return 1;
-}
-
-static struct saerr {
- int code; /* error code (including UDA_ERR) */
- char *desc; /* what it means: Efoo => foo error */
-} saerr[] = {
- { 0100001, "Eunibus packet read" },
- { 0100002, "Eunibus packet write" },
- { 0100003, "EUDA ROM and RAM parity" },
- { 0100004, "EUDA RAM parity" },
- { 0100005, "EUDA ROM parity" },
- { 0100006, "Eunibus ring read" },
- { 0100007, "Eunibus ring write" },
- { 0100010, " unibus interrupt master failure" },
- { 0100011, "Ehost access timeout" },
- { 0100012, " host exceeded command limit" },
- { 0100013, " unibus bus master failure" },
- { 0100014, " DM XFC fatal error" },
- { 0100015, " hardware timeout of instruction loop" },
- { 0100016, " invalid virtual circuit id" },
- { 0100017, "Eunibus interrupt write" },
- { 0104000, "Efatal sequence" },
- { 0104040, " D proc ALU" },
- { 0104041, "ED proc control ROM parity" },
- { 0105102, "ED proc w/no BD#2 or RAM parity" },
- { 0105105, "ED proc RAM buffer" },
- { 0105152, "ED proc SDI" },
- { 0105153, "ED proc write mode wrap serdes" },
- { 0105154, "ED proc read mode serdes, RSGEN & ECC" },
- { 0106040, "EU proc ALU" },
- { 0106041, "EU proc control reg" },
- { 0106042, " U proc DFAIL/cntl ROM parity/BD #1 test CNT" },
- { 0106047, " U proc const PROM err w/D proc running SDI test" },
- { 0106055, " unexpected trap" },
- { 0106071, "EU proc const PROM" },
- { 0106072, "EU proc control ROM parity" },
- { 0106200, "Estep 1 data" },
- { 0107103, "EU proc RAM parity" },
- { 0107107, "EU proc RAM buffer" },
- { 0107115, " test count wrong (BD 12)" },
- { 0112300, "Estep 2" },
- { 0122240, "ENPR" },
- { 0122300, "Estep 3" },
- { 0142300, "Estep 4" },
- { 0, " unknown error code" }
-};
-
-/*
- * If the error bit was set in the controller status register, gripe,
- * then (optionally) reset the controller and requeue pending transfers.
- */
-void
-udasaerror(usc, doreset)
- struct device *usc;
- int doreset;
-{
- struct uda_softc *sc = (void *)usc;
- register int code = sc->sc_udadev->udasa;
- register struct saerr *e;
-
- if ((code & MP_ERR) == 0)
- return;
- for (e = saerr; e->code; e++)
- if (e->code == code)
- break;
- printf("%s: controller error, sa=0%o (%s%s)\n",
- sc->sc_dev.dv_xname, code, e->desc + 1,
- *e->desc == 'E' ? " error" : "");
-#if 0 /* XXX we just avoid panic when autoconfig non-existent KFQSA devices */
- if (doreset) {
- mscp_requeue(sc->sc_softc);
-/* (void) udainit(sc); XXX */
- }
-#endif
-}
-
-/*
- * Interrupt routine. Depending on the state of the controller,
- * continue initialisation, or acknowledge command and response
- * interrupts, and process responses.
- */
-static void
-udaintr(ctlr)
- int ctlr;
-{
- intr(uda_cd.cd_devs[ctlr]);
-}
-
-static void
-mtcintr(ctlr)
- int ctlr;
-{
- intr(mtc_cd.cd_devs[ctlr]);
-}
-
-static void
-intr(sc)
- struct uda_softc *sc;
-{
- volatile struct udadevice *udaddr = sc->sc_udadev;
- struct uba_softc *uh;
- struct mscp_pack *ud;
-
-#ifdef QBA
- if(vax_cputype == VAX_TYP_UV2)
- splx(sc->sc_ipl); /* Qbus interrupt protocol is odd */
-#endif
- sc->sc_wticks = 0; /* reset interrupt watchdog */
-
- if (udaddr->udasa & MP_ERR) { /* ctlr fatal error */
- udasaerror(&sc->sc_dev, 1);
- return;
- }
- ud = &sc->sc_uda;
- /*
- * Handle buffer purge requests.
- */
- uh = (void *)sc->sc_dev.dv_parent;
- if (ud->mp_ca.ca_bdp) {
- if (uh->uh_ubapurge)
- (*uh->uh_ubapurge)(uh, ud->mp_ca.ca_bdp);
- ud->mp_ca.ca_bdp = 0;
- udaddr->udasa = 0; /* signal purge complete */
- }
-
- mscp_intr(sc->sc_softc);
-}
-
-/*
- * A Unibus reset has occurred on UBA uban. Reinitialise the controller(s)
- * on that Unibus, and requeue outstanding I/O.
- */
-void
-udareset(ctlr)
- int ctlr;
-{
- reset(uda_cd.cd_devs[ctlr]);
-}
-
-void
-mtcreset(ctlr)
- int ctlr;
-{
- reset(mtc_cd.cd_devs[ctlr]);
-}
-
-static void
-reset(sc)
- struct uda_softc *sc;
-{
- printf(" %s", sc->sc_dev.dv_xname);
-
- /*
- * Our BDP (if any) is gone; our command (if any) is
- * flushed; the device is no longer mapped; and the
- * UDA50 is not yet initialised.
- */
- if (sc->sc_unit.uu_bdp) {
- printf("<%d>", UBAI_BDP(sc->sc_unit.uu_bdp));
- sc->sc_unit.uu_bdp = 0;
- }
- sc->sc_unit.uu_ubinfo = 0;
-/* sc->sc_unit.uu_cmd = 0; XXX */
-
- /* reset queues and requeue pending transfers */
- mscp_requeue(sc->sc_softc);
-
- /*
- * If it fails to initialise we will notice later and
- * try again (and again...). Do not call udastart()
- * here; it will be done after the controller finishes
- * initialisation.
- */
-/* XXX if (udainit(sc)) */
- printf(" (hung)");
-}
-
-void
-udactlrdone(usc, info)
- struct device *usc;
- int info;
-{
- struct uda_softc *sc = (void *)usc;
-
- /* XXX check if we shall release the BDP */
- sc->sc_unit.uu_ubinfo = info;
- ubadone(&sc->sc_unit);
-}
diff --git a/sys/arch/vax/vsa/ncr.h b/sys/arch/vax/vsa/ncr.h
deleted file mode 100644
index 87a01c7abe6..00000000000
--- a/sys/arch/vax/vsa/ncr.h
+++ /dev/null
@@ -1,76 +0,0 @@
-/* $OpenBSD: ncr.h,v 1.2 1997/05/29 00:05:35 niklas Exp $ */
-/* $NetBSD: ncr.h,v 1.1 1996/07/20 18:55:15 ragge Exp $ */
-
-/*
- * Register map for the Sun3 SCSI Interface (si)
- * The first part of this register map is an NCR5380
- * SCSI Bus Interface Controller (SBIC). The rest is a
- * DMA controller and custom logic in one of two flavors,
- * one for the OBIO interface (3/50,3/60) and one for the
- * VME interface (3/160,3/260,etc.), where some registers
- * are implemented only on one or the other, some on both.
- */
-
-/*
- * Some of these registers apply to only one interface and some
- * apply to both. The registers which apply to the Sun3/50 onboard
- * version only are udc_rdata and udc_raddr. The registers which
- * apply to the Sun3 vme version only are dma_addr, dma_count, bpr,
- * iv_am, and bcrh. Thus, the sbc registers, fifo_data, bcr, and csr
- * apply to both interfaces.
- * One other feature of the vme interface: a write to the dma count
- * register also causes a write to the fifo byte count register and
- * vis versa.
- */
-
-/*
- * NCR5380 Register map (byte-registers at longword addresses)
- */
-struct ncr5380regs {
- volatile u_long sci_r0; /* 200C.0080: CUR_DATA/OUT_DATA (rw) */
- volatile u_long sci_r1; /* 200C.0084: INI_CMD (rw) */
- volatile u_long sci_r2; /* 200C.0088: MODE (rw) */
- volatile u_long sci_r3; /* 200C.008C: TAR_CMD (rw) */
- volatile u_long sci_r4; /* 200C.0090: CUR_STAT/SEL_ENA (rw) */
- volatile u_long sci_r5; /* 200C.0094: STATUS/DMA_SEND (rw) */
- volatile u_long sci_r6; /* 200C.0098: IN_DATA/DMA_TRCV (rw) */
- volatile u_long sci_r7; /* 200C.009C: RESET/DMA_IRCV (rw) */
-};
-
-struct si_regs {
- struct ncr5380regs sci;
-};
-
-/* possible values for the address modifier, sun3 vme version only */
-#define VME_SUPV_DATA_24 0x3d00
-
-/*
- * Status Register.
- * Note:
- * (r) indicates bit is read only.
- * (rw) indicates bit is read or write.
- * (v) vme host adaptor interface only.
- * (o) sun3/50 onboard host adaptor interface only.
- * (b) both vme and sun3/50 host adaptor interfaces.
- */
-#define SI_CSR_DMA_ACTIVE 0x8000 /* (r,o) dma transfer active */
-#define SI_CSR_DMA_CONFLICT 0x4000 /* (r,b) reg accessed while dmaing */
-#define SI_CSR_DMA_BUS_ERR 0x2000 /* (r,b) bus error during dma */
-#define SI_CSR_ID 0x1000 /* (r,b) 0 for 3/50, 1 for SCSI-3, */
- /* 0 if SCSI-3 unmodified */
-#define SI_CSR_FIFO_FULL 0x0800 /* (r,b) fifo full */
-#define SI_CSR_FIFO_EMPTY 0x0400 /* (r,b) fifo empty */
-#define SI_CSR_SBC_IP 0x0200 /* (r,b) sbc interrupt pending */
-#define SI_CSR_DMA_IP 0x0100 /* (r,b) dma interrupt pending */
-#define SI_CSR_LOB 0x00c0 /* (r,v) number of leftover bytes */
-#define SI_CSR_LOB_THREE 0x00c0 /* (r,v) three leftover bytes */
-#define SI_CSR_LOB_TWO 0x0080 /* (r,v) two leftover bytes */
-#define SI_CSR_LOB_ONE 0x0040 /* (r,v) one leftover byte */
-#define SI_CSR_BPCON 0x0020 /* (rw,v) byte packing control */
- /* dma is in 0=longwords, 1=words */
-#define SI_CSR_DMA_EN 0x0010 /* (rw,v) dma/interrupt enable */
-#define SI_CSR_SEND 0x0008 /* (rw,b) dma dir, 1=to device */
-#define SI_CSR_INTR_EN 0x0004 /* (rw,b) interrupts enable */
-#define SI_CSR_FIFO_RES 0x0002 /* (rw,b) inits fifo, 0=reset */
-#define SI_CSR_SCSI_RES 0x0001 /* (rw,b) reset sbc and udc, 0=reset */
-