diff options
author | Miod Vallat <miod@cvs.openbsd.org> | 2004-05-17 08:36:23 +0000 |
---|---|---|
committer | Miod Vallat <miod@cvs.openbsd.org> | 2004-05-17 08:36:23 +0000 |
commit | 3f9c97174af84e9e55f9e8f52a349027c980defc (patch) | |
tree | e94f900cc4c446d46400ac41a87b04fbfcd8753e /sys/arch | |
parent | 4b647ad76f4993556cba722799caaf9f8fd12945 (diff) |
KNF and minor cleaning.
Diffstat (limited to 'sys/arch')
-rw-r--r-- | sys/arch/mvme88k/dev/if_le.c | 49 | ||||
-rw-r--r-- | sys/arch/mvme88k/dev/if_lereg.h | 83 | ||||
-rw-r--r-- | sys/arch/mvme88k/dev/if_levar.h | 20 |
3 files changed, 83 insertions, 69 deletions
diff --git a/sys/arch/mvme88k/dev/if_le.c b/sys/arch/mvme88k/dev/if_le.c index 7b28dd7fe00..6f7e79ebfc3 100644 --- a/sys/arch/mvme88k/dev/if_le.c +++ b/sys/arch/mvme88k/dev/if_le.c @@ -1,4 +1,4 @@ -/* $OpenBSD: if_le.c,v 1.6 2004/05/06 18:37:35 miod Exp $ */ +/* $OpenBSD: if_le.c,v 1.7 2004/05/17 08:36:22 miod Exp $ */ /*- * Copyright (c) 1982, 1992, 1993 @@ -89,11 +89,11 @@ nvram_cmd(sc, cmd, addr) u_char cmd; u_short addr; { - int i; struct vlereg1 *reg1 = (struct vlereg1 *)((struct le_softc *)sc)->sc_r1; + int i; - for (i=0;i<8;i++) { - reg1->ler1_ear=((cmd|(addr<<1))>>i); + for (i = 0; i < 8; i++) { + reg1->ler1_ear = ((cmd | (addr << 1)) >> i); CDELAY; } } @@ -106,21 +106,27 @@ nvram_read(sc, nvram_addr) { u_short val = 0, mask = 0x04000; u_int16_t wbit; - /* these used by macros DO NOT CHANGE!*/ struct vlereg1 *reg1 = (struct vlereg1 *)((struct le_softc *)sc)->sc_r1; - ((struct le_softc *)sc)->csr = 0x4f; + + ((struct le_softc *)sc)->sc_csr = 0x4f; ENABLE_NVRAM; nvram_cmd(sc, NVRAM_RCL, 0); DISABLE_NVRAM; CDELAY; ENABLE_NVRAM; nvram_cmd(sc, NVRAM_READ, nvram_addr); - for (wbit=0; wbit<15; wbit++) { - (reg1->ler1_ear & 0x01) ? (val = (val | mask)) : (val = (val & (~mask))); - mask = mask>>1; + for (wbit = 0; wbit < 15; wbit++) { + if (reg1->ler1_ear & 0x01) + val |= mask; + else + val &= ~mask; + mask = mask >> 1; CDELAY; } - (reg1->ler1_ear & 0x01) ? (val = (val | 0x8000)) : (val = (val & 0x7FFF)); + if (reg1->ler1_ear & 0x01) + val |= 0x8000; + else + val &= 0x7fff; CDELAY; DISABLE_NVRAM; return (val); @@ -130,11 +136,11 @@ void vleetheraddr(sc) struct am7990_softc *sc; { - u_char * cp = sc->sc_arpcom.ac_enaddr; + u_char *cp = sc->sc_arpcom.ac_enaddr; u_int16_t ival[3]; - u_char i; + int i; - for (i=0; i<3; i++) { + for (i = 0; i < 3; i++) { ival[i] = nvram_read(sc, i); } memcpy(cp, &ival[0], 6); @@ -145,7 +151,7 @@ vlewrcsr(sc, port, val) struct am7990_softc *sc; u_int16_t port, val; { - register struct vlereg1 *ler1 = (struct vlereg1 *)((struct le_softc *)sc)->sc_r1; + struct vlereg1 *ler1 = (struct vlereg1 *)((struct le_softc *)sc)->sc_r1; ler1->ler1_rap = port; ler1->ler1_rdp = val; @@ -156,7 +162,7 @@ vlerdcsr(sc, port) struct am7990_softc *sc; u_int16_t port; { - register struct vlereg1 *ler1 = (struct vlereg1 *)((struct le_softc *)sc)->sc_r1; + struct vlereg1 *ler1 = (struct vlereg1 *)((struct le_softc *)sc)->sc_r1; u_int16_t val; ler1->ler1_rap = port; @@ -169,11 +175,12 @@ void vleinit(sc) struct am7990_softc *sc; { - register struct vlereg1 *reg1 = (struct vlereg1 *)((struct le_softc *)sc)->sc_r1; + struct vlereg1 *reg1 = (struct vlereg1 *)((struct le_softc *)sc)->sc_r1; u_char vec = ((struct le_softc *)sc)->sc_vec; u_char ipl = ((struct le_softc *)sc)->sc_ipl; - ((struct le_softc *)sc)->csr = 0x4f; - WRITE_CSR_AND( ~ipl ); + + ((struct le_softc *)sc)->sc_csr = 0x4f; + WRITE_CSR_AND(ipl); SET_VEC(vec); return; } @@ -183,7 +190,8 @@ void vlereset(sc) struct am7990_softc *sc; { - register struct vlereg1 *reg1 = (struct vlereg1 *)((struct le_softc *)sc)->sc_r1; + struct vlereg1 *reg1 = (struct vlereg1 *)((struct le_softc *)sc)->sc_r1; + RESET_HW; #ifdef LEDEBUG if (sc->sc_debug) { @@ -191,14 +199,13 @@ vlereset(sc) } #endif SYSFAIL_CL; - return; } int vle_intr(sc) void *sc; { - register struct vlereg1 *reg1 = (struct vlereg1 *)((struct le_softc *)sc)->sc_r1; + struct vlereg1 *reg1 = (struct vlereg1 *)((struct le_softc *)sc)->sc_r1; int rc; rc = am7990_intr(sc); diff --git a/sys/arch/mvme88k/dev/if_lereg.h b/sys/arch/mvme88k/dev/if_lereg.h index 360a1810430..40ffe14dbdd 100644 --- a/sys/arch/mvme88k/dev/if_lereg.h +++ b/sys/arch/mvme88k/dev/if_lereg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: if_lereg.h,v 1.2 2003/12/30 21:25:59 miod Exp $ */ +/* $OpenBSD: if_lereg.h,v 1.3 2004/05/17 08:36:22 miod Exp $ */ /*- * Copyright (c) 1982, 1992, 1993 @@ -31,49 +31,58 @@ * @(#)if_lereg.h 8.2 (Berkeley) 10/30/93 */ -#define VLEMEMSIZE 0x00040000 +#define VLEMEMSIZE 0x00040000 #define VLEMEMBASE 0xfd6c0000 /* * LANCE registers for MVME376 */ struct vlereg1 { - volatile u_int16_t ler1_csr; /* board control/status register */ - volatile u_int16_t ler1_vec; /* interupt vector register */ - volatile u_int16_t ler1_rdp; /* data port */ - volatile u_int16_t ler1_rap; /* register select port */ - volatile u_int16_t ler1_ear; /* ethernet address register */ + volatile u_int16_t ler1_csr; /* board control/status register */ + volatile u_int16_t ler1_vec; /* interupt vector register */ + volatile u_int16_t ler1_rdp; /* data port */ + volatile u_int16_t ler1_rap; /* register select port */ + volatile u_int16_t ler1_ear; /* ethernet address register */ }; -#define NVRAM_EN 0x0008 /* NVRAM enable bit */ -#define INTR_EN 0x0010 /* Interrupt enable bit */ -#define PARITYB 0x0020 /* Parity clear bit */ -#define HW_RS 0x0040 /* Hardware reset bit */ -#define SYSFAILB 0x0080 /* SYSFAIL bit */ -#define NVRAM_RWEL 0xE0 /* Reset write enable latch */ -#define NVRAM_STO 0x60 /* Store ram to eeprom */ -#define NVRAM_SLP 0xA0 /* Novram into low power mode */ -#define NVRAM_WRITE 0x20 /* Writes word from location x */ -#define NVRAM_SWEL 0xC0 /* Set write enable latch */ -#define NVRAM_RCL 0x40 /* Recall eeprom data into ram */ -#define NVRAM_READ 0x00 /* Reads word from location x */ - -#define CDELAY delay(10000) -#define WRITE_CSR_OR(x) reg1->ler1_csr=((struct le_softc *)sc)->csr|=x -#define WRITE_CSR_AND(x) reg1->ler1_csr=((struct le_softc *)sc)->csr&=x -#define ENABLE_NVRAM WRITE_CSR_AND(~NVRAM_EN) -#define DISABLE_NVRAM WRITE_CSR_OR(NVRAM_EN) -#define ENABLE_INTR WRITE_CSR_AND(~INTR_EN) -#define DISABLE_INTR WRITE_CSR_OR(INTR_EN) -#define RESET_HW WRITE_CSR_AND(~0xFF00);WRITE_CSR_AND(~HW_RS);CDELAY -#define SET_IPL(x) WRITE_CSR_AND(~x) -#define SET_VEC(x) reg1->ler1_vec=0;reg1->ler1_vec |=x; -#define PARITY_CL WRITE_CSR_AND(~PARITYB) -#define SYSFAIL_CL WRITE_CSR_AND(~SYSFAILB) -#define NVRAM_CMD(c,a) for(i=0;i<8;i++){ \ - reg1->ler1_ear=((c|(a<<1))>>i); \ - CDELAY; \ - } \ - CDELAY; +#define NVRAM_EN 0x0008 /* NVRAM enable bit */ +#define INTR_EN 0x0010 /* Interrupt enable bit */ +#define PARITYB 0x0020 /* Parity clear bit */ +#define HW_RS 0x0040 /* Hardware reset bit */ +#define SYSFAILB 0x0080 /* SYSFAIL bit */ +#define NVRAM_RWEL 0xe0 /* Reset write enable latch */ +#define NVRAM_STO 0x60 /* Store ram to eeprom */ +#define NVRAM_SLP 0xa0 /* Novram into low power mode */ +#define NVRAM_WRITE 0x20 /* Writes word from location x */ +#define NVRAM_SWEL 0xc0 /* Set write enable latch */ +#define NVRAM_RCL 0x40 /* Recall eeprom data into ram */ +#define NVRAM_READ 0x00 /* Reads word from location x */ +#define CDELAY delay(10000) +#define WRITE_CSR_OR(x) \ + do { \ + ((struct le_softc *)sc)->sc_csr |= (x); \ + reg1->ler1_csr = ((struct le_softc *)sc)->sc_csr; \ + } while (0) +#define WRITE_CSR_AND(x) \ + do { \ + ((struct le_softc *)sc)->sc_csr &= ~(x); \ + reg1->ler1_csr = ((struct le_softc *)sc)->sc_csr; \ + } while (0) +#define ENABLE_NVRAM WRITE_CSR_AND(NVRAM_EN) +#define DISABLE_NVRAM WRITE_CSR_OR(NVRAM_EN) +#define ENABLE_INTR WRITE_CSR_AND(INTR_EN) +#define DISABLE_INTR WRITE_CSR_OR(INTR_EN) +#define RESET_HW \ + do { \ + WRITE_CSR_AND(0xff00); \ + WRITE_CSR_AND(HW_RS); \ + CDELAY; \ + } while (0) +#define SET_VEC(x) \ + do { \ + reg1->ler1_vec = 0; \ + reg1->ler1_vec |= (x); \ + } while (0) +#define SYSFAIL_CL WRITE_CSR_AND(SYSFAILB) diff --git a/sys/arch/mvme88k/dev/if_levar.h b/sys/arch/mvme88k/dev/if_levar.h index c606ab8ed1b..3bea779c1ce 100644 --- a/sys/arch/mvme88k/dev/if_levar.h +++ b/sys/arch/mvme88k/dev/if_levar.h @@ -1,4 +1,4 @@ -/* $OpenBSD: if_levar.h,v 1.1 2003/12/27 23:58:11 miod Exp $ */ +/* $OpenBSD: if_levar.h,v 1.2 2004/05/17 08:36:22 miod Exp $ */ /* $NetBSD: if_levar.h,v 1.5 1996/05/07 01:27:32 thorpej Exp $ */ /*- @@ -43,14 +43,12 @@ * This structure contains the output queue for the interface, its address, ... */ struct le_softc { - struct am7990_softc sc_am7990; /* glue to MI code */ - - struct intrhand sc_ih; /* interrupt vectoring */ - void *sc_r1; /* LANCE registers */ - u_short csr; /* Control/Status reg image */ - struct evcnt sc_intrcnt; - struct evcnt sc_errcnt; - u_char sc_ipl; - u_char sc_vec; + struct am7990_softc sc_am7990; /* glue to MI code */ + struct intrhand sc_ih; /* interrupt vectoring */ + u_int16_t sc_csr; /* CSR image */ + void *sc_r1; /* LANCE registers */ + struct evcnt sc_intrcnt; + struct evcnt sc_errcnt; + u_char sc_ipl; + u_char sc_vec; }; - |