Preliminary support for MVME180 and MVME181 boards. On-board serial ports

and VME controller are supported; tod chip isn't supported yet (coming soon).
MVME236 memory boards are not supported and won't likely be (unless I get my
hands on one).

MVME181-1 boots multiuser (slowly) with MVME328 SCSI and MVME376 Ethernet
despite only having 8MB of memory onboard.

MVME180 untested; might need tweaking to get MVME SCSI and Ethernet boards
supported.

Many thanks to Matti Nummi for lending me an MVME181 board.

19 files changed, 1380 insertions, 244 deletions

diff --git a/sys/arch/mvme88k/compile/.cvsignore b/sys/arch/mvme88k/compile/.cvsignore
index 27c785301a2..2230f83179d 100644
--- a/sys/arch/mvme88k/compile/.cvsignore
+++ b/sys/arch/mvme88k/compile/.cvsignore
@@ -1,5 +1,6 @@
 GENERIC
 GENERIC.MP
+M181
 M187
 M188
 M197
diff --git a/sys/arch/mvme88k/conf/GENERIC b/sys/arch/mvme88k/conf/GENERIC
index fa1c9110349..09067dc91bb 100644
--- a/sys/arch/mvme88k/conf/GENERIC
+++ b/sys/arch/mvme88k/conf/GENERIC
@@ -1,4 +1,4 @@
-#	$OpenBSD: GENERIC,v 1.56 2013/02/19 20:52:26 miod Exp $
+#	$OpenBSD: GENERIC,v 1.57 2013/05/17 22:51:59 miod Exp $
 #
 # For further information on compiling OpenBSD kernels, see the config(8)
 # man page.
@@ -18,11 +18,12 @@ option		M88100
 option		M88110
 option		M88410
 
+option		MVME181		# support for MVME181 (requires M88100)
 option		MVME187		# support for MVME187 (requires M88100)
 option		MVME188		# support for MVME188 (requires M88100)
 option		MVME197		# support for MVME197 (requires M88110, M88410)
 
-# Define this if your processor has the xxx.usr bug (mask C82N)
+# Define this if your M88100 processor has the xxx.usr bug (mask C82N)
 option		ERRATA__XXX_USR
 
 
@@ -32,58 +33,65 @@ config		bsd		swap generic
 # devices
 #
 
-mainbus0 at root
+mainbus0	at root
+
+# MVME181 devices
+angelfire0	at mainbus0 addr 0xff800000
+vme0		at angelfire0 offset 0x680000
+dart0		at angelfire0 offset 0x640000 ipl 5
 
 # MVME1x7 devices
-pcctwo0 at mainbus0 addr 0xfff00000		# MVME187
-bussw0	at mainbus0 addr 0xfff00000		# MVME197
-sram0	at mainbus0 addr 0xffe00000		# MVME187
-pcctwo0 at bussw0 offset 0x00000		# MVME197
-nvram0	at pcctwo0 offset 0xc0000
-vme0	at pcctwo0 offset 0x40000
-ie0	at pcctwo0 offset 0x46000 ipl 3
-osiop0	at pcctwo0 offset 0x47000 ipl 2
-cl0	at pcctwo0 offset 0x45000 ipl 3
-cl1	at pcctwo0 offset 0x45200 ipl 3		# M8120 only
-#lptwo0	at pcctwo0 offset 0x45000 ipl 1
-memc0	at pcctwo0 offset 0x43000
-memc1	at pcctwo0 offset 0x43100
+pcctwo0		at mainbus0 addr 0xfff00000		# MVME187
+bussw0		at mainbus0 addr 0xfff00000		# MVME197
+sram0		at mainbus0 addr 0xffe00000		# MVME187
+pcctwo0		at bussw0 offset 0x00000		# MVME197
+nvram0		at pcctwo0 offset 0xc0000
+vme0		at pcctwo0 offset 0x40000
+ie0		at pcctwo0 offset 0x46000 ipl 3
+osiop0		at pcctwo0 offset 0x47000 ipl 2
+cl0		at pcctwo0 offset 0x45000 ipl 3
+cl1		at pcctwo0 offset 0x45200 ipl 3		# M8120 only
+#lptwo0		at pcctwo0 offset 0x45000 ipl 1
+memc0		at pcctwo0 offset 0x43000
+memc1		at pcctwo0 offset 0x43100
 
 # MVME188 devices
-syscon0 at mainbus0 addr 0xfff00000		# MVME188
-nvram0	at syscon0 offset 0x80000
-dart0	at syscon0 offset 0x82000 ipl 3
-vme0	at syscon0 offset 0x85000
+syscon0		at mainbus0 addr 0xfff00000		# MVME188
+nvram0		at syscon0 offset 0x80000
+dart0		at syscon0 offset 0x82000 ipl 3
+vme0		at syscon0 offset 0x85000
 
-vmes0	at vme0
-vmel0	at vme0
+vmes0		at vme0
+vmel0		at vme0
 
 # MVME327
-vsbic0	at vmes0 addr 0xffffa600 ipl 2
-vsbic1	at vmes0 addr 0xffffa700 ipl 2
+vsbic0		at vmes0 addr 0xffffa600 ipl 2
+vsbic1		at vmes0 addr 0xffffa700 ipl 2
 # MVME328, MVME328XT
-vs0	at vmes0 addr 0xffff9000 ipl 2
-vs1	at vmes0 addr 0xffff9800 ipl 2
-vs2	at vmes0 addr 0xffff4800 ipl 2
-vs3	at vmes0 addr 0xffff5800 ipl 2
-vs4	at vmes0 addr 0xffff7000 ipl 2
-vs5	at vmes0 addr 0xffff7800 ipl 2
+vs0		at vmes0 addr 0xffff9000 ipl 2
+vs1		at vmes0 addr 0xffff9800 ipl 2
+vs2		at vmes0 addr 0xffff4800 ipl 2
+vs3		at vmes0 addr 0xffff5800 ipl 2
+vs4		at vmes0 addr 0xffff7000 ipl 2
+vs5		at vmes0 addr 0xffff7800 ipl 2
 # MVME332XT
-vx0	at vmes0 addr 0xff780000 ipl 3
-vx1	at vmes0 addr 0xff790000 ipl 3
-vx2	at vmes0 addr 0xff7a0000 ipl 3
-vx3	at vmes0 addr 0xff7b0000 ipl 3
+vx0		at vmes0 addr 0xff780000 ipl 3
+vx1		at vmes0 addr 0xff790000 ipl 3
+vx2		at vmes0 addr 0xff7a0000 ipl 3
+vx3		at vmes0 addr 0xff7b0000 ipl 3
 # MVME376
-le0	at vmes0 addr 0xffff1200 ipl 3
-le1	at vmes0 addr 0xffff1400 ipl 3
-le2	at vmes0 addr 0xffff1600 ipl 3
-
+le0		at vmes0 addr 0xffff1200 ipl 3
+le1		at vmes0 addr 0xffff1400 ipl 3
+le2		at vmes0 addr 0xffff1600 ipl 3
+le3		at vmes0 addr 0xffff5400 ipl 3
+le4		at vmes0 addr 0xffff5600 ipl 3
+le5		at vmes0 addr 0xffffa400 ipl 3
 
-scsibus* at scsi?
-sd*	at scsibus?
-st*	at scsibus?
-cd*	at scsibus?
-ch*	at scsibus?
-safte*	at scsibus?
-ses*	at scsibus?
-uk*	at scsibus?
+scsibus*	at scsi?
+sd*		at scsibus?
+st*		at scsibus?
+cd*		at scsibus?
+ch*		at scsibus?
+safte*		at scsibus?
+ses*		at scsibus?
+uk*		at scsibus?
diff --git a/sys/arch/mvme88k/conf/M181 b/sys/arch/mvme88k/conf/M181
new file mode 100644
index 00000000000..f7f90acd9ef
--- /dev/null
+++ b/sys/arch/mvme88k/conf/M181
@@ -0,0 +1,71 @@
+#	$OpenBSD: M181,v 1.1 2013/05/17 22:51:59 miod Exp $
+#
+# For further information on compiling OpenBSD kernels, see the config(8)
+# man page.
+#
+# For further information on hardware support for this architecture, see
+# the intro(4) man page.  For further information about kernel options
+# for this architecture, see the options(4) man page.  For an explanation
+# of each device driver in this file see the section 4 man page for the
+# device.
+
+machine		mvme88k m88k
+include		"../../../conf/GENERIC"
+maxusers	32			# estimated number of users
+
+# Processor type
+option		M88100
+
+option		MVME181		# support for MVME181 (requires M88100)
+
+# Define this if your M88100 processor has the xxx.usr bug (mask C82N)
+option		ERRATA__XXX_USR
+
+
+config		bsd		swap generic
+
+#
+# devices
+#
+
+mainbus0	at root
+
+# MVME181 devices
+angelfire0	at mainbus0 addr 0xff800000
+vme0		at angelfire0 offset 0x680000
+dart0		at angelfire0 offset 0x640000 ipl 5
+
+vmes0		at vme0
+vmel0		at vme0
+
+# MVME327
+vsbic0		at vmes0 addr 0xffffa600 ipl 2
+vsbic1		at vmes0 addr 0xffffa700 ipl 2
+# MVME328, MVME328XT
+vs0		at vmes0 addr 0xffff9000 ipl 2
+vs1		at vmes0 addr 0xffff9800 ipl 2
+vs2		at vmes0 addr 0xffff4800 ipl 2
+vs3		at vmes0 addr 0xffff5800 ipl 2
+vs4		at vmes0 addr 0xffff7000 ipl 2
+vs5		at vmes0 addr 0xffff7800 ipl 2
+# MVME332XT
+vx0		at vmes0 addr 0xff780000 ipl 3
+vx1		at vmes0 addr 0xff790000 ipl 3
+vx2		at vmes0 addr 0xff7a0000 ipl 3
+vx3		at vmes0 addr 0xff7b0000 ipl 3
+# MVME376
+le0		at vmes0 addr 0xffff1200 ipl 3
+le1		at vmes0 addr 0xffff1400 ipl 3
+le2		at vmes0 addr 0xffff1600 ipl 3
+le3		at vmes0 addr 0xffff5400 ipl 3
+le4		at vmes0 addr 0xffff5600 ipl 3
+le5		at vmes0 addr 0xffffa400 ipl 3
+
+scsibus*	at scsi?
+sd*		at scsibus?
+st*		at scsibus?
+cd*		at scsibus?
+ch*		at scsibus?
+safte*		at scsibus?
+ses*		at scsibus?
+uk*		at scsibus?
diff --git a/sys/arch/mvme88k/conf/M187 b/sys/arch/mvme88k/conf/M187
index 488604a83b4..ca440d4eaa4 100644
--- a/sys/arch/mvme88k/conf/M187
+++ b/sys/arch/mvme88k/conf/M187
@@ -1,4 +1,4 @@
-#	$OpenBSD: M187,v 1.38 2011/06/29 20:52:09 matthew Exp $
+#	$OpenBSD: M187,v 1.39 2013/05/17 22:51:59 miod Exp $
 #
 # For further information on compiling OpenBSD kernels, see the config(8)
 # man page.
@@ -16,7 +16,7 @@ maxusers	32			# estimated number of users
 # Processor type
 option		M88100
 
-option		MVME187			# support for 187 (requires M88100)
+option		MVME187		# support for MVME187 (requires M88100)
 
 # Define this if your processor has the xxx.usr bug (mask C82N)
 option		ERRATA__XXX_USR
@@ -28,50 +28,53 @@ config		bsd		swap generic
 # devices
 #
 
-mainbus0 at root
+mainbus0	at root
 
 # MVME1x7 devices
-pcctwo0 at mainbus0 addr 0xfff00000
-sram0	at mainbus0 addr 0xffe00000
-nvram0	at pcctwo0 offset 0xc0000
-vme0	at pcctwo0 offset 0x40000
-ie0	at pcctwo0 offset 0x46000 ipl 3
-osiop0	at pcctwo0 offset 0x47000 ipl 2
-cl0	at pcctwo0 offset 0x45000 ipl 3
-cl1	at pcctwo0 offset 0x45200 ipl 3		# M8120 only
-#lptwo0	at pcctwo0 offset 0x45000 ipl 1
-memc0	at pcctwo0 offset 0x43000
-memc1	at pcctwo0 offset 0x43100
+pcctwo0		at mainbus0 addr 0xfff00000
+sram0		at mainbus0 addr 0xffe00000
+nvram0		at pcctwo0 offset 0xc0000
+vme0		at pcctwo0 offset 0x40000
+ie0		at pcctwo0 offset 0x46000 ipl 3
+osiop0		at pcctwo0 offset 0x47000 ipl 2
+cl0		at pcctwo0 offset 0x45000 ipl 3
+cl1		at pcctwo0 offset 0x45200 ipl 3		# M8120 only
+#lptwo0		at pcctwo0 offset 0x45000 ipl 1
+memc0		at pcctwo0 offset 0x43000
+memc1		at pcctwo0 offset 0x43100
 
-vmes0	at vme0
-vmel0	at vme0
+vmes0		at vme0
+vmel0		at vme0
 
 # MVME327
-vsbic0	at vmes0 addr 0xffffa600 ipl 2
-vsbic1	at vmes0 addr 0xffffa700 ipl 2
+vsbic0		at vmes0 addr 0xffffa600 ipl 2
+vsbic1		at vmes0 addr 0xffffa700 ipl 2
 # MVME328, MVME328XT
-vs0	at vmes0 addr 0xffff9000 ipl 2
-vs1	at vmes0 addr 0xffff9800 ipl 2
-vs2	at vmes0 addr 0xffff4800 ipl 2
-vs3	at vmes0 addr 0xffff5800 ipl 2
-vs4	at vmes0 addr 0xffff7000 ipl 2
-vs5	at vmes0 addr 0xffff7800 ipl 2
+vs0		at vmes0 addr 0xffff9000 ipl 2
+vs1		at vmes0 addr 0xffff9800 ipl 2
+vs2		at vmes0 addr 0xffff4800 ipl 2
+vs3		at vmes0 addr 0xffff5800 ipl 2
+vs4		at vmes0 addr 0xffff7000 ipl 2
+vs5		at vmes0 addr 0xffff7800 ipl 2
 # MVME332XT
-vx0	at vmes0 addr 0xff780000 ipl 3
-vx1	at vmes0 addr 0xff790000 ipl 3
-vx2	at vmes0 addr 0xff7a0000 ipl 3
-vx3	at vmes0 addr 0xff7b0000 ipl 3
+vx0		at vmes0 addr 0xff780000 ipl 3
+vx1		at vmes0 addr 0xff790000 ipl 3
+vx2		at vmes0 addr 0xff7a0000 ipl 3
+vx3		at vmes0 addr 0xff7b0000 ipl 3
 # MVME376
-le0	at vmes0 addr 0xffff1200 ipl 3
-le1	at vmes0 addr 0xffff1400 ipl 3
-le2	at vmes0 addr 0xffff1600 ipl 3
+le0		at vmes0 addr 0xffff1200 ipl 3
+le1		at vmes0 addr 0xffff1400 ipl 3
+le2		at vmes0 addr 0xffff1600 ipl 3
+le3		at vmes0 addr 0xffff5400 ipl 3
+le4		at vmes0 addr 0xffff5600 ipl 3
+le5		at vmes0 addr 0xffffa400 ipl 3
 
 
-scsibus* at scsi?
-sd*	at scsibus?
-st*	at scsibus?
-cd*	at scsibus?
-ch*	at scsibus?
-safte*	at scsibus?
-ses*	at scsibus?
-uk*	at scsibus?
+scsibus*	at scsi?
+sd*		at scsibus?
+st*		at scsibus?
+cd*		at scsibus?
+ch*		at scsibus?
+safte*		at scsibus?
+ses*		at scsibus?
+uk*		at scsibus?
diff --git a/sys/arch/mvme88k/conf/M188 b/sys/arch/mvme88k/conf/M188
index 7c548af2973..988c4be5f8d 100644
--- a/sys/arch/mvme88k/conf/M188
+++ b/sys/arch/mvme88k/conf/M188
@@ -1,4 +1,4 @@
-#	$OpenBSD: M188,v 1.31 2011/06/29 20:52:09 matthew Exp $
+#	$OpenBSD: M188,v 1.32 2013/05/17 22:51:59 miod Exp $
 #
 # For further information on compiling OpenBSD kernels, see the config(8)
 # man page.
@@ -16,7 +16,7 @@ maxusers	32			# estimated number of users
 # Processor type
 option		M88100
 
-option		MVME188			# support for 188 (requires M88100)
+option		MVME188		# support for MVME188 (requires M88100)
 
 # Define this if your processor has the xxx.usr bug (mask C82N)
 option		ERRATA__XXX_USR
@@ -29,43 +29,46 @@ config		bsd		swap generic
 # devices
 #
 
-mainbus0 at root
+mainbus0	at root
 
 # MVME188 devices
-syscon0 at mainbus0 addr 0xfff00000
-nvram0	at syscon0 offset 0x80000
-dart0	at syscon0 offset 0x82000 ipl 3
-vme0	at syscon0 offset 0x85000
+syscon0		at mainbus0 addr 0xfff00000
+nvram0		at syscon0 offset 0x80000
+dart0		at syscon0 offset 0x82000 ipl 3
+vme0		at syscon0 offset 0x85000
 
-vmes0	at vme0
-vmel0	at vme0
+vmes0		at vme0
+vmel0		at vme0
 
 # MVME327
-vsbic0	at vmes0 addr 0xffffa600 ipl 2
-vsbic1	at vmes0 addr 0xffffa700 ipl 2
+vsbic0		at vmes0 addr 0xffffa600 ipl 2
+vsbic1		at vmes0 addr 0xffffa700 ipl 2
 # MVME328, MVME328XT
-vs0	at vmes0 addr 0xffff9000 ipl 2
-vs1	at vmes0 addr 0xffff9800 ipl 2
-vs2	at vmes0 addr 0xffff4800 ipl 2
-vs3	at vmes0 addr 0xffff5800 ipl 2
-vs4	at vmes0 addr 0xffff7000 ipl 2
-vs5	at vmes0 addr 0xffff7800 ipl 2
+vs0		at vmes0 addr 0xffff9000 ipl 2
+vs1		at vmes0 addr 0xffff9800 ipl 2
+vs2		at vmes0 addr 0xffff4800 ipl 2
+vs3		at vmes0 addr 0xffff5800 ipl 2
+vs4		at vmes0 addr 0xffff7000 ipl 2
+vs5		at vmes0 addr 0xffff7800 ipl 2
 # MVME332XT
-vx0	at vmes0 addr 0xff780000 ipl 3
-vx1	at vmes0 addr 0xff790000 ipl 3
-vx2	at vmes0 addr 0xff7a0000 ipl 3
-vx3	at vmes0 addr 0xff7b0000 ipl 3
+vx0		at vmes0 addr 0xff780000 ipl 3
+vx1		at vmes0 addr 0xff790000 ipl 3
+vx2		at vmes0 addr 0xff7a0000 ipl 3
+vx3		at vmes0 addr 0xff7b0000 ipl 3
 # MVME376
-le0	at vmes0 addr 0xffff1200 ipl 3
-le1	at vmes0 addr 0xffff1400 ipl 3
-le2	at vmes0 addr 0xffff1600 ipl 3
+le0		at vmes0 addr 0xffff1200 ipl 3
+le1		at vmes0 addr 0xffff1400 ipl 3
+le2		at vmes0 addr 0xffff1600 ipl 3
+le3		at vmes0 addr 0xffff5400 ipl 3
+le4		at vmes0 addr 0xffff5600 ipl 3
+le5		at vmes0 addr 0xffffa400 ipl 3
 
 
-scsibus* at scsi?
-sd*	at scsibus?
-st*	at scsibus?
-cd*	at scsibus?
-ch*	at scsibus?
-safte*	at scsibus?
-ses*	at scsibus?
-uk*	at scsibus?
+scsibus*	at scsi?
+sd*		at scsibus?
+st*		at scsibus?
+cd*		at scsibus?
+ch*		at scsibus?
+safte*		at scsibus?
+ses*		at scsibus?
+uk*		at scsibus?
diff --git a/sys/arch/mvme88k/conf/M197 b/sys/arch/mvme88k/conf/M197
index a80fd6a8a38..bbaba854b3d 100644
--- a/sys/arch/mvme88k/conf/M197
+++ b/sys/arch/mvme88k/conf/M197
@@ -1,4 +1,4 @@
-#	$OpenBSD: M197,v 1.35 2013/02/19 20:52:26 miod Exp $
+#	$OpenBSD: M197,v 1.36 2013/05/17 22:51:59 miod Exp $
 #
 # For further information on compiling OpenBSD kernels, see the config(8)
 # man page.
@@ -25,49 +25,52 @@ config		bsd		swap generic
 # devices
 #
 
-mainbus0 at root
+mainbus0	at root
 
 # MVME1x7 devices
-bussw0	at mainbus0 addr 0xfff00000
-pcctwo0 at bussw0 offset 0x00000
-nvram0	at pcctwo0 offset 0xc0000
-vme0	at pcctwo0 offset 0x40000
-ie0	at pcctwo0 offset 0x46000 ipl 3
-osiop0	at pcctwo0 offset 0x47000 ipl 2
-cl0	at pcctwo0 offset 0x45000 ipl 3
-#lptwo0	at pcctwo0 offset 0x45000 ipl 1
-memc0	at pcctwo0 offset 0x43000
-memc1	at pcctwo0 offset 0x43100
+bussw0		at mainbus0 addr 0xfff00000
+pcctwo0		at bussw0 offset 0x00000
+nvram0		at pcctwo0 offset 0xc0000
+vme0		at pcctwo0 offset 0x40000
+ie0		at pcctwo0 offset 0x46000 ipl 3
+osiop0		at pcctwo0 offset 0x47000 ipl 2
+cl0		at pcctwo0 offset 0x45000 ipl 3
+#lptwo0		at pcctwo0 offset 0x45000 ipl 1
+memc0		at pcctwo0 offset 0x43000
+memc1		at pcctwo0 offset 0x43100
 
-vmes0	at vme0
-vmel0	at vme0
+vmes0		at vme0
+vmel0		at vme0
 
 # MVME327
-vsbic0	at vmes0 addr 0xffffa600 ipl 2
-vsbic1	at vmes0 addr 0xffffa700 ipl 2
+vsbic0		at vmes0 addr 0xffffa600 ipl 2
+vsbic1		at vmes0 addr 0xffffa700 ipl 2
 # MVME328, MVME328XT
-vs0	at vmes0 addr 0xffff9000 ipl 2
-vs1	at vmes0 addr 0xffff9800 ipl 2
-vs2	at vmes0 addr 0xffff4800 ipl 2
-vs3	at vmes0 addr 0xffff5800 ipl 2
-vs4	at vmes0 addr 0xffff7000 ipl 2
-vs5	at vmes0 addr 0xffff7800 ipl 2
+vs0		at vmes0 addr 0xffff9000 ipl 2
+vs1		at vmes0 addr 0xffff9800 ipl 2
+vs2		at vmes0 addr 0xffff4800 ipl 2
+vs3		at vmes0 addr 0xffff5800 ipl 2
+vs4		at vmes0 addr 0xffff7000 ipl 2
+vs5		at vmes0 addr 0xffff7800 ipl 2
 # MVME332XT
-vx0	at vmes0 addr 0xff780000 ipl 3
-vx1	at vmes0 addr 0xff790000 ipl 3
-vx2	at vmes0 addr 0xff7a0000 ipl 3
-vx3	at vmes0 addr 0xff7b0000 ipl 3
+vx0		at vmes0 addr 0xff780000 ipl 3
+vx1		at vmes0 addr 0xff790000 ipl 3
+vx2		at vmes0 addr 0xff7a0000 ipl 3
+vx3		at vmes0 addr 0xff7b0000 ipl 3
 # MVME376
-le0	at vmes0 addr 0xffff1200 ipl 3
-le1	at vmes0 addr 0xffff1400 ipl 3
-le2	at vmes0 addr 0xffff1600 ipl 3
+le0		at vmes0 addr 0xffff1200 ipl 3
+le1		at vmes0 addr 0xffff1400 ipl 3
+le2		at vmes0 addr 0xffff1600 ipl 3
+le3		at vmes0 addr 0xffff5400 ipl 3
+le4		at vmes0 addr 0xffff5600 ipl 3
+le5		at vmes0 addr 0xffffa400 ipl 3
 
 
-scsibus* at scsi?
-sd*	at scsibus?
-st*	at scsibus?
-cd*	at scsibus?
-ch*	at scsibus?
-safte*	at scsibus?
-ses*	at scsibus?
-uk*	at scsibus?
+scsibus*	at scsi?
+sd*		at scsibus?
+st*		at scsibus?
+cd*		at scsibus?
+ch*		at scsibus?
+safte*		at scsibus?
+ses*		at scsibus?
+uk*		at scsibus?
diff --git a/sys/arch/mvme88k/conf/RAMDISK b/sys/arch/mvme88k/conf/RAMDISK
index 15311e39270..e96f973950c 100644
--- a/sys/arch/mvme88k/conf/RAMDISK
+++ b/sys/arch/mvme88k/conf/RAMDISK
@@ -1,4 +1,4 @@
-#	$OpenBSD: RAMDISK,v 1.35 2013/02/19 20:52:26 miod Exp $
+#	$OpenBSD: RAMDISK,v 1.36 2013/05/17 22:51:59 miod Exp $
 
 machine		mvme88k m88k
 
@@ -11,6 +11,7 @@ option		M88100
 option		M88110
 option		M88410
 
+option		MVME181		# support for MVME181 (requires M88100)
 option		MVME187		# support for MVME187 (requires M88100)
 option		MVME188		# support for MVME188 (requires M88100)
 option		MVME197		# support for MVME197 (requires M88110, M88410)
@@ -20,9 +21,9 @@ option		ERRATA__XXX_USR
 
 maxusers	32
 
-option		SCSITERSE
-option		SMALL_KERNEL
-option		NO_PROPOLICE
+#option		SCSITERSE
+#option		SMALL_KERNEL
+#option		NO_PROPOLICE
 option		TIMEZONE=0
 option		DST=0
 option		FFS
@@ -34,54 +35,65 @@ option		BOOT_CONFIG
 
 config		bsd		root rd0a swap on rd0b
 
-mainbus0 at root
-
-bussw0	at mainbus0 addr 0xfff00000
-pcctwo0 at mainbus0 addr 0xfff00000
-syscon0 at mainbus0 addr 0xfff00000
-
-pcctwo0 at bussw0 offset 0x00000
-
-vme0	at pcctwo0 offset 0x40000
-nvram0	at pcctwo0 offset 0xc0000
-ie0	at pcctwo0 offset 0x46000 ipl 3
-osiop0	at pcctwo0 offset 0x47000 ipl 2
-cl0	at pcctwo0 offset 0x45000 ipl 3
-#cl1	at pcctwo0 offset 0x45200 ipl 3		# M8120 only
-
-nvram0	at syscon0 offset 0x80000
-dart0	at syscon0 offset 0x82000 ipl 3
-vme0	at syscon0 offset 0x85000
-
-vmes0	at vme0
-#vmel0	at vme0
+mainbus0	at root
+
+# MVME181 devices
+angelfire0	at mainbus0 addr 0xff800000
+vme0		at angelfire0 offset 0x680000
+dart0		at angelfire0 offset 0x640000 ipl 5
+
+# MVME1x7 devices
+pcctwo0		at mainbus0 addr 0xfff00000		# MVME187
+bussw0		at mainbus0 addr 0xfff00000		# MVME197
+#sram0		at mainbus0 addr 0xffe00000		# MVME187
+pcctwo0		at bussw0 offset 0x00000		# MVME197
+nvram0		at pcctwo0 offset 0xc0000
+vme0		at pcctwo0 offset 0x40000
+ie0		at pcctwo0 offset 0x46000 ipl 3
+osiop0		at pcctwo0 offset 0x47000 ipl 2
+cl0		at pcctwo0 offset 0x45000 ipl 3
+#cl1		at pcctwo0 offset 0x45200 ipl 3		# M8120 only
+#lptwo0		at pcctwo0 offset 0x45000 ipl 1
+memc0		at pcctwo0 offset 0x43000
+memc1		at pcctwo0 offset 0x43100
+
+# MVME188 devices
+syscon0		at mainbus0 addr 0xfff00000		# MVME188
+nvram0		at syscon0 offset 0x80000
+dart0		at syscon0 offset 0x82000 ipl 3
+vme0		at syscon0 offset 0x85000
+
+vmes0		at vme0
+vmel0		at vme0
 
 # MVME327
-vsbic0	at vmes0 addr 0xffffa600 ipl 2
-vsbic1	at vmes0 addr 0xffffa700 ipl 2
+vsbic0		at vmes0 addr 0xffffa600 ipl 2
+vsbic1		at vmes0 addr 0xffffa700 ipl 2
 # MVME328, MVME328XT
-vs0	at vmes0 addr 0xffff9000 ipl 2
-vs1	at vmes0 addr 0xffff9800 ipl 2
-vs2	at vmes0 addr 0xffff4800 ipl 2
-vs3	at vmes0 addr 0xffff5800 ipl 2
-vs4	at vmes0 addr 0xffff7000 ipl 2
-vs5	at vmes0 addr 0xffff7800 ipl 2
+vs0		at vmes0 addr 0xffff9000 ipl 2
+vs1		at vmes0 addr 0xffff9800 ipl 2
+vs2		at vmes0 addr 0xffff4800 ipl 2
+vs3		at vmes0 addr 0xffff5800 ipl 2
+vs4		at vmes0 addr 0xffff7000 ipl 2
+vs5		at vmes0 addr 0xffff7800 ipl 2
 # MVME332XT
-#vx0	at vmes0 addr 0xff780000 ipl 3
-#vx1	at vmes0 addr 0xff790000 ipl 3
-#vx2	at vmes0 addr 0xff7a0000 ipl 3
-#vx3	at vmes0 addr 0xff7b0000 ipl 3
+#vx0		at vmes0 addr 0xff780000 ipl 3
+#vx1		at vmes0 addr 0xff790000 ipl 3
+#vx2		at vmes0 addr 0xff7a0000 ipl 3
+#vx3		at vmes0 addr 0xff7b0000 ipl 3
 # MVME376
-le0	at vmes0 addr 0xffff1200 ipl 3
-le1	at vmes0 addr 0xffff1400 ipl 3
-le2	at vmes0 addr 0xffff1600 ipl 3
-
-
-scsibus* at scsi?
-sd*	at scsibus?
-st*	at scsibus?
-cd*	at scsibus?
-
-pseudo-device	loop	1
-pseudo-device	bpfilter 1
-pseudo-device	rd	1
+le0		at vmes0 addr 0xffff1200 ipl 3
+le1		at vmes0 addr 0xffff1400 ipl 3
+le2		at vmes0 addr 0xffff1600 ipl 3
+le3		at vmes0 addr 0xffff5400 ipl 3
+le4		at vmes0 addr 0xffff5600 ipl 3
+le5		at vmes0 addr 0xffffa400 ipl 3
+
+scsibus*	at scsi?
+sd*		at scsibus?
+st*		at scsibus?
+cd*		at scsibus?
+
+pseudo-device	loop		1
+pseudo-device	bpfilter	1
+pseudo-device	rd		1
diff --git a/sys/arch/mvme88k/conf/files.mvme88k b/sys/arch/mvme88k/conf/files.mvme88k
index 6552749b6aa..64dda5ee2bc 100644
--- a/sys/arch/mvme88k/conf/files.mvme88k
+++ b/sys/arch/mvme88k/conf/files.mvme88k
@@ -1,18 +1,26 @@
-#	$OpenBSD: files.mvme88k,v 1.47 2013/05/17 22:46:27 miod Exp $
+#	$OpenBSD: files.mvme88k,v 1.48 2013/05/17 22:51:59 miod Exp $
 #
 maxpartitions 16
 
 device	mainbus {[addr = -1]}
 attach	mainbus at root
 
+# MVME180/181 base logic
+device	angelfire {[offset = -1], [ipl = 0]}
+attach	angelfire at mainbus
+file	arch/mvme88k/dev/angelfire.c			angelfire
+
+# MVME197 BusSwitch system bus
 device	bussw {[offset = -1], [ipl = 0]}
 attach	bussw at mainbus
 file	arch/mvme88k/dev/bussw.c			bussw needs-count
 
+# MVME187 PCC2 system bus
 device	pcctwo {[offset = -1], [ipl = 0]}
 attach	pcctwo at bussw, mainbus
 file	arch/mvme88k/dev/pcctwo.c			pcctwo
 
+# MVME188 base logic
 device	syscon {[offset = -1], [ipl = 0]}
 attach	syscon at mainbus
 file	arch/mvme88k/dev/syscon.c			syscon
@@ -34,7 +42,7 @@ attach	cl at pcctwo
 file	arch/mvme88k/dev/cl.c				cl needs-count
 
 device	dart: tty
-attach	dart at syscon
+attach	dart at angelfire, syscon
 file	arch/mvme88k/dev/dart.c				dart needs-count
 
 include	"scsi/files.scsi"
@@ -49,7 +57,7 @@ attach	osiop at pcctwo with osiop_pcctwo
 file	arch/mvme88k/dev/osiop_pcctwo.c			osiop_pcctwo
 
 device	vme {}
-attach	vme at pcctwo, syscon
+attach	vme at angelfire, pcctwo, syscon
 device	vmes {[addr = -1], [vec = -1], [ipl = 0]}
 attach	vmes at vme
 device	vmel {[addr = -1], [vec = -1], [ipl = 0]}
@@ -69,6 +77,7 @@ file	arch/mvme88k/mvme88k/db_machdep.c		ddb
 file	arch/mvme88k/mvme88k/disksubr.c
 file	arch/mvme88k/mvme88k/eh.S
 file	arch/mvme88k/mvme88k/machdep.c
+file	arch/mvme88k/mvme88k/m181_machdep.c		mvme181
 file	arch/mvme88k/mvme88k/m187_machdep.c		mvme187
 file	arch/mvme88k/mvme88k/m188_machdep.c		mvme188
 file	arch/mvme88k/mvme88k/m197_machdep.c		mvme197
diff --git a/sys/arch/mvme88k/dev/angelfire.c b/sys/arch/mvme88k/dev/angelfire.c
new file mode 100644
index 00000000000..b16de8b6c6d
--- /dev/null
+++ b/sys/arch/mvme88k/dev/angelfire.c
@@ -0,0 +1,168 @@
+/*	$OpenBSD: angelfire.c,v 1.1 2013/05/17 22:51:59 miod Exp $	*/
+
+/*
+ * Copyright (c) 2013 Miodrag Vallat.
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * Logical bus for the AngelFire System Controller and on-board resources
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+#include <sys/kernel.h>
+#include <sys/proc.h>
+
+#include <machine/autoconf.h>
+#include <machine/board.h>
+#include <machine/cpu.h>
+
+#include <machine/mvme181.h>
+
+struct angelfiresoftc {
+	struct device	sc_dev;
+
+	struct intrhand sc_abih;	/* abort switch */
+	struct intrhand sc_parih;	/* parity error */
+};
+
+void	angelfireattach(struct device *, struct device *, void *);
+int	angelfirematch(struct device *, void *, void *);
+
+int	angelfireprint(void *, const char *);
+int	angelfirescan(struct device *, void *, void *);
+int	angelfireabort(void *);
+int	angelfireparerr(void *);
+
+const struct cfattach angelfire_ca = {
+	sizeof(struct angelfiresoftc), angelfirematch, angelfireattach
+};
+
+struct cfdriver angelfire_cd = {
+	NULL, "angelfire", DV_DULL
+};
+
+int
+angelfirematch(struct device *parent, void *vcf, void *aux)
+{
+	switch (brdtyp) {
+	case BRD_180:
+	case BRD_181:
+		return angelfire_cd.cd_ndevs == 0;
+	default:
+		return 0;
+	}
+}
+
+void
+angelfireattach(struct device *parent, struct device *self, void *aux)
+{
+	struct angelfiresoftc *sc = (struct angelfiresoftc *)self;
+
+	printf("\n");
+
+	sc->sc_abih.ih_fn = angelfireabort;
+	sc->sc_abih.ih_arg = 0;
+	sc->sc_abih.ih_wantframe = 1;
+	sc->sc_abih.ih_ipl = IPL_ABORT;
+	platform->intsrc_establish(INTSRC_ABORT, &sc->sc_abih, "abort");
+
+	/*
+	 * Don't bother registering the parity error interrupt handler.
+	 * Parity error interrupts are asynchronous, and there is nothing
+	 * we can do but acknowledge them... and hope these were detected
+	 * during write cycles and the writes have been retried.
+	 * In any case, they don't seem to be harmful.
+	 */
+#if 0
+	if (brdtyp != BRD_180) {
+		sc->sc_parih.ih_fn = angelfireparerr;
+		sc->sc_parih.ih_arg = 0;
+		sc->sc_parih.ih_wantframe = 1;
+		sc->sc_parih.ih_ipl = IPL_HIGH;
+		platform->intsrc_establish(INTSRC_PARERR, &sc->sc_parih,
+		    "parity");
+	}
+#endif
+
+	config_search(angelfirescan, self, aux);
+}
+
+int
+angelfirescan(struct device *parent, void *child, void *args)
+{
+	struct cfdata *cf = child;
+	struct confargs oca, *ca = args;
+
+	bzero(&oca, sizeof oca);
+	oca.ca_iot = ca->ca_iot;
+	oca.ca_dmat = ca->ca_dmat;
+	oca.ca_offset = cf->cf_loc[0];
+	oca.ca_ipl = cf->cf_loc[1];
+	if (oca.ca_offset != -1)
+		oca.ca_paddr = ca->ca_paddr + oca.ca_offset;
+	else
+		oca.ca_paddr = -1;
+	oca.ca_bustype = BUS_ANGELFIRE;
+	oca.ca_name = cf->cf_driver->cd_name;
+
+	if ((*cf->cf_attach->ca_match)(parent, cf, &oca) == 0)
+		return (0);
+
+	config_attach(parent, cf, &oca, angelfireprint);
+	return (1);
+}
+
+int
+angelfireprint(void *args, const char *bus)
+{
+	struct confargs *ca = args;
+
+	if (ca->ca_offset != -1)
+		printf(" offset 0x%x", ca->ca_offset);
+	if (ca->ca_ipl > 0)
+		printf(" ipl %d", ca->ca_ipl);
+	return (UNCONF);
+}
+
+int
+angelfireabort(void *eframe)
+{
+	*(volatile u_int32_t *)M181_CLRABRT = 0xffffffff;
+	(void)*(volatile u_int32_t *)M181_CLRABRT;
+
+	nmihand(eframe);
+
+	return 1;
+}
+
+int
+angelfireparerr(void *eframe)
+{
+	struct trapframe *frame = (struct trapframe *)eframe;
+	vaddr_t pc;
+
+	*(volatile u_int32_t *)M181_CPEI = 0xffffffff;
+	(void)*(volatile u_int32_t *)M181_CPEI;
+
+	pc = PC_REGS(&frame->tf_regs);
+	if (frame->tf_epsr & PSR_MODE)
+		printf("kernel parity error, PC = %p\n", pc);
+	else
+		printf("%s: parity error, PC = %p\n", curproc->p_comm, pc);
+
+	return 1;
+}
diff --git a/sys/arch/mvme88k/dev/dart.c b/sys/arch/mvme88k/dev/dart.c
index 5b26a2db4d6..bae6e41ca6b 100644
--- a/sys/arch/mvme88k/dev/dart.c
+++ b/sys/arch/mvme88k/dev/dart.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: dart.c,v 1.58 2013/05/17 22:46:27 miod Exp $	*/
+/*	$OpenBSD: dart.c,v 1.59 2013/05/17 22:51:59 miod Exp $	*/
 
 /*
  * Mach Operating System
@@ -40,6 +40,7 @@
 
 #include <dev/cons.h>
 
+#include <machine/mvme181.h>
 #include <machine/mvme188.h>
 #include <mvme88k/dev/dartreg.h>
 
@@ -119,21 +120,33 @@ dartmatch(struct device *parent, void *cf, void *aux)
 	bus_space_handle_t ioh;
 	int rc;
 
-	if (brdtyp != BRD_188)
-		return (0);
-
 	/*
 	 * We do not accept empty locators here...
 	 */
-	if (ca->ca_paddr != DART_BASE)
-		return (0);
+	switch (brdtyp) {
+#ifdef MVME181
+	case BRD_180:
+	case BRD_181:
+		if (ca->ca_paddr != M181_DUART)
+			return 0;
+		break;
+#endif
+#ifdef MVME188
+	case BRD_188:
+		if (ca->ca_paddr != DART_BASE)
+			return 0;
+		break;
+#endif
+	default:
+		return 0;
+	}
 
 	if (bus_space_map(ca->ca_iot, ca->ca_paddr, DART_SIZE, 0, &ioh) != 0)
-		return (0);
+		return 0;
 	rc = badaddr((vaddr_t)bus_space_vaddr(ca->ca_iot, ioh), 4);
 	bus_space_unmap(ca->ca_iot, ca->ca_paddr, DART_SIZE);
 
-	return (rc == 0);
+	return rc == 0;
 }
 
 void
@@ -167,15 +180,20 @@ dartattach(struct device *parent, struct device *self, void *aux)
 	/* Start out with Tx and RX interrupts disabled */
 	/* Enable input port change interrupt */
 	sc->sc_sv_reg.sv_imr  = IIPCHG;
+#ifdef MVME181
+	if (brdtyp == BRD_180 || brdtyp == BRD_181)
+		sc->sc_sv_reg.sv_imr |= ITIMER;
+#endif
 
 	/*
 	 * Although we are still running using the BUG routines,
 	 * this device will be elected as the console after
 	 * autoconf.
-	 * We do not even test since we know we are an MVME188 and
-	 * console is always on the first port.
+	 * We do not even test since we know we are an MVME181 or
+	 * an MVME188 and console is always on the first port.
 	 */
 	printf(": console");
+	delay(10000);
 
 	/* reset port a */
 	dart_write(sc, DART_CRA, RXRESET | TXDIS | RXDIS);
@@ -831,6 +849,7 @@ dartintr(void *arg)
 	struct dartsoftc *sc = arg;
 	unsigned char isr, imr;
 	int port;
+	int rc = -1;
 
 	/* read interrupt status register and mask with imr */
 	isr = dart_read(sc, DART_ISR);
@@ -842,12 +861,25 @@ dartintr(void *arg)
 		 * ready change on a disabled port). This should not happen,
 		 * but we have to claim the interrupt anyway.
 		 */
-#if defined(DIAGNOSTIC) && !defined(MULTIPROCESSOR)
+#ifdef DEBUG
 		printf("dartintr: spurious interrupt, isr %x imr %x\n",
 		    isr, imr);
 #endif
-		return (1);
+		return (-1);
+	}
+
+	rc = 1;
+
+#ifdef MVME181
+	if (imr & ITIMER) {
+		if (isr & ITIMER)
+			rc = -1;
+		isr &= ~ITIMER;
+		if (isr == 0)
+			goto done;	/* will be handled by the second
+					   interrupt handler */
 	}
+#endif
 	isr &= imr;
 
 	if (isr & IIPCHG) {
@@ -856,7 +888,7 @@ dartintr(void *arg)
 		ip = dart_read(sc, DART_IP);
 		ipcr = dart_read(sc, DART_IPCR);
 		dartmodemtrans(sc, ip, ipcr);
-		return (1);
+		goto done;
 	}
 
 	if (isr & (IRXRDYA | ITXRDYA))
@@ -865,7 +897,8 @@ dartintr(void *arg)
 		port = 1;
 	else {
 		printf("dartintr: spurious interrupt, isr 0x%08x\n", isr);
-		return (1);	/* claim it anyway */
+		rc = -1;
+		goto done;
 	}
 
 	if (isr & (IRXRDYA | IRXRDYB)) {
@@ -879,7 +912,8 @@ dartintr(void *arg)
 		dart_write(sc, port ? DART_CRB : DART_CRA, BRKINTRESET);
 	}
 
-	return (1);
+done:
+	return rc;
 }
 
 /*
@@ -893,8 +927,23 @@ dartcnprobe(struct consdev *cp)
 {
 	int maj;
 
-	if (brdtyp != BRD_188 || badaddr(DART_BASE, 4) != 0)
+	switch (brdtyp) {
+#ifdef MVME181
+	case BRD_180:
+	case BRD_181:
+		if (badaddr(M181_DUART, 4) != 0)
+			return;
+		break;
+#endif
+#ifdef MVME188
+	case BRD_188:
+		if (badaddr(DART_BASE, 4) != 0)
+			return;
+		break;
+#endif
+	default:
 		return;
+	}
 
 	/* do not attach as console if dart has been disabled */
 	if (dart_cd.cd_ndevs == 0 || dart_cd.cd_devs[0] == NULL)
diff --git a/sys/arch/mvme88k/dev/mainbus.c b/sys/arch/mvme88k/dev/mainbus.c
index 71cfcc1e01d..2b1e7e850ea 100644
--- a/sys/arch/mvme88k/dev/mainbus.c
+++ b/sys/arch/mvme88k/dev/mainbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: mainbus.c,v 1.27 2011/10/09 17:01:34 miod Exp $ */
+/*	$OpenBSD: mainbus.c,v 1.28 2013/05/17 22:51:59 miod Exp $ */
 /*
  * Copyright (c) 1998 Steve Murphree, Jr.
  * Copyright (c) 2004, Miodrag Vallat.
@@ -44,6 +44,9 @@
 #ifdef M88100
 #include <machine/m8820x.h>
 #endif
+#ifdef MVME181
+#include <machine/mvme181.h>
+#endif
 #ifdef MVME187
 #include <machine/mvme187.h>
 #endif
@@ -301,8 +304,19 @@ mainbus_attach(struct device *parent, struct device *self, void *args)
 	 */
 #ifdef M88100
 	if (CPU_IS88100) {
-		bs_obio_start = BATC8_VA;	/* hardwired BATC */
-		bs_obio_end = 0;
+		switch (brdtyp) {
+#ifdef MVME181
+		case BRD_180:
+		case BRD_181:
+			bs_obio_start = M181_OBIO_START;
+			bs_obio_end = 0;
+			break;
+#endif
+		default:
+			bs_obio_start = BATC8_VA;	/* hardwired BATC */
+			bs_obio_end = 0;
+			break;
+		}
 	}
 #endif
 #ifdef MVME197
diff --git a/sys/arch/mvme88k/include/autoconf.h b/sys/arch/mvme88k/include/autoconf.h
index dfc8e6cabb7..88a84b3b21c 100644
--- a/sys/arch/mvme88k/include/autoconf.h
+++ b/sys/arch/mvme88k/include/autoconf.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: autoconf.h,v 1.18 2011/03/23 16:54:36 pirofti Exp $ */
+/*	$OpenBSD: autoconf.h,v 1.19 2013/05/17 22:51:59 miod Exp $ */
 /*
  * Copyright (c) 1999, Steve Murphree, Jr.
  * Copyright (c) 1996 Nivas Madhur
@@ -50,12 +50,13 @@ struct confargs {
 	const char	*ca_name;	/* device name */
 };
 
-#define BUS_MAIN      0
-#define BUS_PCCTWO    3
-#define BUS_VMES      4
-#define BUS_VMEL      5
-#define BUS_SYSCON    6
-#define BUS_BUSSWITCH 7
+#define BUS_MAIN	0
+#define BUS_ANGELFIRE	1
+#define BUS_SYSCON	2
+#define BUS_PCCTWO	3
+#define BUS_VMES	4
+#define BUS_VMEL	5
+#define BUS_BUSSWITCH	6
 
 /* the following are from the prom/bootblocks */
 extern paddr_t	bootaddr;	/* PA of boot device */
diff --git a/sys/arch/mvme88k/include/intr.h b/sys/arch/mvme88k/include/intr.h
index 0b82ad607ab..6e51e522368 100644
--- a/sys/arch/mvme88k/include/intr.h
+++ b/sys/arch/mvme88k/include/intr.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: intr.h,v 1.22 2013/05/17 22:40:01 miod Exp $	*/
+/*	$OpenBSD: intr.h,v 1.23 2013/05/17 22:51:59 miod Exp $	*/
 /*
  * Copyright (C) 2000 Steve Murphree, Jr.
  * All rights reserved.
@@ -78,8 +78,8 @@
 #define IPL_SOFTINT	1
 #define IPL_BIO		2
 #define IPL_NET		3
-#define IPL_TTY		3
-#define IPL_VM		3
+#define IPL_TTY		5
+#define IPL_VM		5
 #define IPL_CLOCK	5
 #define IPL_STATCLOCK	5
 #define	IPL_SCHED	5
diff --git a/sys/arch/mvme88k/include/mvme181.h b/sys/arch/mvme88k/include/mvme181.h
new file mode 100644
index 00000000000..ec980abc4af
--- /dev/null
+++ b/sys/arch/mvme88k/include/mvme181.h
@@ -0,0 +1,59 @@
+/*	$OpenBSD: mvme181.h,v 1.1 2013/05/17 22:51:59 miod Exp $	*/
+
+/*
+ * Copyright (c) 2013 Miodrag Vallat.
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _MACHINE_MVME181_H_
+#define _MACHINE_MVME181_H_
+
+#define	M181_OBIO_START	0xffe00000
+
+#define	M181_CMMU_I	0xfff7e000	/* Instruction CMMU address */
+#define	M181_CMMU_D	0xfff7f000	/* Data CMMU address */
+
+#define	M181_SSR	0xffe10000	/* system status register */
+#define	M181_SCR	0xffe20000	/* system control register */
+#define	M181_CPEI	0xffe30000	/* clear parity error interrupt */
+#define	M181_VMEVEC	0xffe80000	/* VME vector register */
+#define	M181_CLRABRT	0xffee0000	/* clear abort interrupt */
+
+#define	M181_DUART	0xffe40000	/* base address of DUART chip */
+#define	M181_DSRTC	0xff800000	/* base address of TODclock */
+
+/*
+ * Control and Status Register interrupt bits - 180 only has the lower 8 bits
+ */
+
+#define	M181_IRQ_VME4_180	0x0010
+#define	M181_IRQ_PARITY		0x0020	/* 181 only */
+#define	M181_IRQ_DUART		0x0040
+#define	M181_IRQ_ABORT		0x0080
+#define	M181_IRQ_VME1		0x0200
+#define	M181_IRQ_VME2		0x0400
+#define	M181_IRQ_VME3		0x0800
+#define	M181_IRQ_VME4		0x1000
+#define	M181_IRQ_VME5		0x2000
+#define	M181_IRQ_VME6		0x4000
+#define	M181_IRQ_VME7		0x8000
+
+/*
+ * System Status register bits (not interrupt bits)
+ */
+
+#define	M181_SYSCON		0x0004	/* S3-1 switch closed */
+#define	M181_BOARDMODE		0x0100	/* S3-6 switch closed */
+
+#endif	/* _MACHINE_MVME181_H_ */
diff --git a/sys/arch/mvme88k/include/param.h b/sys/arch/mvme88k/include/param.h
index 7cda9b12992..fb7be221ec9 100644
--- a/sys/arch/mvme88k/include/param.h
+++ b/sys/arch/mvme88k/include/param.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: param.h,v 1.41 2013/03/23 16:12:25 deraadt Exp $ */
+/*	$OpenBSD: param.h,v 1.42 2013/05/17 22:51:59 miod Exp $ */
 
 /*
  * Copyright (c) 1999 Steve Murphree, Jr.
@@ -58,6 +58,8 @@ extern int brdtyp;
 /*
  * Values for the brdtyp variable.
  */
+#define BRD_180		0x180
+#define BRD_181		0x181
 #define BRD_187		0x187
 #define BRD_188		0x188
 #define BRD_197		0x197
diff --git a/sys/arch/mvme88k/mvme88k/eh.S b/sys/arch/mvme88k/mvme88k/eh.S
index a18e671d295..a67f651b1c6 100644
--- a/sys/arch/mvme88k/mvme88k/eh.S
+++ b/sys/arch/mvme88k/mvme88k/eh.S
@@ -1,4 +1,4 @@
-/*	$OpenBSD: eh.S,v 1.69 2013/05/17 22:46:28 miod Exp $	*/
+/*	$OpenBSD: eh.S,v 1.70 2013/05/17 22:51:59 miod Exp $	*/
 /*
  * Copyright (c) 2006, Miodrag Vallat
  *
@@ -39,7 +39,7 @@
 
 #include <m88k/m88k/eh_common.S>
 
-#ifdef MVME187
+#if defined(MVME181) || defined(MVME187)
 /*
  * Single-processor with 2 CMMU version (MVME181, MVME187, MVME8120)
  */
diff --git a/sys/arch/mvme88k/mvme88k/m181_machdep.c b/sys/arch/mvme88k/mvme88k/m181_machdep.c
new file mode 100644
index 00000000000..507d1907ead
--- /dev/null
+++ b/sys/arch/mvme88k/mvme88k/m181_machdep.c
@@ -0,0 +1,709 @@
+/*	$OpenBSD: m181_machdep.c,v 1.1 2013/05/17 22:51:59 miod Exp $	*/
+
+/*
+ * Copyright (c) 2013 Miodrag Vallat.
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * MVME181 support routines
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/timetc.h>
+
+#include <uvm/uvm_extern.h>
+
+#include <machine/asm_macro.h>
+#include <machine/board.h>
+#include <machine/mmu.h>
+#include <machine/cmmu.h>
+#include <machine/cpu.h>
+#include <machine/pmap_table.h>
+#include <machine/trap.h>
+
+#include <machine/m88100.h>
+#include <machine/m8820x.h>
+#include <machine/mvme181.h>
+
+#include <mvme88k/mvme88k/clockvar.h>
+
+const struct pmap_table m181_pmap_table[] = {
+	{ M181_SSR,		PAGE_SIZE,	UVM_PROT_RW, CACHE_INH },
+	{ M181_SCR,		PAGE_SIZE,	UVM_PROT_RW, CACHE_INH },
+	{ M181_CPEI,		PAGE_SIZE,	UVM_PROT_RW, CACHE_INH },
+	{ M181_DUART,		PAGE_SIZE,	UVM_PROT_RW, CACHE_INH },
+	{ M181_VMEVEC,		PAGE_SIZE,	UVM_PROT_RW, CACHE_INH },
+	{ M181_CLRABRT,		PAGE_SIZE,	UVM_PROT_RW, CACHE_INH },
+	{ 0, 0xffffffff, 0, 0 },
+};
+
+const struct board board_mvme181 = {
+	.bootstrap = m181_bootstrap,
+	.memsize = m181_memsize,
+	.cpuspeed = m181_cpuspeed,
+	.reboot = m181_reboot,
+	.is_syscon = m181_is_syscon,
+	.intr = m181_intr,
+	.nmi = NULL,
+	.nmi_wrapup = NULL,
+	.getipl = m181_getipl,
+	.setipl = m181_setipl,
+	.raiseipl = m181_raiseipl,
+	.intsrc_available = m181_intsrc_available,
+	.intsrc_enable = m181_intsrc_enable,
+	.intsrc_disable = m181_intsrc_disable,
+	.intsrc_establish = m181_intsrc_establish,
+	.intsrc_disestablish = m181_intsrc_disestablish,
+	.init_clocks = m181_init_clocks,
+	.delay = dumb_delay,
+	.init_vme = m181_init_vme,
+#ifdef MULTIPROCESSOR
+	.send_ipi = NULL,
+	.smp_setup = m88100_smp_setup,
+#endif
+	.ptable = m181_pmap_table,
+	.cmmu = &cmmu8820x
+};
+
+u_int	m181_safe_level(u_int, u_int);
+
+u_int	m181_curspl = IPL_HIGH;
+
+/*
+ * The AngelFire interrupt controller has up to 16 interrupt sources.
+ * We fold this model in the 8-level spl model this port uses, enforcing
+ * priorities manually with the interrupt masks.
+ */
+
+intrhand_t angelfire_intr_handlers[INTSRC_VME];
+
+u_int32_t m181_int_mask, m181_int_sticky;
+
+/*
+ * Early initialization.
+ */
+void
+m181_bootstrap()
+{
+	int i;
+
+	/*
+	 * Initialize interrupt controller masks.
+	 */
+
+	m181_int_mask = M181_IRQ_DUART | M181_IRQ_ABORT;
+	if (brdtyp == BRD_180)
+		m181_int_mask |= M181_IRQ_VME4_180;
+	else
+		m181_int_mask |= M181_IRQ_PARITY | M181_IRQ_VME1 |
+		    M181_IRQ_VME2 | M181_IRQ_VME3 | M181_IRQ_VME4 |
+		    M181_IRQ_VME5 | M181_IRQ_VME6 | M181_IRQ_VME7;
+
+	m181_int_sticky = *(volatile uint32_t *)M181_SSR &
+	    (M181_SYSCON | M181_BOARDMODE);
+
+	*(u_int32_t *)M181_SCR = m181_int_sticky;
+
+	for (i = 0; i < INTSRC_VME; i++)
+		SLIST_INIT(&angelfire_intr_handlers[i]);
+}
+
+/*
+ * Figure out how much memory is available.
+ * We currently don't attempt to support external VME memory.
+ */
+vaddr_t
+m181_memsize()
+{
+	return 8 * 1024 * 1024;
+}
+
+/*
+ * Return the processor speed in MHz.
+ */
+int
+m181_cpuspeed(const struct mvmeprom_brdid *brdid)
+{
+	/* XXX need to tell 20 and 25MHz systems apart */
+	return 20;
+}
+
+/*
+ * Reboot the system.
+ */
+void
+m181_reboot(int howto)
+{
+	printf("Reboot not available on MVME181. "
+	    "Please manually reset the board.\n");
+}
+
+/*
+ * Return whether we are the VME bus system controller.
+ */
+int
+m181_is_syscon()
+{
+	return ISSET(*(volatile uint32_t *)M181_SSR, M181_SYSCON);
+}
+
+/*
+ * Return the next ipl >= ``curlevel'' at which we can reenable interrupts
+ * while keeping ``mask'' masked.
+ */
+u_int
+m181_safe_level(u_int mask, u_int curlevel)
+{
+	int i;
+
+	for (i = curlevel; i < NIPLS; i++)
+		if ((int_mask_val[i] & mask) == 0)
+			return i;
+
+	return NIPLS - 1;
+}
+
+/*
+ * Provide the interrupt source for a given interrupt status bit.
+ */
+const u_int m181_vec[16] = {
+	0,
+	0,
+	0,
+	0,
+	INTSRC_VME,		/* MVME180 VME4 */
+	INTSRC_PARERR,
+	INTSRC_DUART,
+	INTSRC_ABORT,
+	0,
+	INTSRC_VME,		/* VME1 */
+	INTSRC_VME,		/* VME2 */
+	INTSRC_VME,		/* VME3 */
+	INTSRC_VME,		/* VME4 */
+	INTSRC_VME,		/* VME5 */
+	INTSRC_VME,		/* VME6 */
+	INTSRC_VME		/* VME7 */
+};
+
+/*
+ * Device interrupt handler for MVME181
+ */
+void
+m181_intr(struct trapframe *eframe)
+{
+	u_int32_t cur_mask, ign_mask;
+	u_int level, vmelevel, old_spl;
+	struct intrhand *intr;
+	intrhand_t *list;
+	int ret, intbit;
+	vaddr_t ivec;
+	u_int intsrc, vec;
+	int unmasked = 0;
+	int warn;
+#ifdef DIAGNOSTIC
+	static int problems = 0;
+#endif
+
+	cur_mask = *(volatile u_int32_t *)M181_SSR & m181_int_mask;
+	ign_mask = 0;
+	old_spl = eframe->tf_mask;
+
+	if (cur_mask == 0) {
+		/*
+		 * Spurious interrupts - may be caused by debug output clearing
+		 * DUART interrupts.
+		 */
+		flush_pipeline();
+		goto out;
+	}
+
+#ifdef MULTIPROCESSOR
+	if (old_spl < IPL_SCHED)
+		__mp_lock(&kernel_lock);
+#endif
+
+	uvmexp.intrs++;
+
+	for (;;) {
+		level = m181_safe_level(cur_mask, old_spl);
+		m181_setipl(level);
+
+		if (unmasked == 0) {
+			set_psr(get_psr() & ~PSR_IND);
+			unmasked = 1;
+		}
+
+		/* find the first bit set in the current mask */
+		warn = 0;
+		intbit = ff1(cur_mask);
+		intsrc = m181_vec[intbit];
+
+		if (intsrc == 0)
+			panic("%s: unexpected interrupt source (bit %d), "
+			    "level %d, mask 0x%04x",
+			    __func__, intbit, level, cur_mask);
+
+		if (intsrc == INTSRC_VME) {
+			if (intbit < 8)
+				vmelevel = 4;	/* MVME180, level 4 */
+			else
+				vmelevel = intbit & 7;
+			ivec = M181_VMEVEC + (vmelevel << 1);
+			vec = *(volatile uint16_t *)ivec;
+			if (vec & 0xff00) {
+				/*
+				 * Vector number is wrong.  This is likely
+				 * a bus error or timeout reading the VME
+				 * interrupt vector.  In either case, we
+				 * can't service the interrupt correctly.
+				 *
+				 * As a cheap bandaid, if only one VME
+				 * interrupt is registered with this IPL,
+				 * we can reasonably safely assume that
+				 * this is our vector. (this probably loses
+				 * bigtime on the 180)
+				 */
+				vec = vmevec_hints[vmelevel];
+				if (vec == (u_int)-1) {
+					printf("%s: invalid VME "
+					    "interrupt vector %04x, "
+					    "level %d, mask %04x\n",
+					    __func__, ivec, vmelevel, cur_mask);
+					ign_mask |= 1 << intbit;
+					continue;
+				}
+			}
+			list = &intr_handlers[vec];
+		} else {
+			list = &angelfire_intr_handlers[intsrc];
+		}
+
+		if (SLIST_EMPTY(list)) {
+			warn = 1;
+		} else {
+			/*
+			 * Walk through all interrupt handlers in the chain
+			 * for the given vector, calling each handler in
+			 * turn, until some handler returns a nonzero value.
+			 */
+			ret = 0;
+			SLIST_FOREACH(intr, list, ih_link) {
+				if (intr->ih_wantframe != 0)
+					ret = (*intr->ih_fn)((void *)eframe);
+				else
+					ret = (*intr->ih_fn)(intr->ih_arg);
+				if (ret > 0) {
+					intr->ih_count.ec_count++;
+					break;
+				}
+			}
+			if (ret == 0)
+				warn = 2;
+		}
+
+		if (warn != 0) {
+			ign_mask |= 1 << intbit;
+
+			if (intsrc == INTSRC_VME)
+				printf("%s: %s VME interrupt, "
+				    "level %d, vec 0x%x, mask %04x\n",
+				    __func__,
+				    warn == 1 ? "spurious" : "unclaimed",
+				    level, vec, cur_mask);
+			else
+				printf("%s: %s interrupt, "
+				    "level %d, bit %d, mask %04x\n",
+				    __func__,
+				    warn == 1 ? "spurious" : "unclaimed",
+				    level, intbit, cur_mask);
+		}
+
+		/*
+		 * Read updated pending interrupt mask
+		 */
+		cur_mask = *(volatile u_int32_t *)M181_SSR & m181_int_mask;
+		if ((cur_mask & ~ign_mask) == 0)
+			break;
+	}
+
+#ifdef DIAGNOSTIC
+	if (ign_mask != 0) {
+		if (++problems >= 10)
+			panic("%s: broken interrupt behaviour", __func__);
+	} else
+		problems = 0;
+#endif
+
+#ifdef MULTIPROCESSOR
+	if (old_spl < IPL_SCHED)
+		__mp_unlock(&kernel_lock);
+#endif
+
+out:
+	/*
+	 * process any remaining data access exceptions before
+	 * returning to assembler
+	 */
+	if (eframe->tf_dmt0 & DMT_VALID)
+		m88100_trap(T_DATAFLT, eframe);
+
+	/*
+	 * Disable interrupts before returning to assembler, the spl will
+	 * be restored later.
+	 */
+	set_psr(get_psr() | PSR_IND);
+}
+
+u_int
+m181_getipl(void)
+{
+	return m181_curspl;
+}
+
+u_int
+m181_setipl(u_int level)
+{
+	u_int curspl, psr;
+
+	psr = get_psr();
+	set_psr(psr | PSR_IND);
+
+	curspl = m181_curspl;
+
+	m181_curspl = level;
+	*(u_int32_t *)M181_SCR = int_mask_val[level] | m181_int_sticky;
+
+	set_psr(psr);
+	return curspl;
+}
+
+u_int
+m181_raiseipl(u_int level)
+{
+	u_int curspl, psr;
+
+	psr = get_psr();
+	set_psr(psr | PSR_IND);
+
+	curspl = m181_curspl;
+	if (curspl < level) {
+		m181_curspl = level;
+		*(u_int32_t *)M181_SCR = int_mask_val[level] | m181_int_sticky;
+	}
+
+	set_psr(psr);
+	return curspl;
+}
+
+/* Interrupt masks per logical interrupt source */
+const u_int32_t m181_intsrc[] = {
+	0,
+	M181_IRQ_ABORT,
+	0,
+	0,
+	M181_IRQ_PARITY,
+	0,
+	0,
+	M181_IRQ_DUART,
+
+	M181_IRQ_VME1,
+	M181_IRQ_VME2,
+	M181_IRQ_VME3,
+	M181_IRQ_VME4,
+	M181_IRQ_VME5,
+	M181_IRQ_VME6,
+	M181_IRQ_VME7
+};
+
+int
+m181_intsrc_available(u_int intsrc, int ipl)
+{
+	if (intsrc == INTSRC_VME) {
+#if 0 /* unwise */
+		/*
+		 * The original AngelFire board apparently only allows
+		 * VME interrupts at level 4.
+		 */
+		if (brdtyp == BRD_180 && ipl != 4)
+			return EINVAL;
+#endif
+		return 0;
+	}
+
+	if (m181_intsrc[intsrc] == 0)
+		return ENXIO;
+
+	return 0;
+}
+
+void
+m181_intsrc_enable(u_int intsrc, int ipl)
+{
+	u_int32_t psr;
+	u_int32_t intmask;
+	int i;
+
+	if (intsrc == INTSRC_VME) {
+		/*
+		 * The original AngelFire board apparently only allows
+		 * VME interrupts at level 4.
+		 */
+		if (brdtyp == BRD_180)
+			intmask = M181_IRQ_VME4_180;
+		else
+			intmask = m181_intsrc[INTSRC_VME + (ipl - 1)];
+	} else
+		intmask = m181_intsrc[intsrc];
+
+	psr = get_psr();
+	set_psr(psr | PSR_IND);
+
+	for (i = IPL_NONE; i < ipl; i++)
+		int_mask_val[i] |= intmask;
+
+	setipl(getipl());
+	set_psr(psr);
+}
+
+void
+m181_intsrc_disable(u_int intsrc, int ipl)
+{
+	u_int32_t psr;
+	u_int32_t intmask;
+	int i;
+
+	if (intsrc == INTSRC_VME) {
+		/*
+		 * The original AngelFire board apparently only allows
+		 * VME interrupts at level 4.
+		 */
+		if (brdtyp == BRD_180)
+			intmask = M181_IRQ_VME4_180;
+		else
+			intmask = m181_intsrc[INTSRC_VME + (ipl - 1)];
+	} else
+		intmask = m181_intsrc[intsrc];
+
+	psr = get_psr();
+	set_psr(psr | PSR_IND);
+
+	for (i = 0; i < NIPLS; i++)
+		int_mask_val[i] &= ~intmask;
+
+	setipl(getipl());
+	set_psr(psr);
+}
+
+int
+m181_intsrc_establish(u_int intsrc, struct intrhand *ih, const char *name)
+{
+	intrhand_t *list;
+
+#ifdef DIAGNOSTIC
+	if (intsrc == INTSRC_VME)
+		return EINVAL;
+#endif
+
+	/*
+	 * Unlike MVME188, timer interrupts from the duart chip are not
+	 * received on a separate input.
+	 */
+	if (intsrc == INTSRC_DTIMER)
+		intsrc = INTSRC_DUART;
+
+	list = &angelfire_intr_handlers[intsrc];
+	if (!SLIST_EMPTY(list) && intsrc != INTSRC_DUART) {
+#ifdef DIAGNOSTIC
+		printf("%s: interrupt source %u already registered\n",
+		    __func__, intsrc);
+#endif
+		return EINVAL;
+	}
+
+	if (m181_intsrc_available(intsrc, ih->ih_ipl) != 0)
+		return EINVAL;
+
+	evcount_attach(&ih->ih_count, name, &ih->ih_ipl);
+	SLIST_INSERT_HEAD(list, ih, ih_link);
+	m181_intsrc_enable(intsrc, ih->ih_ipl);
+
+	return 0;
+}
+
+void
+m181_intsrc_disestablish(u_int intsrc, struct intrhand *ih)
+{
+	intrhand_t *list;
+
+#ifdef DIAGNOSTIC
+	if (intsrc == INTSRC_VME)
+		return;
+#endif
+
+	/*
+	 * Unlike MVME188, timer interrupts from the duart chip are not
+	 * received on a separate input.
+	 */
+	if (intsrc == INTSRC_DTIMER)
+		intsrc = INTSRC_DUART;
+
+	list = &angelfire_intr_handlers[intsrc];
+	evcount_detach(&ih->ih_count);
+	SLIST_REMOVE(list, ih, intrhand, ih_link);
+
+	if (SLIST_EMPTY(list))
+		m181_intsrc_disable(intsrc, ih->ih_ipl);
+}
+
+/*
+ * Clock routines
+ */
+
+u_int	m181_get_tc(struct timecounter *);
+int	m181_clockintr(void *);
+int	m181_clkint;
+
+struct timecounter m181_timecounter = {
+	.tc_get_timecount = m181_get_tc,
+	.tc_counter_mask = 0xffffffff,
+	.tc_frequency = 100,
+	.tc_name = "duart",
+	.tc_quality = 0
+};
+
+u_int
+m181_get_tc(struct timecounter *tc)
+{
+	/* XXX lazy */
+	return (u_int)clock_ih.ih_count.ec_count;
+}
+
+/*
+ * Notes on the MVME181 clock usage:
+ *
+ * We have only one timer source, the two counter/timers in the DUART
+ * (MC68681/MC68692), which share the DUART serial interrupt.
+ *
+ * Note that the DUART timers keep counting down from 0xffff even after
+ * interrupting, and need to be manually stopped, then restarted, to
+ * resume counting down the initial count value.
+ *
+ * Also, the 3.6864MHz clock source of the DUART timers does not seem to
+ * be precise.
+ */
+
+#define	DART_ISR		0xffe40017	/* interrupt status */
+#define	DART_STARTC		0xffe4003b	/* start counter cmd */
+#define	DART_STOPC		0xffe4003f	/* stop counter cmd */
+#define	DART_ACR		0xffe40013	/* auxiliary control */
+#define	DART_CTUR		0xffe4001b	/* counter/timer MSB */
+#define	DART_CTLR		0xffe4001f	/* counter/timer LSB */
+#define	DART_OPCR		0xffe40037	/* output port config*/
+
+void
+m181_init_clocks(void)
+{
+	volatile u_int8_t imr;
+	u_int32_t psr;
+
+	psr = get_psr();
+	set_psr(psr | PSR_IND);
+
+#ifdef DIAGNOSTIC
+	if (1000000 % hz) {
+		printf("cannot get %d Hz clock; using 100 Hz\n", hz);
+		hz = 100;
+	}
+#endif
+	tick = 1000000 / hz;
+
+	stathz = profhz = 0;
+
+	/*
+	 * The DUART runs at 3.6864 MHz, CT#1 will run in PCLK/16 mode.
+	 */
+	m181_clkint = (3686400 / 16) / hz;
+
+	/* clear the counter/timer output OP3 while we program the DART */
+	*(volatile u_int8_t *)DART_OPCR = 0x00;
+	/* do the stop counter/timer command */
+	imr = *(volatile u_int8_t *)DART_STOPC;
+	/* set counter/timer to counter mode, PCLK/16 */
+	*(volatile u_int8_t *)DART_ACR = 0x30;
+	*(volatile u_int8_t *)DART_CTUR = (m181_clkint >> 8);
+	*(volatile u_int8_t *)DART_CTLR = (m181_clkint & 0xff);
+	/* set the counter/timer output OP3 */
+	*(volatile u_int8_t *)DART_OPCR = 0x04;
+	/* give the start counter/timer command */
+	imr = *(volatile u_int8_t *)DART_STARTC;
+
+	clock_ih.ih_fn = m181_clockintr;
+	clock_ih.ih_arg = 0;
+	clock_ih.ih_wantframe = 1;
+	clock_ih.ih_ipl = IPL_CLOCK;
+	m181_intsrc_establish(INTSRC_DTIMER, &clock_ih, "clock");
+
+	tc_init(&m181_timecounter);
+}
+
+int
+m181_clockintr(void *eframe)
+{
+	u_int8_t isr;
+	u_int newint, ctr, extra;
+	int ticks;
+
+	isr = *(volatile u_int8_t *)DART_ISR;
+	if ((isr & 0x08) == 0)	/* ITIMER */
+		return 0;
+
+	/* stop counter */
+	(void)*(volatile u_int8_t *)DART_STOPC;
+
+	ctr = *(volatile u_int8_t *)DART_CTUR;
+	ctr <<= 8;
+	ctr |= *(volatile u_int8_t *)DART_CTLR;
+	extra = 0x10000 - ctr;
+
+	ticks = 1;
+	while (extra > m181_clkint) {
+		ticks++;
+		extra -= m181_clkint;
+	}
+
+	newint = m181_clkint - extra;
+
+	/* setup new value and restart counter */
+	*(volatile u_int8_t *)DART_CTUR = (newint >> 8);
+	*(volatile u_int8_t *)DART_CTLR = (newint & 0xff);
+	(void)*(volatile u_int8_t *)DART_STARTC;
+
+	while (ticks-- != 0)
+		hardclock(eframe);
+
+	return 1;
+}
+
+/*
+ * Setup VME bus access and return the lower interrupt number usable by VME
+ * boards.
+ */
+u_int
+m181_init_vme(const char *devname)
+{
+	return 0;	/* all vectors available */
+}
diff --git a/sys/arch/mvme88k/mvme88k/m8820x.c b/sys/arch/mvme88k/mvme88k/m8820x.c
index 54db64208b3..3a3fdfdf6f3 100644
--- a/sys/arch/mvme88k/mvme88k/m8820x.c
+++ b/sys/arch/mvme88k/mvme88k/m8820x.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: m8820x.c,v 1.52 2013/05/17 22:46:28 miod Exp $	*/
+/*	$OpenBSD: m8820x.c,v 1.53 2013/05/17 22:51:59 miod Exp $	*/
 /*
  * Copyright (c) 2004, Miodrag Vallat.
  *
@@ -34,6 +34,9 @@
 
 #include <machine/cmmu.h>
 #include <machine/m8820x.h>
+#ifdef MVME181
+#include <machine/mvme181.h>
+#endif
 #ifdef MVME187
 #include <machine/mvme187.h>
 #endif
@@ -93,6 +96,21 @@ m8820x_setup_board_config()
 #endif
 
 	switch (brdtyp) {
+#ifdef MVME181
+	case BRD_180:
+	case BRD_181:
+#ifdef MVME188
+		/* There is no WHOAMI reg on MVME181 - fake it... */
+		vme188_config = 0x0a;
+#endif
+		m8820x_cmmu[0].cmmu_regs = (void *)M181_CMMU_I;
+		m8820x_cmmu[1].cmmu_regs = (void *)M181_CMMU_D;
+		ncpusfound = 1;
+		max_cmmus = 2;
+		cmmu_shift = 1;
+		m8820x_pfsr = pfsr_save_single;
+		break;
+#endif	/* MVME181 */
 #ifdef MVME187
 	case BRD_187:
 	case BRD_8120:
@@ -130,7 +148,7 @@ m8820x_setup_board_config()
 
 #ifdef MVME188
 	if (bd_config[vme188_config].ncpus != 0) {
-		/* 187 has a fixed configuration, no need to print it */
+		/* 181 and 187 have a fixed configuration, don't print it */
 		if (brdtyp == BRD_188) {
 			printf("MVME188 board configuration #%X "
 			    "(%d CPUs %d CMMUs)\n",
@@ -261,7 +279,7 @@ m8820x_setup_board_config()
 
 /*
  * Find out the CPU number from accessing CMMU.
- * On MVME187, there is only one CPU, so this is trivial.
+ * On MVME181 and MVME187, there is only one CPU, so this is trivial.
  * On MVME188, we access the WHOAMI register, which is in data space;
  * its value will let us know which data CMMU has been used to perform
  * the read, and we can reliably compute the CPU number from it.
@@ -274,7 +292,7 @@ m8820x_cpu_number()
 	cpuid_t cpu;
 #endif
 
-#ifdef MVME187
+#if defined(MVME181) || defined(MVME187)
 #ifdef MVME188
 	if (brdtyp != BRD_188)
 #endif
diff --git a/sys/arch/mvme88k/mvme88k/machdep.c b/sys/arch/mvme88k/mvme88k/machdep.c
index 1882c9cf572..a1f1f092b60 100644
--- a/sys/arch/mvme88k/mvme88k/machdep.c
+++ b/sys/arch/mvme88k/mvme88k/machdep.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: machdep.c,v 1.252 2013/05/17 22:46:28 miod Exp $	*/
+/* $OpenBSD: machdep.c,v 1.253 2013/05/17 22:51:59 miod Exp $	*/
 /*
  * Copyright (c) 1998, 1999, 2000, 2001 Steve Murphree, Jr.
  * Copyright (c) 1996 Nivas Madhur
@@ -839,6 +839,12 @@ mvme_bootstrap()
 	 * Set up interrupt and fp exception handlers based on the machine.
 	 */
 	switch (brdtyp) {
+#ifdef MVME181
+	case BRD_180:
+	case BRD_181:
+		platform = &board_mvme181;
+		break;
+#endif
 #ifdef MVME187
 	case BRD_187:
 	case BRD_8120: