PCI bus code for monolithic PowerPC kernels.

5 files changed, 808 insertions, 0 deletions

diff --git a/sys/arch/powerpc/pci/mpc106reg.h b/sys/arch/powerpc/pci/mpc106reg.h
new file mode 100644
index 00000000000..dd0180a4e66
--- /dev/null
+++ b/sys/arch/powerpc/pci/mpc106reg.h
@@ -0,0 +1,141 @@
+/*	$OpenBSD: mpc106reg.h,v 1.1 1997/10/11 11:29:29 pefo Exp $ */
+
+/*
+ * Copyright (c) 1997 Per Fogelstrom
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed under OpenBSD for RTMX Inc
+ *	by Per Fogelstrom, Opsycon AB.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *
+ * mpc106reg.h: PowerPC to PCI bridge controller
+ *              This code will probably work with the 105 as well.
+ */
+
+#ifndef _MACHINE_MPC106REG_H_
+#define _MACHINE_MPC106REG_H_
+
+/* Where we map the config space */
+#define MPC106_PCI_CONF_SPACE	0x80800000
+
+/* Where we map the PCI memory space */
+#define MPC106_V_PCI_MEM_SPACE	0xc0000000	/* Viritual */
+#define MPC106_P_PCI_MEM_SPACE	0xc0000000	/* Physical */
+
+/* Where we map the PCI I/O space */
+#define MPC106_PCI_IO_SPACE	0x81000000
+
+/* offsets from base pointer */
+#define MPC106_CONF_BASE	0x80000cf8
+#define MPC106_CONF_DATA	0x80000cfc
+#define	MPC106_REGOFFS(x)	((x << 24) | 0x80)
+
+/* Where PCI devices sees CPU memory. */
+#define	MPC106_PCI_CPUMEM	0x80000000
+
+#define	SWAP32(x)	\
+			(((x) << 24) | ((x) >> 24) | \
+			(((x) >> 8) & 0xff00) | (((x) & 0xff00) << 8))
+
+static __inline void
+mpc_cfg_write_1(reg, val)
+	u_int32_t reg;
+	u_int8_t val;
+{
+	out32(MPC106_CONF_BASE, MPC106_REGOFFS(reg));
+	outb(MPC106_CONF_DATA + (reg & 3), val);
+}
+
+static __inline void
+mpc_cfg_write_2(reg, val)
+	u_int32_t reg;
+	u_int16_t val;
+{
+        u_int32_t _p_ = MPC106_CONF_DATA + (reg & 2);
+
+	out32(MPC106_CONF_BASE, MPC106_REGOFFS(reg));
+	__asm__ volatile("sthbrx %0, 0, %1\n" :: "r"(val), "r"(_p_));
+	__asm__ volatile("sync"); __asm__ volatile("eieio");
+}
+
+static __inline void
+mpc_cfg_write_4(reg, val)
+	u_int32_t reg;
+	u_int32_t val;
+{
+        u_int32_t _p_ = MPC106_CONF_DATA;
+
+	out32(MPC106_CONF_BASE, MPC106_REGOFFS(reg));
+	__asm__ volatile("stwbrx %0, 0, %1\n" :: "r"(val), "r"(_p_));
+	__asm__ volatile("sync"); __asm__ volatile("eieio");
+}
+
+static __inline u_int8_t
+mpc_cfg_read_1(reg)
+	u_int32_t reg;
+{
+	u_int8_t _v_;
+
+	out32(MPC106_CONF_BASE, MPC106_REGOFFS(reg));
+	_v_ = inb(MPC106_CONF_DATA);
+	return(_v_);
+}
+
+static __inline u_int16_t
+mpc_cfg_read_2(reg)
+	u_int32_t reg;
+{
+	u_int16_t _v_;
+        u_int32_t _p_ = MPC106_CONF_DATA + (reg & 2);
+
+	out32(MPC106_CONF_BASE, MPC106_REGOFFS(reg));
+	__asm__ volatile("lhbrx %0, 0, %1\n" : "=r"(_v_) : "r"(_p_));
+	__asm__ volatile("sync"); __asm__ volatile("eieio");
+	return(_v_);
+}
+
+static __inline u_int32_t
+mpc_cfg_read_4(reg)
+	u_int32_t reg;
+{
+	u_int32_t _v_;
+        u_int32_t _p_ = MPC106_CONF_DATA;
+
+	out32(MPC106_CONF_BASE, MPC106_REGOFFS(reg));
+	__asm__ volatile("lwbrx %0, 0, %1\n" : "=r"(_v_) : "r"(_p_));
+	__asm__ volatile("sync"); __asm__ volatile("eieio");
+	return(_v_);
+}
+
+#define MPC106_PCI_VENDOR		0x00
+#define MPC106_PCI_DEVICE		0x02
+#define MPC106_PCI_CMD			0x04
+#define MPC106_PCI_STAT			0x06
+#define MPC106_PCI_REVID		0x08
+
+#define	MPC106_PCI_PMGMT		0x70
+
+#endif /* _MACHINE_MPC106REG_H_ */
diff --git a/sys/arch/powerpc/pci/mpcpcibus.c b/sys/arch/powerpc/pci/mpcpcibus.c
new file mode 100644
index 00000000000..0befc25c5a4
--- /dev/null
+++ b/sys/arch/powerpc/pci/mpcpcibus.c
@@ -0,0 +1,383 @@
+/*	$OpenBSD: mpcpcibus.c,v 1.1 1997/10/11 11:29:30 pefo Exp $ */
+
+/*
+ * Copyright (c) 1997 Per Fogelstrom
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed under OpenBSD for RTMX Inc
+ *      by Per Fogelstrom, Opsycon AB.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+/*
+ * MPC106  PCI BUS Bridge driver.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/malloc.h>
+#include <sys/device.h>
+#include <sys/proc.h>
+#include <vm/vm.h>
+
+#include <machine/autoconf.h>
+
+#include <dev/isa/isareg.h>
+#include <dev/isa/isavar.h>
+
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcivar.h>
+
+#include <powerpc/pci/pcibrvar.h>
+#include <powerpc/pci/mpc106reg.h>
+
+extern vm_map_t phys_map;
+
+int	 mpcpcibrmatch __P((struct device *, void *, void *));
+void	 mpcpcibrattach __P((struct device *, struct device *, void *));
+
+void	 mpc_attach_hook __P((struct device *, struct device *,
+				struct pcibus_attach_args *));
+int	 mpc_bus_maxdevs __P((void *, int));
+pcitag_t mpc_make_tag __P((void *, int, int, int));
+void	 mpc_decompose_tag __P((void *, pcitag_t, int *, int *, int *));
+pcireg_t mpc_conf_read __P((void *, pcitag_t, int));
+void	 mpc_conf_write __P((void *, pcitag_t, int, pcireg_t));
+
+int      mpc_intr_map __P((void *, pcitag_t, int, int, pci_intr_handle_t *));
+const char *mpc_intr_string __P((void *, pci_intr_handle_t));
+void     *mpc_intr_establish __P((void *, pci_intr_handle_t,
+            int, int (*func)(void *), void *, char *));
+void     mpc_intr_disestablish __P((void *, void *));
+int      mpc_ether_hw_addr __P((u_int8_t *));
+
+struct cfattach mpcpcibr_ca = {
+        sizeof(struct pcibr_softc), mpcpcibrmatch, mpcpcibrattach,
+};
+
+struct cfdriver mpcpcibr_cd = {
+	NULL, "mpcpcibr", DV_DULL,
+};
+
+static int      mpcpcibrprint __P((void *, const char *pnp));
+
+struct pcibr_config mpc_config;
+
+int
+mpcpcibrmatch(parent, match, aux)
+	struct device *parent;
+	void *match, *aux;
+{
+	struct confargs *ca = aux;
+
+	if (strcmp(ca->ca_name, mpcpcibr_cd.cd_name) != 0)
+		return (0);
+
+	return (1);
+}
+
+void
+mpcpcibrattach(parent, self, aux)
+	struct device *parent, *self;
+	void *aux;
+{
+	struct pcibr_softc *sc = (struct pcibr_softc *)self;
+	struct pcibr_config *lcp;
+	struct pcibus_attach_args pba;
+
+	switch(system_type) {
+	case POWER4e:
+		lcp = sc->sc_pcibr = &mpc_config;
+
+		sc->sc_bus_space.bus_base = MPC106_V_PCI_MEM_SPACE;
+		sc->sc_bus_space.bus_reverse = 1;
+
+		lcp->lc_pc.pc_conf_v = lcp;
+		lcp->lc_pc.pc_attach_hook = mpc_attach_hook;
+		lcp->lc_pc.pc_bus_maxdevs = mpc_bus_maxdevs;
+		lcp->lc_pc.pc_make_tag = mpc_make_tag;
+		lcp->lc_pc.pc_decompose_tag = mpc_decompose_tag;
+		lcp->lc_pc.pc_conf_read = mpc_conf_read;
+		lcp->lc_pc.pc_conf_write = mpc_conf_write;
+		lcp->lc_pc.pc_ether_hw_addr = mpc_ether_hw_addr;
+
+	        lcp->lc_pc.pc_intr_v = lcp;
+		lcp->lc_pc.pc_intr_map = mpc_intr_map;
+		lcp->lc_pc.pc_intr_string = mpc_intr_string;
+		lcp->lc_pc.pc_intr_establish = mpc_intr_establish;
+		lcp->lc_pc.pc_intr_disestablish = mpc_intr_disestablish;
+
+		printf(": MPC106, Revision %x.\n",
+				mpc_cfg_read_1(MPC106_PCI_REVID));
+		mpc_cfg_write_2(MPC106_PCI_STAT, 0xff80); /* Reset status */
+		break;
+	}
+
+	pba.pba_busname = "pci";
+	pba.pba_iot = &sc->sc_bus_space;
+	pba.pba_memt = &sc->sc_bus_space;
+	pba.pba_pc = &lcp->lc_pc;
+	pba.pba_bus = 0;
+	config_found(self, &pba, mpcpcibrprint);
+
+}
+
+static int
+mpcpcibrprint(aux, pnp)
+	void *aux;
+	const char *pnp;
+{
+	struct pcibus_attach_args *pba = aux;
+
+	if(pnp)
+		printf("%s at %s", pba->pba_busname, pnp);
+	printf(" bus %d", pba->pba_bus);
+	return(UNCONF);
+}
+
+/*
+ *  Get PCI physical address from given viritual address.
+ *  XXX Note that cross page boundarys are *not* garantueed to work!
+ */
+
+vm_offset_t
+vtophys(p)
+	void *p;
+{
+	vm_offset_t pa;
+	vm_offset_t va;
+
+	va = (vm_offset_t)p;
+	if((vm_offset_t)va < VM_MIN_KERNEL_ADDRESS) {
+		pa = va;
+	}
+	else {
+		pa = pmap_extract(vm_map_pmap(phys_map), va);
+	}
+	return(pa | MPC106_PCI_CPUMEM);
+}
+
+void
+mpc_attach_hook(parent, self, pba)
+	struct device *parent, *self;
+	struct pcibus_attach_args *pba;
+{
+}
+
+int
+mpc_ether_hw_addr(p)
+	u_int8_t *p;
+{
+	return(0);
+}
+
+int
+mpc_bus_maxdevs(cpv, busno)
+	void *cpv;
+	int busno;
+{
+	return(16);
+}
+
+pcitag_t
+mpc_make_tag(cpv, bus, dev, fnc)
+	void *cpv;
+	int bus, dev, fnc;
+{
+	return (bus << 16) | (dev << 11) | (fnc << 8);
+}
+
+void
+mpc_decompose_tag(cpv, tag, busp, devp, fncp)
+	void *cpv;
+	pcitag_t tag;
+	int *busp, *devp, *fncp;
+{
+	if (busp != NULL)
+		*busp = (tag >> 16) & 0xff;
+	if (devp != NULL)
+		*devp = (tag >> 11) & 0x1f;
+	if (fncp != NULL)
+		*fncp = (tag >> 8) & 0x7;
+}
+
+pcireg_t
+mpc_conf_read(cpv, tag, offset)
+	void *cpv;
+	pcitag_t tag;
+	int offset;
+{
+	pcireg_t data;
+	u_int32_t addr;
+	int device;
+	int s;
+
+	if((tag >> 16) != 0)
+		return(~0);
+	if(offset & 3 || offset < 0 || offset >= 0x100) {
+		printf ("pci_conf_read: bad reg %x\n", offset);
+		return(~0);
+	}
+
+	device = (tag >> 11) & 0x1f;
+	if(device > 11)
+		return(~0);	/* Outside config space */
+
+	addr = (0x800 << device) | (tag & 0x380) | offset;
+
+	s = splhigh();
+
+	/* low 20 bits of address are in the actual address */
+	data = in32rb(MPC106_PCI_CONF_SPACE | addr);
+
+	splx(s);
+	return(data);
+}
+
+void
+mpc_conf_write(cpv, tag, offset, data)
+	void *cpv;
+	pcitag_t tag;
+	int offset;
+	pcireg_t data;
+{
+	u_int32_t addr;
+	int device;
+	int s;
+
+	device = (tag >> 11) & 0x1f;
+	addr = (0x800 << device) | (tag & 0x380) | offset;
+
+	s = splhigh();
+
+	/* low 20 bits of address are in the actual address */
+	out32rb(MPC106_PCI_CONF_SPACE | addr, data);
+
+	splx(s);
+}
+
+int
+mpc_intr_map(lcv, bustag, buspin, line, ihp)
+	void *lcv;
+	pcitag_t bustag;
+	int buspin, line;
+	pci_intr_handle_t *ihp;
+{
+	int error = 0;
+	int route;
+	int lvl;
+
+	*ihp = -1;
+        if (buspin == 0) {
+                /* No IRQ used. */
+                error = 1;
+        }
+        else if (buspin > 4) {
+                printf("mpc_intr_map: bad interrupt pin %d\n", buspin);
+                error = 1;
+        }
+
+	if(system_type == POWER4e) {
+		route = in32rb(MPC106_PCI_CONF_SPACE + 0x860);
+		switch(line) {
+		case 14:
+			line = 9;
+			route &= ~0x000000ff;
+			route |= line;
+			break;
+		case 11:
+			line = 6;
+			route &= ~0x0000ff00;
+			route |= line << 8;
+			break;
+		case 12:
+			line = 14;
+			route &= ~0x00ff0000;
+			route |= line << 16;
+			break;
+		case 13:
+			line = 15;
+			route &= ~0xff000000;
+			route |= line << 24;
+			break;
+		}
+		lvl = isa_inb(0x04d0);
+		lvl |= isa_inb(0x04d1);
+		lvl |= 1L << line;
+		isa_outb(0x04d0, lvl);
+		isa_outb(0x04d1, lvl >> 8);
+		out32rb(MPC106_PCI_CONF_SPACE + 0x860, route);
+	}
+
+	if(!error)
+		*ihp = line;
+	return error;
+}
+
+const char *
+mpc_intr_string(lcv, ih)
+	void *lcv;
+	pci_intr_handle_t ih;
+{
+	static char str[16];
+
+	sprintf(str, "irq %d", ih);
+	return(str);
+}
+
+void *
+mpc_intr_establish(lcv, ih, level, func, arg, name)
+	void *lcv;
+	pci_intr_handle_t ih;
+	int level;
+	int (*func) __P((void *));
+	void *arg;
+	char *name;
+{
+	if (ih == 0 || ih >= ICU_LEN || ih == 2)
+		panic("pci_intr_establish: bogus handle 0x%x\n", ih);
+
+	return isabr_intr_establish(NULL, ih, IST_LEVEL, level, func, arg, name);
+}
+
+void
+mpc_intr_disestablish(lcv, cookie)
+	void *lcv, *cookie;
+{
+	/* XXX We should probably do something clever here.... later */
+}
+
+void
+mpc_print_pci_stat()
+{
+	u_int32_t stat;
+
+	stat = mpc_cfg_read_4(MPC106_PCI_CMD);
+	printf("pci: status 0x%08x.\n", stat);
+	stat = mpc_cfg_read_2(MPC106_PCI_STAT);
+	printf("pci: status 0x%04x.\n", stat);
+}
diff --git a/sys/arch/powerpc/pci/pci_machdep.h b/sys/arch/powerpc/pci/pci_machdep.h
new file mode 100644
index 00000000000..4ffe61f4c8a
--- /dev/null
+++ b/sys/arch/powerpc/pci/pci_machdep.h
@@ -0,0 +1,93 @@
+/*	$OpenBSD: pci_machdep.h,v 1.1 1997/10/11 11:29:31 pefo Exp $	*/
+
+/*
+ * Copyright (c) 1996 Carnegie-Mellon University.
+ * All rights reserved.
+ *
+ * Author: Chris G. Demetriou
+ *
+ * Permission to use, copy, modify and distribute this software and
+ * its documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+
+/*
+ * Machine-specific definitions for PCI autoconfiguration.
+ */
+
+/*
+ * Types provided to machine-independent PCI code
+ */
+typedef struct p4e_pci_chipset *pci_chipset_tag_t;
+typedef u_long pcitag_t;
+typedef u_long pci_intr_handle_t;
+
+/*
+ * p4e-specific PCI structure and type definitions.
+ * NOT TO BE USED DIRECTLY BY MACHINE INDEPENDENT CODE.
+ */
+struct p4e_pci_chipset {
+	void		*pc_conf_v;
+	void		(*pc_attach_hook) __P((struct device *,
+			    struct device *, struct pcibus_attach_args *));
+	int		(*pc_bus_maxdevs) __P((void *, int));
+	pcitag_t	(*pc_make_tag) __P((void *, int, int, int));
+	void		(*pc_decompose_tag) __P((void *, pcitag_t, int *,
+			    int *, int *));
+	pcireg_t	(*pc_conf_read) __P((void *, pcitag_t, int));
+	void		(*pc_conf_write) __P((void *, pcitag_t, int, pcireg_t));
+
+	void		*pc_intr_v;
+	int		(*pc_intr_map) __P((void *, pcitag_t, int, int,
+			    pci_intr_handle_t *));
+	const char	*(*pc_intr_string) __P((void *, pci_intr_handle_t));
+	void		*(*pc_intr_establish) __P((void *, pci_intr_handle_t,
+			    int, int (*)(void *), void *, char *));
+	void		(*pc_intr_disestablish) __P((void *, void *));
+	int		(*pc_ether_hw_addr) __P((u_int8_t *));
+};
+
+/*
+ * Functions provided to machine-independent PCI code.
+ */
+#define	pci_attach_hook(p, s, pba)					\
+    (*(pba)->pba_pc->pc_attach_hook)((p), (s), (pba))
+#define	pci_bus_maxdevs(c, b)						\
+    (*(c)->pc_bus_maxdevs)((c)->pc_conf_v, (b))
+#define	pci_make_tag(c, b, d, f)					\
+    (*(c)->pc_make_tag)((c)->pc_conf_v, (b), (d), (f))
+#define	pci_decompose_tag(c, t, bp, dp, fp)				\
+    (*(c)->pc_decompose_tag)((c)->pc_conf_v, (t), (bp), (dp), (fp))
+#define	pci_conf_read(c, t, r)						\
+    (*(c)->pc_conf_read)((c)->pc_conf_v, (t), (r))
+#define	pci_conf_write(c, t, r, v)					\
+    (*(c)->pc_conf_write)((c)->pc_conf_v, (t), (r), (v))
+#define	pci_intr_map(c, it, ip, il, ihp)				\
+    (*(c)->pc_intr_map)((c)->pc_intr_v, (it), (ip), (il), (ihp))
+#define	pci_intr_string(c, ih)						\
+    (*(c)->pc_intr_string)((c)->pc_intr_v, (ih))
+#define	pci_intr_establish(c, ih, l, h, a, nm)				\
+    (*(c)->pc_intr_establish)((c)->pc_intr_v, (ih), (l), (h), (a), (nm))
+#define	pci_intr_disestablish(c, iv)					\
+    (*(c)->pc_intr_disestablish)((c)->pc_intr_v, (iv))
+#define	pci_ether_hw_addr(c, p)						\
+    (*(c)->pc_ether_hw_addr)((p))
+
+vm_offset_t vtophys __P((void *));
+
diff --git a/sys/arch/powerpc/pci/pci_vga.c b/sys/arch/powerpc/pci/pci_vga.c
new file mode 100644
index 00000000000..c3fa7ff9c58
--- /dev/null
+++ b/sys/arch/powerpc/pci/pci_vga.c
@@ -0,0 +1,143 @@
+/*	$OpenBSD: pci_vga.c,v 1.1 1997/10/11 11:29:31 pefo Exp $ */
+
+/*
+ * Copyright (c) 1997 Per Fogelstrom
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed under OpenBSD by
+ *	Per Fogelstrom.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+#include <sys/param.h>
+#include <sys/fcntl.h>
+#include <sys/tty.h>
+#include <sys/proc.h>
+#include <sys/conf.h>
+#include <sys/user.h>
+#include <sys/ioctl.h>
+#include <sys/device.h>
+#include <sys/malloc.h>
+#include <sys/systm.h>
+
+#include <machine/bus.h>
+
+#include <dev/pci/pcivar.h>
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcidevs.h>
+
+struct pcivga_softc {
+	struct device      sc_dev;
+	void 		  *sc_ih;
+	pci_chipset_tag_t  sc_pc;
+	bus_space_tag_t    sc_memt;
+	bus_space_handle_t sc_iomem;
+	bus_space_handle_t sc_vmem;
+};
+
+int pcivga_probe __P((struct device *, void *, void *));
+void pcivga_attach __P((struct device *, struct device *, void *));
+
+struct cfattach pcivga_ca = {
+	sizeof(struct pcivga_softc), pcivga_probe, pcivga_attach
+};
+
+struct cfdriver pcivga_cd = {
+	NULL, "pcivga", DV_DULL
+};
+
+/*
+ * PCI probe
+ */
+int
+pcivga_probe(parent, cf, aux)
+	struct device *parent;
+	void *cf; 
+	void *aux;
+{
+	struct pci_attach_args *pa = aux;
+
+	if(PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY ||
+	   PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA) {
+		return(0);
+	}
+	return(1);
+}
+
+
+void
+pcivga_attach(parent, self, aux)
+	struct device *parent, *self;
+	void *aux;
+{
+	struct pci_attach_args *pa = aux;
+	struct pcivga_softc *sc = (void *)self;
+	bus_size_t msize;
+	bus_addr_t maddr;
+	int cacheable;
+	int class;
+
+	sc->sc_memt = pa->pa_memt;
+	sc->sc_pc = pa->pa_pc;
+
+	printf(": Generic VGA controller\n");
+
+	/* Map Control register aperture (0x10) */
+	if(pci_mem_find(pa->pa_pc, pa->pa_tag, 0x10,
+		  &maddr, &msize, &cacheable) != 0) {
+		printf("%s: can't find PCI card memory", self->dv_xname);
+		return;
+	}
+	if(bus_space_map(sc->sc_memt, maddr, msize, 0, &sc->sc_iomem) != 0) {
+		printf("%s: couldn't map ioreg region\n", self->dv_xname);
+		return;
+	}
+
+#if 0
+	/* Map Video memory aperture (0x14) */
+	if(pci_mem_find(pa->pa_pc, pa->pa_tag, 0x14,
+		  &maddr, &msize, &cacheable) != 0) {
+		printf("%s: can't find PCI card memory", self->dv_xname);
+		return;
+	}
+	if(bus_space_map(sc->sc_memt, maddr, msize, 0, &sc->sc_vmem) != 0) {
+		printf("%s: couldn't map video region\n", self->dv_xname);
+		return;
+	}
+#endif
+
+printf("IO=%x\n", sc->sc_iomem);
+class = pci_conf_read (pa->pa_pc, pa->pa_tag, 0x40);
+pci_conf_write(pa->pa_pc, pa->pa_tag, 0x40, class & ~0x40000100);
+class = pci_conf_read (pa->pa_pc, pa->pa_tag, 0x40);
+printf("Opt=%x\n", class);
+class = pci_conf_read (pa->pa_pc, pa->pa_tag, 0x4);
+printf("Devctl=%x\n", class);
+class = pci_conf_read (pa->pa_pc, pa->pa_tag, 0x30);
+printf("Rombase=%x\n", class);
+
+mdbpanic();
+
+}
diff --git a/sys/arch/powerpc/pci/pcibrvar.h b/sys/arch/powerpc/pci/pcibrvar.h
new file mode 100644
index 00000000000..ab0506094fd
--- /dev/null
+++ b/sys/arch/powerpc/pci/pcibrvar.h
@@ -0,0 +1,48 @@
+/*	$OpenBSD: pcibrvar.h,v 1.1 1997/10/11 11:29:32 pefo Exp $ */
+
+/*
+ * Copyright (c) 1997 Per Fogelstrom
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed under OpenBSD by
+ *	Per Fogelstrom.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+struct pcibr_config {
+	bus_space_tag_t lc_iot;
+	bus_space_tag_t lc_memt;
+	struct p4e_pci_chipset lc_pc;
+	int	pci_init_done;
+};
+
+struct pcibr_softc {
+	struct device	sc_dev;
+	struct pcibr_config *sc_pcibr;
+	struct p4e_bus_space sc_bus_space;	/* Same for I/O and Mem */
+};
+
+