Support for Transmeta CPU power management, called LongRun.

option LONGRUN enables a new sysctl, allowing a userland program
to read the current CPU frequency and voltage and also set
the mininum and maximum frequencies to operate between, and switch
between performance mode and battery mode.

ok mickey@

6 files changed, 210 insertions, 8 deletions

diff --git a/sys/arch/i386/conf/GENERIC b/sys/arch/i386/conf/GENERIC
index 14d79253ca6..515b6d6a992 100644
--- a/sys/arch/i386/conf/GENERIC
+++ b/sys/arch/i386/conf/GENERIC
@@ -1,4 +1,4 @@
-#	$OpenBSD: GENERIC,v 1.334 2003/04/25 22:03:42 grange Exp $
+#	$OpenBSD: GENERIC,v 1.335 2003/05/14 22:08:04 tedu Exp $
 #	$NetBSD: GENERIC,v 1.48 1996/05/20 18:17:23 mrg Exp $
 #
 #	GENERIC -- everything that's currently supported
@@ -19,6 +19,7 @@ option		USER_PCICONF	# user-space PCI configuration
 #option		VM86		# Virtual 8086 emulation
 option		USER_LDT	# user-settable LDT; see i386_set_ldt(2)
 option		APERTURE	# in-kernel aperture driver for XFree86
+option		LONGRUN		# Transmeta Longrun power management
 
 #option		KGDB		# Remote debugger support; exclusive of DDB
 #option		"KGDB_DEVNAME=\"pccom\"",KGDBADDR=0x2f8,KGDBRATE=9600
diff --git a/sys/arch/i386/conf/files.i386 b/sys/arch/i386/conf/files.i386
index f7f010d7584..22e8135b0c1 100644
--- a/sys/arch/i386/conf/files.i386
+++ b/sys/arch/i386/conf/files.i386
@@ -1,4 +1,4 @@
-#	$OpenBSD: files.i386,v 1.102 2003/02/10 22:32:33 jason Exp $
+#	$OpenBSD: files.i386,v 1.103 2003/05/14 22:08:04 tedu Exp $
 #	$NetBSD: files.i386,v 1.73 1996/05/07 00:58:36 thorpej Exp $
 #
 # new style config file for i386 architecture
@@ -24,6 +24,7 @@ file	arch/i386/i386/in_cksum.s	inet
 file	arch/i386/i386/ipx_cksum.c	ipx
 file	arch/i386/i386/machdep.c
 file	arch/i386/i386/kgdb_machdep.c	kgdb
+file	arch/i386/i386/longrun.c	longrun
 file	arch/i386/i386/math_emulate.c	math_emulate
 file	arch/i386/i386/mem.c
 file	arch/i386/i386/i686_mem.c	mtrr
diff --git a/sys/arch/i386/i386/longrun.c b/sys/arch/i386/i386/longrun.c
new file mode 100644
index 00000000000..1707c38c561
--- /dev/null
+++ b/sys/arch/i386/i386/longrun.c
@@ -0,0 +1,138 @@
+/* $OpenBSD: longrun.c,v 1.1 2003/05/14 22:08:04 tedu Exp $ */
+/*
+ * Copyright (c) 2003 Ted Unangst
+ * Copyright (c) 2001 Tamotsu Hattori
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <machine/cpufunc.h>
+
+#include <machine/longrun.h>
+
+static void	longrun_readreg(u_int32_t, u_int32_t *);
+static void	longrun_getmode(u_int32_t *, u_int32_t *, u_int32_t *);
+static void	longrun_setmode(u_int32_t, u_int32_t, u_int32_t);
+int		longrun_sysctl(void *, size_t *, void *, size_t);
+
+int longrun_enabled;
+
+union msrinfo {
+	u_int64_t msr;
+	uint32_t regs[2];
+};
+
+#define MSR_TMx86_LONGRUN       0x80868010
+#define MSR_TMx86_LONGRUN_FLAGS 0x80868011
+
+#define LONGRUN_MODE_MASK(x) ((x) & 0x000000007f)
+#define LONGRUN_MODE_RESERVED(x) ((x) & 0xffffff80)
+#define LONGRUN_MODE_WRITE(x, y) (LONGRUN_MODE_RESERVED(x) | LONGRUN_MODE_MASK(y))
+#define read_eflags()           ({register u_long ef; \
+                                  __asm("pushfl; popl %0" : "=r" (ef)); \
+                                  ef;}) 
+#define write_eflags(x)         ({register u_long ef = (x); \
+                                  __asm("pushl %0; popfl" : : "r" (ef));})
+
+/* sysctl handler and entry point.  Just call the right function */
+int longrun_sysctl(void *oldp, size_t *oldlenp, void *newp, size_t newlen)
+{
+	struct longrun *oinfo = oldp;
+	struct longrun *ninfo = newp;
+
+	if (!longrun_enabled)
+		return (EINVAL);
+
+	if (ninfo != NULL)
+		longrun_setmode(ninfo->low, ninfo->high, ninfo->mode);
+	
+	if (oinfo != NULL)
+		longrun_getmode(&oinfo->freq, &oinfo->voltage, &oinfo->percent);
+
+	return (0);
+
+}
+
+static void
+longrun_getmode(u_int32_t *freq, u_int32_t *voltage, u_int32_t *percent)
+{
+	u_long eflags;
+	u_int32_t regs[4];
+
+	eflags = read_eflags();
+	disable_intr();
+
+	longrun_readreg(0x80860007, regs);
+	*freq = regs[0];
+	*voltage = regs[1];
+	*percent = regs[2];
+
+	enable_intr();
+	write_eflags(eflags);
+}
+
+static void
+longrun_readreg(u_int ax, u_int * p)
+{
+	__asm __volatile(
+	".byte	0x0f, 0xa2;"
+	"movl	%%eax, (%2);"
+	"movl	%%ebx, 4(%2);"
+	"movl	%%ecx, 8(%2);"
+	"movl	%%edx, 12(%2);"
+	:"=a"(ax)
+	:"0"(ax), "S"(p)
+	:"bx", "cx", "dx"
+	);
+}
+
+static void 
+longrun_setmode(u_int32_t low, u_int32_t high, u_int32_t mode)
+{
+ 	u_long		eflags;
+ 	union msrinfo	msrinfo;
+
+	if (low < 0 || low > 100 || high < 0 || high > 100)
+		return;
+	if (mode != 0 && mode != 1)
+		return;
+
+	eflags = read_eflags();
+	disable_intr();
+	msrinfo.msr = rdmsr(MSR_TMx86_LONGRUN);
+	msrinfo.regs[0] = LONGRUN_MODE_WRITE(msrinfo.regs[0], low);
+	msrinfo.regs[1] = LONGRUN_MODE_WRITE(msrinfo.regs[1], high);
+	wrmsr(MSR_TMx86_LONGRUN, msrinfo.msr);
+	
+	msrinfo.msr = rdmsr(MSR_TMx86_LONGRUN_FLAGS);
+	msrinfo.regs[0] = (msrinfo.regs[0] & ~0x01) | mode;
+	wrmsr(MSR_TMx86_LONGRUN_FLAGS, msrinfo.msr);
+
+	enable_intr();
+	write_eflags(eflags);
+}
+
diff --git a/sys/arch/i386/i386/machdep.c b/sys/arch/i386/i386/machdep.c
index 58807149298..76fb3c84632 100644
--- a/sys/arch/i386/i386/machdep.c
+++ b/sys/arch/i386/i386/machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: machdep.c,v 1.229 2003/05/13 03:49:04 art Exp $	*/
+/*	$OpenBSD: machdep.c,v 1.230 2003/05/14 22:08:04 tedu Exp $	*/
 /*	$NetBSD: machdep.c,v 1.214 1996/11/10 03:16:17 thorpej Exp $	*/
 
 /*-
@@ -277,6 +277,8 @@ int	bus_mem_add_mapping(bus_addr_t, bus_size_t,
 int	_bus_dmamap_load_buffer(bus_dma_tag_t, bus_dmamap_t, void *,
     bus_size_t, struct proc *, int, paddr_t *, int *, int);
 
+int	longrun_sysctl(void *, size_t *, void *, size_t);
+
 #ifdef KGDB
 #ifndef KGDB_DEVNAME
 #ifdef __i386__
@@ -318,6 +320,7 @@ void	cyrix6x86_cpu_setup(const char *, int, int);
 void	natsem6x86_cpu_setup(const char *, int, int);
 void	intel586_cpu_setup(const char *, int, int);
 void	intel686_cpu_setup(const char *, int, int);
+void	tm86_cpu_setup(const char *, int, int);
 char *	intel686_cpu_name(int);
 char *	cyrix3_cpu_name(int, int);
 void	viac3_rnd(void *);
@@ -914,9 +917,9 @@ const struct cpu_cpuid_nameclass i386_cpuid_cpus[] = {
 				0, 0, 0, 0, 0, 0, 0, 0,
 				"TMS5x00"		/* Default */
 			},
-			NULL
+			tm86_cpu_setup
 		},
-		/* Family 6, not yet available from Rise */
+		/* Family 6, not yet available from Transmeta */
 		{
 			CPUCLASS_686,
 			{
@@ -1245,6 +1248,18 @@ intel686_cpu_setup(cpu_device, model, step)
 #undef wrmsr
 }
 
+void
+tm86_cpu_setup(cpu_device, model, step)
+	const char *cpu_device;
+	int model, step;
+{
+#ifdef LONGRUN
+	extern int longrun_enabled;
+
+	longrun_enabled = 1;
+#endif
+}
+
 char *
 intel686_cpu_name(model)
 	int model;
@@ -2655,8 +2670,12 @@ cpu_sysctl(name, namelen, oldp, oldlenp, newp, newlen, p)
 		return (sysctl_int(oldp, oldlenp, newp, newlen,
 		    &user_ldt_enable));
 #endif
+#ifdef LONGRUN
+	case CPU_LONGRUN:
+		return (longrun_sysctl(oldp, oldlenp, newp, newlen));
+#endif
 	default:
-		return EOPNOTSUPP;
+		return (EOPNOTSUPP);
 	}
 	/* NOTREACHED */
 }
diff --git a/sys/arch/i386/include/cpu.h b/sys/arch/i386/include/cpu.h
index 20d694e7e24..9b6894f0c44 100644
--- a/sys/arch/i386/include/cpu.h
+++ b/sys/arch/i386/include/cpu.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.h,v 1.46 2003/03/28 00:49:13 miod Exp $	*/
+/*	$OpenBSD: cpu.h,v 1.47 2003/05/14 22:08:04 tedu Exp $	*/
 /*	$NetBSD: cpu.h,v 1.35 1996/05/05 19:29:26 christos Exp $	*/
 
 /*-
@@ -240,7 +240,8 @@ void	setconf(void);
 #define CPU_KBDRESET		10	/* keyboard reset under pcvt */
 #define CPU_APMHALT		11	/* halt -p hack */
 #define CPU_USERLDT		12
-#define	CPU_MAXID		13	/* number of valid machdep ids */
+#define	CPU_LONGRUN		13	/* LongRun status */
+#define	CPU_MAXID		14	/* number of valid machdep ids */
 
 #define	CTL_MACHDEP_NAMES { \
 	{ 0, 0 }, \
@@ -256,6 +257,7 @@ void	setconf(void);
 	{ "kbdreset", CTLTYPE_INT }, \
 	{ "apmhalt", CTLTYPE_INT }, \
 	{ "userldt", CTLTYPE_INT }, \
+	{ "longrun", CTLTYPE_STRUCT }, \
 }
 
 #endif /* !_I386_CPU_H_ */
diff --git a/sys/arch/i386/include/longrun.h b/sys/arch/i386/include/longrun.h
new file mode 100644
index 00000000000..a0388f894d3
--- /dev/null
+++ b/sys/arch/i386/include/longrun.h
@@ -0,0 +1,41 @@
+/* $OpenBSD: longrun.h,v 1.1 2003/05/14 22:08:04 tedu Exp $ */
+/*
+ * Copyright (c) 2003 Ted Unangst
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef LONGRUN_H
+#define LONGRUN_H
+
+struct longrun {
+	u_int32_t low;
+	u_int32_t high;
+	u_int32_t mode;
+	u_int32_t freq;
+	u_int32_t voltage;
+	u_int32_t percent;
+};
+
+#endif