diff options
author | Niklas Hallqvist <niklas@cvs.openbsd.org> | 1996-11-28 23:37:43 +0000 |
---|---|---|
committer | Niklas Hallqvist <niklas@cvs.openbsd.org> | 1996-11-28 23:37:43 +0000 |
commit | 5dcbfbb64e3858fa1390055c4d885d154c9461eb (patch) | |
tree | c3609fd85a6f359558e065a9d74ea8741e88721b /sys/arch | |
parent | a5771e8fe90f291efc372ba3ceaf19dd410d38a3 (diff) |
Adaption to new bus.h from NetBSD. Various driver has been updated to
NetBSD 961107 state. Other has not, partly because sometimes the bus.h
changes was coupled with other changes.
Diffstat (limited to 'sys/arch')
-rw-r--r-- | sys/arch/i386/conf/OPRAH | 8 | ||||
-rw-r--r-- | sys/arch/i386/i386/machdep.c | 160 | ||||
-rw-r--r-- | sys/arch/i386/i386/mainbus.c | 15 | ||||
-rw-r--r-- | sys/arch/i386/include/bus.h | 44 | ||||
-rw-r--r-- | sys/arch/i386/include/bus.old.h | 135 | ||||
-rw-r--r-- | sys/arch/i386/isa/ahc_isa.c | 64 | ||||
-rw-r--r-- | sys/arch/i386/isa/lms.c | 59 | ||||
-rw-r--r-- | sys/arch/i386/isa/pccom.c | 306 | ||||
-rw-r--r-- | sys/arch/i386/pci/pci_compat.c | 20 | ||||
-rw-r--r-- | sys/arch/i386/pci/pci_machdep.c | 15 |
10 files changed, 430 insertions, 396 deletions
diff --git a/sys/arch/i386/conf/OPRAH b/sys/arch/i386/conf/OPRAH index 09b3e770622..17979f18730 100644 --- a/sys/arch/i386/conf/OPRAH +++ b/sys/arch/i386/conf/OPRAH @@ -1,4 +1,4 @@ -# $OpenBSD: OPRAH,v 1.12 1996/11/25 23:09:04 niklas Exp $ +# $OpenBSD: OPRAH,v 1.13 1996/11/28 23:37:35 niklas Exp $ # # OPRAH -- Niklas Hallqvist's test machine # @@ -92,9 +92,9 @@ lpt0 at isa? port 0x378 irq 7 # standard PC parallel ports #mms1 at isa? port 0x238 irq 5 #pms0 at isa? port 0x60 irq 12 # PS/2 auxiliary port mouse -#aha0 at isa? port 0x330 irq ? drq ? # Adaptec 154[02] SCSI controllers -#aha1 at isa? port 0x334 irq ? drq ? # Adaptec 154[02] SCSI controllers -#scsibus* at aha? +aha0 at isa? port 0x230 irq ? drq ? # Adaptec 154[02] SCSI controllers +aha1 at isa? port 0x234 irq ? drq ? # Adaptec 154[02] SCSI controllers +scsibus* at aha? wds0 at isa? port 0x350 irq 15 drq 6 # WD7000 and TMC-7000 controllers wds1 at isa? port 0x358 irq 11 drq 5 scsibus* at wds? diff --git a/sys/arch/i386/i386/machdep.c b/sys/arch/i386/i386/machdep.c index e1650588df8..7907d06aedc 100644 --- a/sys/arch/i386/i386/machdep.c +++ b/sys/arch/i386/i386/machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: machdep.c,v 1.27 1996/10/25 11:14:12 deraadt Exp $ */ +/* $OpenBSD: machdep.c,v 1.28 1996/11/28 23:37:36 niklas Exp $ */ /* $NetBSD: machdep.c,v 1.202 1996/05/18 15:54:59 christos Exp $ */ /*- @@ -60,6 +60,7 @@ #include <sys/mount.h> #include <sys/vnode.h> #include <sys/device.h> +#include <sys/extent.h> #include <sys/sysctl.h> #include <sys/syscallargs.h> #ifdef SYSVMSG @@ -84,6 +85,7 @@ #include <machine/cpufunc.h> #include <machine/gdt.h> #include <machine/pio.h> +#include <machine/bus.h> #include <machine/psl.h> #include <machine/reg.h> #include <machine/specialreg.h> @@ -160,6 +162,9 @@ void consinit __P((void)); static int exec_nomid __P((struct proc *, struct exec_package *)); #endif +int bus_mem_add_mapping __P((bus_addr_t, bus_size_t, + int, bus_space_handle_t *)); + extern long cnvmem; /* BIOS's conventional memory size */ extern long extmem; /* BIOS's extended memory size */ @@ -1453,12 +1458,70 @@ cpu_reset() } int -bus_mem_map(t, bpa, size, cacheable, mhp) - bus_chipset_tag_t t; - bus_mem_addr_t bpa; - bus_mem_size_t size; +bus_space_map(t, bpa, size, cacheable, bshp) + bus_space_tag_t t; + bus_addr_t bpa; + bus_size_t size; + int cacheable; + bus_space_handle_t *bshp; +{ + int error; + + /* + * For I/O space, that's all she wrote. + */ + if (t == I386_BUS_SPACE_IO) { + *bshp = bpa; + return (0); + } + + /* + * For memory space, map the bus physical address to + * a kernel virtual address. + */ + error = bus_mem_add_mapping(bpa, size, cacheable, bshp); + return (error); +} + +int +bus_space_alloc(t, rstart, rend, size, alignment, boundary, cacheable, + bpap, bshp) + bus_space_tag_t t; + bus_addr_t rstart, rend; + bus_size_t size, alignment; + bus_addr_t boundary; int cacheable; - bus_mem_handle_t *mhp; + bus_addr_t *bpap; + bus_space_handle_t *bshp; +{ + u_long bpa; + int error; + + /* + * For I/O space, that's all she wrote. + */ + if (t == I386_BUS_SPACE_IO) { + *bshp = *bpap = bpa; + return (0); + } + + /* + * For memory space, map the bus physical address to + * a kernel virtual address. + */ + error = bus_mem_add_mapping(bpa, size, cacheable, bshp); + + *bpap = bpa; + + return (error); +} + +int +bus_mem_add_mapping(bpa, size, cacheable, bshp) + bus_addr_t bpa; + bus_size_t size; + int cacheable; + bus_space_handle_t *bshp; { u_long pa, endpa; vm_offset_t va; @@ -1468,41 +1531,84 @@ bus_mem_map(t, bpa, size, cacheable, mhp) #ifdef DIAGNOSTIC if (endpa <= pa) - panic("bus_mem_map: overflow"); + panic("bus_mem_add_mapping: overflow"); #endif va = kmem_alloc_pageable(kernel_map, endpa - pa); if (va == 0) - return (1); - *mhp = (caddr_t)(va + (bpa & PGOFSET)); + return (ENOMEM); + + *bshp = (bus_space_handle_t)(va + (bpa & PGOFSET)); for (; pa < endpa; pa += NBPG, va += NBPG) { - pmap_enter(pmap_kernel(), va, pa, VM_PROT_READ | VM_PROT_WRITE, - TRUE); - if (!cacheable) - pmap_changebit(pa, PG_N, ~0); - else - pmap_changebit(pa, 0, ~PG_N); - } + pmap_enter(pmap_kernel(), va, pa, + VM_PROT_READ | VM_PROT_WRITE, TRUE); + if (!cacheable) + pmap_changebit(pa, PG_N, ~0); + else + pmap_changebit(pa, 0, ~PG_N); + } - return 0; + return 0; } void -bus_mem_unmap(t, memh, size) - bus_chipset_tag_t t; - bus_mem_handle_t memh; - bus_mem_size_t size; +bus_space_unmap(t, bsh, size) + bus_space_tag_t t; + bus_space_handle_t bsh; + bus_size_t size; { - vm_offset_t va, endva; + u_long va, endva; + bus_addr_t bpa; - va = i386_trunc_page(memh); - endva = i386_round_page((memh + size) - 1); + /* + * Find the correct bus physical address. + */ + switch (t) { + case I386_BUS_SPACE_IO: + bpa = bsh; + break; + + case I386_BUS_SPACE_MEM: + va = i386_trunc_page(bsh); + endva = i386_round_page((bsh + size) - 1); #ifdef DIAGNOSTIC - if (endva <= va) - panic("bus_mem_unmap: overflow"); + if (endva <= va) + panic("bus_space_unmap: overflow"); #endif - kmem_free(kernel_map, va, endva - va); + bpa = pmap_extract(pmap_kernel(), va) + (bsh & PGOFSET); + + /* + * Free the kernel virtual mapping. + */ + kmem_free(kernel_map, va, endva - va); + break; + + default: + panic("bus_space_unmap: bad bus space tag"); + } +} + +void +bus_space_free(t, bsh, size) + bus_space_tag_t t; + bus_space_handle_t bsh; + bus_size_t size; +{ + + /* bus_space_unmap() does all that we need to do. */ + bus_space_unmap(t, bsh, size); +} + +int +bus_space_subregion(t, bsh, offset, size, nbshp) + bus_space_tag_t t; + bus_space_handle_t bsh; + bus_size_t offset, size; + bus_space_handle_t *nbshp; +{ + *nbshp = bsh + offset; + return (0); } diff --git a/sys/arch/i386/i386/mainbus.c b/sys/arch/i386/i386/mainbus.c index 3f230e1649e..a6623888a55 100644 --- a/sys/arch/i386/i386/mainbus.c +++ b/sys/arch/i386/i386/mainbus.c @@ -1,4 +1,4 @@ -/* $OpenBSD: mainbus.c,v 1.7 1996/11/23 21:45:49 kstailey Exp $ */ +/* $OpenBSD: mainbus.c,v 1.8 1996/11/28 23:37:37 niklas Exp $ */ /* $NetBSD: mainbus.c,v 1.8 1996/04/11 22:13:37 cgd Exp $ */ /* @@ -35,7 +35,7 @@ #include <sys/systm.h> #include <sys/device.h> -#include <machine/bus.old.h> +#include <machine/bus.h> #include <dev/isa/isavar.h> #include <dev/eisa/eisavar.h> @@ -100,15 +100,15 @@ mainbus_attach(parent, self, aux) if (1 /* XXX ISA NOT YET SEEN */) { mba.mba_iba.iba_busname = "isa"; - mba.mba_iba.iba_bc = NULL; - mba.mba_iba.iba_ic = NULL; + mba.mba_iba.iba_iot = I386_BUS_SPACE_IO; + mba.mba_iba.iba_memt = I386_BUS_SPACE_MEM; config_found(self, &mba.mba_iba, mainbus_print); } if (!bcmp(ISA_HOLE_VADDR(EISA_ID_PADDR), EISA_ID, EISA_ID_LEN)) { mba.mba_eba.eba_busname = "eisa"; - mba.mba_eba.eba_bc = NULL; - mba.mba_eba.eba_ec = NULL; + mba.mba_eba.eba_iot = I386_BUS_SPACE_IO; + mba.mba_eba.eba_memt = I386_BUS_SPACE_MEM; config_found(self, &mba.mba_eba, mainbus_print); } @@ -121,7 +121,8 @@ mainbus_attach(parent, self, aux) #if NPCI > 0 if (pci_mode_detect() != 0) { mba.mba_pba.pba_busname = "pci"; - mba.mba_pba.pba_bc = NULL; + mba.mba_pba.pba_iot = I386_BUS_SPACE_IO; + mba.mba_pba.pba_memt = I386_BUS_SPACE_MEM; mba.mba_pba.pba_bus = 0; config_found(self, &mba.mba_pba, mainbus_print); } diff --git a/sys/arch/i386/include/bus.h b/sys/arch/i386/include/bus.h index 17cbbcc784c..0cca2d9e628 100644 --- a/sys/arch/i386/include/bus.h +++ b/sys/arch/i386/include/bus.h @@ -1,4 +1,4 @@ -/* $OpenBSD: bus.h,v 1.6 1996/11/12 22:46:27 niklas Exp $ */ +/* $OpenBSD: bus.h,v 1.7 1996/11/28 23:37:38 niklas Exp $ */ /* $NetBSD: bus.h,v 1.5 1996/10/21 22:26:19 thorpej Exp $ */ /* @@ -153,6 +153,27 @@ void bus_space_free __P((bus_space_tag_t t, bus_space_handle_t bsh, #endif /* + * void bus_space_read_raw_multi_N __P((bus_space_tag_t tag, + * bus_space_handle_t bsh, bus_size_t offset, + * u_int8_t *addr, size_t count)); + * + * Read `count' bytes in 2, 4 or 8 byte wide quantities from bus space + * described by tag/handle/offset and copy into buffer provided. The buffer + * must have proper alignment for the N byte wide entities. Furthermore + * possible byte-swapping should be done by these functions. + */ + +#define bus_space_read_raw_multi_2(t, h, o, a, c) \ + bus_space_read_multi_2((t), (h), (o), (u_int16_t *)(a), (c) >> 1) +#define bus_space_read_raw_multi_4(t, h, o, a, c) \ + bus_space_read_multi_4((t), (h), (o), (u_int32_t *)(a), (c) >> 2) + +#if 0 /* Cause a link error for bus_space_read_raw_multi_8 */ +#define bus_space_read_raw_multi_8 \ + !!! bus_space_read_raw_multi_8 unimplemented !!! +#endif + +/* * void bus_space_read_region_N __P((bus_space_tag_t tag, * bus_space_handle_t bsh, bus_size_t offset, * u_intN_t *addr, size_t count)); @@ -326,6 +347,27 @@ void bus_space_free __P((bus_space_tag_t t, bus_space_handle_t bsh, #endif /* + * void bus_space_write_raw_multi_N __P((bus_space_tag_t tag, + * bus_space_handle_t bsh, bus_size_t offset, + * u_int8_t *addr, size_t count)); + * + * Write `count' bytes in 2, 4 or 8 byte wide quantities from the buffer + * provided to bus space described by tag/handle/offset. The buffer + * must have proper alignment for the N byte wide entities. Furthermore + * possible byte-swapping should be done by these functions. + */ + +#define bus_space_write_raw_multi_2(t, h, o, a, c) \ + bus_space_write_multi_2((t), (h), (o), (u_int16_t *)(a), (c) >> 1) +#define bus_space_write_raw_multi_4(t, h, o, a, c) \ + bus_space_write_multi_4((t), (h), (o), (u_int32_t *)(a), (c) >> 2) + +#if 0 /* Cause a link error for bus_space_write_raw_multi_8 */ +#define bus_space_write_raw_multi_8 \ + !!! bus_space_write_raw_multi_8 unimplemented !!! +#endif + +/* * void bus_space_write_region_N __P((bus_space_tag_t tag, * bus_space_handle_t bsh, bus_size_t offset, * u_intN_t *addr, size_t count)); diff --git a/sys/arch/i386/include/bus.old.h b/sys/arch/i386/include/bus.old.h deleted file mode 100644 index 93b8c496b1f..00000000000 --- a/sys/arch/i386/include/bus.old.h +++ /dev/null @@ -1,135 +0,0 @@ -/* $OpenBSD: bus.old.h,v 1.1 1996/11/12 20:29:58 niklas Exp $ */ -/* $NetBSD: bus.h,v 1.3 1996/05/03 19:22:18 christos Exp $ */ - -/* - * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Christopher G. Demetriou - * for the NetBSD Project. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _I386_BUS_H_ -#define _I386_BUS_H_ - -#include <machine/pio.h> - -/* - * I/O addresses (in bus space) - */ -typedef u_long bus_io_addr_t; -typedef u_long bus_io_size_t; - -/* - * Memory addresses (in bus space) - */ -typedef u_long bus_mem_addr_t; -typedef u_long bus_mem_size_t; - -/* - * Access methods for bus resources, I/O space, and memory space. - */ -typedef void *bus_chipset_tag_t; -typedef u_long bus_io_handle_t; -typedef caddr_t bus_mem_handle_t; - -#define bus_io_map(t, port, size, iohp) \ - ((void) t, *iohp = port, 0) -#define bus_io_unmap(t, ioh, size) - -#define bus_io_read_1(t, h, o) ((void) t, inb((h) + (o))) -#define bus_io_read_2(t, h, o) ((void) t, inw((h) + (o))) -#define bus_io_read_4(t, h, o) ((void) t, inl((h) + (o))) -#if 0 /* Cause a link error for bus_io_read_8 */ -#define bus_io_read_8(t, h, o) !!! bus_io_read_8 unimplemented !!! -#endif - -#define bus_io_read_multi_1(t, h, o, a, c) \ - ((void) t, insb((h) + (o), (a), (c))) -#define bus_io_read_multi_2(t, h, o, a, c) \ - ((void) t, insw((h) + (o), (a), (c))) -#define bus_io_read_multi_4(t, h, o, a, c) \ - ((void) t, insl((h) + (o), (a), (c))) -#if 0 /* Cause a link error for bus_io_read_multi_8 */ -#define bus_io_read_multi_8(t, h, o, a, c) \ - !!! bus_io_read_multi_8 unimplemented !!! -#endif - -#define bus_io_write_1(t, h, o, v) ((void) t, outb((h) + (o), (v))) -#define bus_io_write_2(t, h, o, v) ((void) t, outw((h) + (o), (v))) -#define bus_io_write_4(t, h, o, v) ((void) t, outl((h) + (o), (v))) -#if 0 /* Cause a link error for bus_io_write_8 */ -#define bus_io_write_8(t, h, o, v) !!! bus_io_write_8 unimplemented !!! -#endif - -#define bus_io_write_multi_1(t, h, o, a, c) \ - ((void) t, outsb((h) + (o), (a), (c))) -#define bus_io_write_multi_2(t, h, o, a, c) \ - ((void) t, outsw((h) + (o), (a), (c))) -#define bus_io_write_multi_4(t, h, o, a, c) \ - ((void) t, outsl((h) + (o), (a), (c))) -#if 0 /* Cause a link error for bus_io_write_multi_8 */ -#define bus_io_write_multi_8(t, h, o, a, c) \ - !!! bus_io_write_multi_8 unimplimented !!! -#endif - -int bus_mem_map __P((bus_chipset_tag_t t, bus_mem_addr_t bpa, - bus_mem_size_t size, int cacheable, bus_mem_handle_t *mhp)); -void bus_mem_unmap __P((bus_chipset_tag_t t, bus_mem_handle_t memh, - bus_mem_size_t size)); - -#define bus_mem_read_1(t, h, o) ((void) t, (*(volatile u_int8_t *)((h) + (o)))) -#define bus_mem_read_2(t, h, o) ((void) t, (*(volatile u_int16_t *)((h) + (o)))) -#define bus_mem_read_4(t, h, o) ((void) t, (*(volatile u_int32_t *)((h) + (o)))) -#define bus_mem_read_8(t, h, o) ((void) t, (*(volatile u_int64_t *)((h) + (o)))) - -#define bus_mem_write_1(t, h, o, v) \ - ((void) t, ((void)(*(volatile u_int8_t *)((h) + (o)) = (v)))) -#define bus_mem_write_2(t, h, o, v) \ - ((void) t, ((void)(*(volatile u_int16_t *)((h) + (o)) = (v)))) -#define bus_mem_write_4(t, h, o, v) \ - ((void) t, ((void)(*(volatile u_int32_t *)((h) + (o)) = (v)))) -#define bus_mem_write_8(t, h, o, v) \ - ((void) t, ((void)(*(volatile u_int64_t *)((h) + (o)) = (v)))) - -#define bus_io_read_raw_multi_2(t, h, o, a, c) \ - ((void) t, insw((h) + (o), (a), (c) >> 1)) -#define bus_io_read_raw_multi_4(t, h, o, a, c) \ - ((void) t, insl((h) + (o), (a), (c) >> 2)) -#if 0 /* Cause a link error for bus_io_read_raw_multi_8 */ -#define bus_io_read_raw_multi_8(t, h, o, a, c) \ - !!! bus_io_read_multi_8 unimplemented !!! -#endif - -#define bus_io_write_raw_multi_2(t, h, o, a, c) \ - ((void) t, outsw((h) + (o), (a), (c) >> 1)) -#define bus_io_write_raw_multi_4(t, h, o, a, c) \ - ((void) t, outsl((h) + (o), (a), (c) >> 2)) -#if 0 /* Cause a link error for bus_io_write_raw_multi_8 */ -#define bus_io_write_raw_multi_8(t, h, o, a, c) \ - !!! bus_io_write_multi_8 unimplimented !!! -#endif - -#endif /* _I386_BUS_H_ */ diff --git a/sys/arch/i386/isa/ahc_isa.c b/sys/arch/i386/isa/ahc_isa.c index 30bcb3a771f..6d69ffcb367 100644 --- a/sys/arch/i386/isa/ahc_isa.c +++ b/sys/arch/i386/isa/ahc_isa.c @@ -1,5 +1,5 @@ -/* $OpenBSD: ahc_isa.c,v 1.2 1996/11/12 20:30:00 niklas Exp $ */ -/* $NetBSD: ahc_isa.c,v 1.1 1996/08/05 21:14:29 soda Exp $ */ +/* $OpenBSD: ahc_isa.c,v 1.3 1996/11/28 23:37:39 niklas Exp $ */ +/* $NetBSD: ahc_isa.c,v 1.5 1996/10/21 22:27:39 thorpej Exp $ */ /* * Product specific probe and attach routines for: @@ -70,7 +70,7 @@ #include <sys/queue.h> #include <sys/malloc.h> -#include <machine/bus.old.h> +#include <machine/bus.h> #include <machine/intr.h> #include <scsi/scsi_all.h> @@ -106,9 +106,9 @@ #define AHC_ISA_PRIMING_VID(index) (AHC_ISA_VID + (index)) #define AHC_ISA_PRIMING_PID(index) (AHC_ISA_PID + (index)) -int ahc_isa_irq __P((bus_chipset_tag_t, bus_io_handle_t)); -int ahc_isa_idstring __P((bus_chipset_tag_t, bus_io_handle_t, char *)); -int ahc_isa_match __P((struct isa_attach_args *, bus_io_addr_t)); +int ahc_isa_irq __P((bus_space_tag_t, bus_space_handle_t)); +int ahc_isa_idstring __P((bus_space_tag_t, bus_space_handle_t, char *)); +int ahc_isa_match __P((struct isa_attach_args *, bus_addr_t)); int ahc_isa_probe __P((struct device *, void *, void *)); void ahc_isa_attach __P((struct device *, struct device *, void *)); @@ -138,15 +138,15 @@ static int ahc_isa_slot_initialized; * Return irq setting of the board, otherwise -1. */ int -ahc_isa_irq(bc, ioh) - bus_chipset_tag_t bc; - bus_io_handle_t ioh; +ahc_isa_irq(iot, ioh) + bus_space_tag_t iot; + bus_space_handle_t ioh; { int irq; u_char intdef; - ahc_reset("ahc_isa", bc, ioh); - intdef = bus_io_read_1(bc, ioh, INTDEF); + ahc_reset("ahc_isa", iot, ioh); + intdef = bus_space_read_1(iot, ioh, INTDEF); switch (irq = (intdef & 0xf)) { case 9: case 10: @@ -165,9 +165,9 @@ ahc_isa_irq(bc, ioh) } int -ahc_isa_idstring(bc, ioh, idstring) - bus_chipset_tag_t bc; - bus_io_handle_t ioh; +ahc_isa_idstring(iot, ioh, idstring) + bus_space_tag_t iot; + bus_space_handle_t ioh; char *idstring; { u_int8_t vid[EISA_NVIDREGS], pid[EISA_NPIDREGS]; @@ -175,9 +175,9 @@ ahc_isa_idstring(bc, ioh, idstring) /* Get the vendor ID bytes */ for (i = 0; i < EISA_NVIDREGS; i++) { - bus_io_write_1(bc, ioh, AHC_ISA_PRIMING, + bus_space_write_1(iot, ioh, AHC_ISA_PRIMING, AHC_ISA_PRIMING_VID(i)); - vid[i] = bus_io_read_1(bc, ioh, AHC_ISA_VID + i); + vid[i] = bus_space_read_1(iot, ioh, AHC_ISA_VID + i); } /* Check for device existence */ @@ -199,9 +199,9 @@ ahc_isa_idstring(bc, ioh, idstring) /* Get the product ID bytes */ for (i = 0; i < EISA_NPIDREGS; i++) { - bus_io_write_1(bc, ioh, AHC_ISA_PRIMING, + bus_space_write_1(iot, ioh, AHC_ISA_PRIMING, AHC_ISA_PRIMING_PID(i)); - pid[i] = bus_io_read_1(bc, ioh, AHC_ISA_PID + i); + pid[i] = bus_space_read_1(iot, ioh, AHC_ISA_PID + i); } /* Create the ID string from the vendor and product IDs */ @@ -220,10 +220,10 @@ ahc_isa_idstring(bc, ioh, idstring) int ahc_isa_match(ia, iobase) struct isa_attach_args *ia; - bus_io_addr_t iobase; + bus_addr_t iobase; { - bus_chipset_tag_t bc = ia->ia_bc; - bus_io_handle_t ioh; + bus_space_tag_t iot = ia->ia_iot; + bus_space_handle_t ioh; int irq; char idstring[EISA_IDSTRINGLEN]; @@ -232,7 +232,7 @@ ahc_isa_match(ia, iobase) * space. If we can't, assume nothing's there, but * warn about it. */ - if (bus_io_map(bc, iobase, AHC_ISA_IOSIZE, &ioh)) { + if (bus_space_map(iot, iobase, AHC_ISA_IOSIZE, 0, &ioh)) { #if 0 /* * Don't print anything out here, since this could @@ -245,15 +245,15 @@ ahc_isa_match(ia, iobase) return (0); } - if (!ahc_isa_idstring(bc, ioh, idstring)) + if (!ahc_isa_idstring(iot, ioh, idstring)) irq = -1; /* cannot get the ID string */ else if (strcmp(idstring, "ADP7756") && strcmp(idstring, "ADP7757")) irq = -1; /* unknown ID strings */ else - irq = ahc_isa_irq(bc, ioh); + irq = ahc_isa_irq(iot, ioh); - bus_io_unmap(bc, ioh, AHC_ISA_IOSIZE); + bus_space_unmap(iot, ioh, AHC_ISA_IOSIZE); if (irq < 0) return (0); @@ -337,17 +337,17 @@ ahc_isa_attach(parent, self, aux) ahc_type type; struct ahc_data *ahc = (void *)self; struct isa_attach_args *ia = aux; - bus_chipset_tag_t bc = ia->ia_bc; - bus_io_handle_t ioh; + bus_space_tag_t iot = ia->ia_iot; + bus_space_handle_t ioh; int irq; char idstring[EISA_IDSTRINGLEN]; const char *model; - if (bus_io_map(bc, ia->ia_iobase, ia->ia_iosize, &ioh)) + if (bus_space_map(iot, ia->ia_iobase, ia->ia_iosize, 0, &ioh)) panic("ahc_isa_attach: could not map slot I/O addresses"); - if (!ahc_isa_idstring(bc, ioh, idstring)) + if (!ahc_isa_idstring(iot, ioh, idstring)) panic("ahc_isa_attach: could not read ID string"); - if ((irq = ahc_isa_irq(bc, ioh)) < 0) + if ((irq = ahc_isa_irq(iot, ioh)) < 0) panic("ahc_isa_attach: ahc_isa_irq failed!"); if (strcmp(idstring, "ADP7756") == 0) { @@ -361,14 +361,16 @@ ahc_isa_attach(parent, self, aux) } printf(": %s\n", model); - ahc_construct(ahc, bc, ioh, type, AHC_FNONE); + ahc_construct(ahc, iot, ioh, type, AHC_FNONE); +#ifdef DEBUG /* * Tell the user what type of interrupts we're using. * usefull for debugging irq problems */ printf( "%s: Using %s Interrupts\n", ahc_name(ahc), ahc->pause & IRQMS ? "Level Sensitive" : "Edge Triggered"); +#endif /* * Now that we know we own the resources we need, do the diff --git a/sys/arch/i386/isa/lms.c b/sys/arch/i386/isa/lms.c index 13e56adaa9e..1d5232b0209 100644 --- a/sys/arch/i386/isa/lms.c +++ b/sys/arch/i386/isa/lms.c @@ -1,4 +1,4 @@ -/* $NetBSD: lms.c,v 1.26 1996/05/12 23:12:11 mycroft Exp $ */ +/* $NetBSD: lms.c,v 1.30 1996/10/21 22:27:41 thorpej Exp $ */ /*- * Copyright (c) 1993, 1994 Charles Hannum. @@ -37,7 +37,7 @@ #include <sys/device.h> #include <machine/cpu.h> -#include <machine/bus.old.h> +#include <machine/bus.h> #include <machine/intr.h> #include <machine/mouse.h> #include <machine/conf.h> @@ -58,8 +58,8 @@ struct lms_softc { /* driver status information */ struct device sc_dev; void *sc_ih; - bus_chipset_tag_t sc_bc; /* bus chipset identifier */ - bus_io_handle_t sc_ioh; /* bus i/o handle */ + bus_space_tag_t sc_iot; /* bus i/o space identifier */ + bus_space_handle_t sc_ioh; /* bus i/o handle */ struct clist sc_q; struct selinfo sc_rsel; @@ -90,37 +90,37 @@ lmsprobe(parent, match, aux) void *match, *aux; { struct isa_attach_args *ia = aux; - bus_chipset_tag_t bc = ia->ia_bc; - bus_io_handle_t ioh; + bus_space_tag_t iot = ia->ia_iot; + bus_space_handle_t ioh; int rv; /* Map the i/o space. */ - if (bus_io_map(bc, ia->ia_iobase, LMS_NPORTS, &ioh)) + if (bus_space_map(iot, ia->ia_iobase, LMS_NPORTS, 0, &ioh)) return 0; rv = 0; /* Configure and check for port present. */ - bus_io_write_1(bc, ioh, LMS_CONFIG, 0x91); + bus_space_write_1(iot, ioh, LMS_CONFIG, 0x91); delay(10); - bus_io_write_1(bc, ioh, LMS_SIGN, 0x0c); + bus_space_write_1(iot, ioh, LMS_SIGN, 0x0c); delay(10); - if (bus_io_read_1(bc, ioh, LMS_SIGN) != 0x0c) + if (bus_space_read_1(iot, ioh, LMS_SIGN) != 0x0c) goto out; - bus_io_write_1(bc, ioh, LMS_SIGN, 0x50); + bus_space_write_1(iot, ioh, LMS_SIGN, 0x50); delay(10); - if (bus_io_read_1(bc, ioh, LMS_SIGN) != 0x50) + if (bus_space_read_1(iot, ioh, LMS_SIGN) != 0x50) goto out; /* Disable interrupts. */ - bus_io_write_1(bc, ioh, LMS_CNTRL, 0x10); + bus_space_write_1(iot, ioh, LMS_CNTRL, 0x10); rv = 1; ia->ia_iosize = LMS_NPORTS; ia->ia_msize = 0; out: - bus_io_unmap(bc, ioh, LMS_NPORTS); + bus_space_unmap(iot, ioh, LMS_NPORTS); return rv; } @@ -135,8 +135,9 @@ lmsattach(parent, self, aux) printf("\n"); /* Other initialization was done by lmsprobe. */ - sc->sc_bc = ia->ia_bc; - if (bus_io_map(sc->sc_bc, ia->ia_iobase, LMS_NPORTS, &sc->sc_ioh)) + sc->sc_iot = ia->ia_iot; + if (bus_space_map(sc->sc_iot, ia->ia_iobase, LMS_NPORTS, 0, + &sc->sc_ioh)) panic("lmsattach: couldn't map I/O ports"); sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_PULSE, @@ -170,7 +171,7 @@ lmsopen(dev, flag, mode, p) sc->sc_x = sc->sc_y = 0; /* Enable interrupts. */ - bus_io_write_1(sc->sc_bc, sc->sc_ioh, LMS_CNTRL, 0); + bus_space_write_1(sc->sc_iot, sc->sc_ioh, LMS_CNTRL, 0); return 0; } @@ -185,7 +186,7 @@ lmsclose(dev, flag, mode, p) struct lms_softc *sc = lms_cd.cd_devs[LMSUNIT(dev)]; /* Disable interrupts. */ - bus_io_write_1(sc->sc_bc, sc->sc_ioh, LMS_CNTRL, 0x10); + bus_space_write_1(sc->sc_iot, sc->sc_ioh, LMS_CNTRL, 0x10); sc->sc_state &= ~LMS_OPEN; @@ -300,8 +301,8 @@ lmsintr(arg) void *arg; { struct lms_softc *sc = arg; - bus_chipset_tag_t bc = sc->sc_bc; - bus_io_handle_t ioh = sc->sc_ioh; + bus_space_tag_t iot = sc->sc_iot; + bus_space_handle_t ioh = sc->sc_ioh; u_char hi, lo, buttons, changed; char dx, dy; u_char buffer[5]; @@ -310,22 +311,22 @@ lmsintr(arg) /* Interrupts are not expected. */ return 0; - bus_io_write_1(bc, ioh, LMS_CNTRL, 0xab); - hi = bus_io_read_1(bc, ioh, LMS_DATA); - bus_io_write_1(bc, ioh, LMS_CNTRL, 0x90); - lo = bus_io_read_1(bc, ioh, LMS_DATA); + bus_space_write_1(iot, ioh, LMS_CNTRL, 0xab); + hi = bus_space_read_1(iot, ioh, LMS_DATA); + bus_space_write_1(iot, ioh, LMS_CNTRL, 0x90); + lo = bus_space_read_1(iot, ioh, LMS_DATA); dx = ((hi & 0x0f) << 4) | (lo & 0x0f); /* Bounding at -127 avoids a bug in XFree86. */ dx = (dx == -128) ? -127 : dx; - bus_io_write_1(bc, ioh, LMS_CNTRL, 0xf0); - hi = bus_io_read_1(bc, ioh, LMS_DATA); - bus_io_write_1(bc, ioh, LMS_CNTRL, 0xd0); - lo = bus_io_read_1(bc, ioh, LMS_DATA); + bus_space_write_1(iot, ioh, LMS_CNTRL, 0xf0); + hi = bus_space_read_1(iot, ioh, LMS_DATA); + bus_space_write_1(iot, ioh, LMS_CNTRL, 0xd0); + lo = bus_space_read_1(iot, ioh, LMS_DATA); dy = ((hi & 0x0f) << 4) | (lo & 0x0f); dy = (dy == -128) ? 127 : -dy; - bus_io_write_1(bc, ioh, LMS_CNTRL, 0); + bus_space_write_1(iot, ioh, LMS_CNTRL, 0); buttons = (~hi >> 5) & 0x07; changed = ((buttons ^ sc->sc_status) & 0x07) << 3; diff --git a/sys/arch/i386/isa/pccom.c b/sys/arch/i386/isa/pccom.c index 2beaeb78ba5..4d52e1b31b6 100644 --- a/sys/arch/i386/isa/pccom.c +++ b/sys/arch/i386/isa/pccom.c @@ -1,4 +1,4 @@ -/* $OpenBSD: pccom.c,v 1.6 1996/11/12 20:30:05 niklas Exp $ */ +/* $OpenBSD: pccom.c,v 1.7 1996/11/28 23:37:41 niklas Exp $ */ /* $NetBSD: com.c,v 1.82.4.1 1996/06/02 09:08:00 mrg Exp $ */ /*- @@ -57,7 +57,7 @@ #include <sys/device.h> #include <machine/intr.h> -#include <machine/bus.old.h> +#include <machine/bus.h> #include <dev/isa/isavar.h> #include <dev/isa/comreg.h> @@ -73,7 +73,8 @@ struct com_softc { struct device sc_dev; void *sc_ih; - bus_chipset_tag_t sc_bc; + bus_space_tag_t sc_iot; + isa_chipset_tag_t sc_ic; struct tty *sc_tty; int sc_overflows; @@ -87,8 +88,8 @@ struct com_softc { int sc_hayespbase; #endif - bus_io_handle_t sc_ioh; - bus_io_handle_t sc_hayespioh; + bus_space_handle_t sc_ioh; + bus_space_handle_t sc_hayespioh; u_char sc_hwflags; #define COM_HW_NOIEN 0x01 @@ -121,9 +122,9 @@ struct com_softc { }; #ifdef COM_HAYESP -int comprobeHAYESP __P((bus_io_handle_t hayespioh, struct com_softc *sc)); +int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); #endif -void comdiag __P((void *)); +void comdiag __P((void *)); int comspeed __P((long)); int comparam __P((struct tty *, struct termios *)); void comstart __P((struct tty *)); @@ -168,7 +169,7 @@ struct cfdriver pccom_cd = { NULL, "pccom", DV_TTY }; -void cominit __P((bus_chipset_tag_t, bus_io_handle_t, int)); +void cominit __P((bus_space_tag_t, bus_space_handle_t, int)); #ifndef CONSPEED #define CONSPEED B9600 @@ -182,8 +183,8 @@ int comdefaultrate = TTYDEF_SPEED; int comconsaddr; int comconsinit; int comconsattached; -bus_chipset_tag_t comconsbc; -bus_io_handle_t comconsioh; +bus_space_tag_t comconsiot; +bus_space_handle_t comconsioh; tcflag_t comconscflag = TTYDEF_CFLAG; int commajor; @@ -299,6 +300,7 @@ com_pcmcia_isa_attach(parent, match, aux, pc_link) (sc->sc_hwflags & (COM_HW_ABSENT_PENDING|COM_HW_CONSOLE)); } else sc->sc_hwflags = 0; + sc->sc_ic = ia->ia_ic; } return rval; } @@ -344,7 +346,7 @@ com_pcmcia_remove(pc_link, self) ttyfree(sc->sc_tty); sc->sc_tty = NULL; ok: - isa_intr_disestablish(sc->sc_bc, sc->sc_ih); + isa_intr_disestablish(sc->sc_ic, sc->sc_ih); sc->sc_ih = NULL; SET(sc->sc_hwflags, COM_HW_ABSENT); return 0; /* OK! */ @@ -425,20 +427,20 @@ comspeed(speed) } int -comprobe1(bc, ioh, iobase) - bus_chipset_tag_t bc; - bus_io_handle_t ioh; +comprobe1(iot, ioh, iobase) + bus_space_tag_t iot; + bus_space_handle_t ioh; int iobase; { int i, k; /* force access to id reg */ - bus_io_write_1(bc, ioh, com_lcr, 0); - bus_io_write_1(bc, ioh, com_iir, 0); + bus_space_write_1(iot, ioh, com_lcr, 0); + bus_space_write_1(iot, ioh, com_iir, 0); for (i = 0; i < 32; i++) { - k = bus_io_read_1(bc, ioh, com_iir); + k = bus_space_read_1(iot, ioh, com_iir); if (k & 0x38) { - bus_io_read_1(bc, ioh, com_data); /* cleanup */ + bus_space_read_1(iot, ioh, com_data); /* cleanup */ } else break; } @@ -451,12 +453,12 @@ comprobe1(bc, ioh, iobase) #ifdef COM_HAYESP int comprobeHAYESP(hayespioh, sc) - bus_io_handle_t hayespioh; + bus_space_handle_t hayespioh; struct com_softc *sc; { char val, dips; int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; - bus_chipset_tag_t bc = sc->sc_bc; + bus_space_tag_t iot = sc->sc_iot; /* * Hayes ESP cards have two iobases. One is for compatibility with @@ -466,7 +468,7 @@ comprobeHAYESP(hayespioh, sc) */ /* Test for ESP signature */ - if ((bus_io_read_1(bc, hayespioh, 0) & 0xf3) == 0) + if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) return 0; /* @@ -474,8 +476,8 @@ comprobeHAYESP(hayespioh, sc) */ /* Get the dip-switch configurations */ - bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); - dips = bus_io_read_1(bc, hayespioh, HAYESP_STATUS1); + bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); + dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Determine which com port this ESP card services: bits 0,1 of */ /* dips is the port # (0-3); combaselist[val] is the com_iobase */ @@ -486,9 +488,9 @@ comprobeHAYESP(hayespioh, sc) /* Check ESP Self Test bits. */ /* Check for ESP version 2.0: bits 4,5,6 == 010 */ - bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); - val = bus_io_read_1(bc, hayespioh, HAYESP_STATUS1); /* Clear reg 1 */ - val = bus_io_read_1(bc, hayespioh, HAYESP_STATUS2); + bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); + val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg 1 */ + val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); if ((val & 0x70) < 0x20) { printf("-old (%o)", val & 0x70); /* we do not support the necessary features */ @@ -518,8 +520,8 @@ comprobe(parent, match, aux) struct device *parent; void *match, *aux; { - bus_chipset_tag_t bc; - bus_io_handle_t ioh; + bus_space_tag_t iot; + bus_space_handle_t ioh; int iobase, needioh; int rv = 1; @@ -540,7 +542,7 @@ comprobe(parent, match, aux) if (IS_ISA(parent)) { struct isa_attach_args *ia = aux; - bc = ia->ia_bc; + iot = ia->ia_iot; iobase = ia->ia_iobase; needioh = 1; } else @@ -553,7 +555,7 @@ comprobe(parent, match, aux) if (cf->cf_loc[0] != -1 && cf->cf_loc[0] != ca->ca_slave) return (0); - bc = ca->ca_bc; + iot = ca->ca_iot; iobase = ca->ca_iobase; ioh = ca->ca_ioh; needioh = 0; @@ -565,13 +567,13 @@ comprobe(parent, match, aux) if (iobase == comconsaddr && !comconsattached) goto out; - if (needioh && bus_io_map(bc, iobase, COM_NPORTS, &ioh)) { + if (needioh && bus_space_map(iot, iobase, COM_NPORTS, &ioh)) { rv = 0; goto out; } - rv = comprobe1(bc, ioh, iobase); + rv = comprobe1(iot, ioh, iobase); if (needioh) - bus_io_unmap(bc, ioh, COM_NPORTS); + bus_space_unmap(iot, ioh, COM_NPORTS); out: #if NPCCOM_ISA || NPCCOM_PCMCIA @@ -592,8 +594,8 @@ comattach(parent, self, aux) { struct com_softc *sc = (void *)self; int iobase, irq; - bus_chipset_tag_t bc; - bus_io_handle_t ioh; + bus_space_tag_t iot; + bus_space_handle_t ioh; #ifdef COM_HAYESP int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; int *hayespp; @@ -620,9 +622,9 @@ comattach(parent, self, aux) * We're living on an isa. */ iobase = ia->ia_iobase; - bc = ia->ia_bc; + iot = ia->ia_iot; if (iobase != comconsaddr) { - if (bus_io_map(bc, iobase, COM_NPORTS, &ioh)) + if (bus_space_map(iot, iobase, COM_NPORTS, &ioh)) panic("comattach: io mapping failed"); } else ioh = comconsioh; @@ -637,7 +639,7 @@ comattach(parent, self, aux) * We're living on a commulti. */ iobase = ca->ca_iobase; - bc = ca->ca_bc; + iot = ca->ca_iot; ioh = ca->ca_ioh; irq = IRQUNK; @@ -647,7 +649,7 @@ comattach(parent, self, aux) #endif panic("comattach: impossible"); - sc->sc_bc = bc; + sc->sc_iot = iot; sc->sc_ioh = ioh; sc->sc_iobase = iobase; @@ -667,10 +669,10 @@ comattach(parent, self, aux) #ifdef COM_HAYESP /* Look for a Hayes ESP board. */ for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { - bus_io_handle_t hayespioh; + bus_space_handle_t hayespioh; #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ - if (bus_io_map(bc, *hayespp, HAYESP_NPORTS, &hayespioh)) + if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, &hayespioh)) continue; if (comprobeHAYESP(hayespioh, sc)) { sc->sc_hayespbase = *hayespp; @@ -678,7 +680,7 @@ comattach(parent, self, aux) sc->sc_fifolen = 1024; break; } - bus_io_unmap(bc, hayespioh, HAYESP_NPORTS); + bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); } /* No ESP; look for other things. */ if (*hayespp == 0) { @@ -686,12 +688,12 @@ comattach(parent, self, aux) sc->sc_fifolen = 1; /* look for a NS 16550AF UART with FIFOs */ - bus_io_write_1(bc, ioh, com_fifo, + bus_space_write_1(iot, ioh, com_fifo, FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); delay(100); - if (ISSET(bus_io_read_1(bc, ioh, com_iir), IIR_FIFO_MASK) == + if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) == IIR_FIFO_MASK) - if (ISSET(bus_io_read_1(bc, ioh, com_fifo), FIFO_TRIGGER_14) == + if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) == FIFO_TRIGGER_14) { SET(sc->sc_hwflags, COM_HW_FIFO); printf(": ns16550a, working fifo\n"); @@ -700,14 +702,14 @@ comattach(parent, self, aux) printf(": ns16550, broken fifo\n"); else printf(": ns8250 or ns16450, no fifo\n"); - bus_io_write_1(bc, ioh, com_fifo, 0); + bus_space_write_1(iot, ioh, com_fifo, 0); #ifdef COM_HAYESP } #endif /* disable interrupts */ - bus_io_write_1(bc, ioh, com_ier, 0); - bus_io_write_1(bc, ioh, com_mcr, 0); + bus_space_write_1(iot, ioh, com_ier, 0); + bus_space_write_1(iot, ioh, com_mcr, 0); if (irq != IRQUNK) { #if NPCCOM_ISA || NPCCOM_PCMCIA @@ -727,7 +729,7 @@ comattach(parent, self, aux) if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) kgdb_dev = -1; /* can't debug over console port */ else { - cominit(bc, ioh, kgdb_rate); + cominit(iot, ioh, kgdb_rate); if (kgdb_debug_init) { /* * Print prefix of device name, @@ -755,8 +757,8 @@ comopen(dev, flag, mode, p) { int unit = DEVUNIT(dev); struct com_softc *sc; - bus_chipset_tag_t bc; - bus_io_handle_t ioh; + bus_space_tag_t iot; + bus_space_handle_t ioh; struct tty *tp; int s; int error = 0; @@ -805,37 +807,37 @@ comopen(dev, flag, mode, p) sc->sc_rxput = sc->sc_rxget = sc->sc_tbc = 0; - bc = sc->sc_bc; + iot = sc->sc_iot; ioh = sc->sc_ioh; #ifdef COM_HAYESP /* Setup the ESP board */ if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { - bus_io_handle_t hayespioh = sc->sc_hayespioh; + bus_space_handle_t hayespioh = sc->sc_hayespioh; - bus_io_write_1(bc, ioh, com_fifo, + bus_space_write_1(iot, ioh, com_fifo, FIFO_DMA_MODE|FIFO_ENABLE| FIFO_RCV_RST|FIFO_XMT_RST|FIFO_TRIGGER_8); /* Set 16550 compatibility mode */ - bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_SETMODE); - bus_io_write_1(bc, hayespioh, HAYESP_CMD2, + bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETMODE); + bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_MODE_FIFO|HAYESP_MODE_RTS| HAYESP_MODE_SCALE); /* Set RTS/CTS flow control */ - bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_SETFLOWTYPE); - bus_io_write_1(bc, hayespioh, HAYESP_CMD2, HAYESP_FLOW_RTS); - bus_io_write_1(bc, hayespioh, HAYESP_CMD2, HAYESP_FLOW_CTS); + bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETFLOWTYPE); + bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_RTS); + bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_CTS); /* Set flow control levels */ - bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_SETRXFLOW); - bus_io_write_1(bc, hayespioh, HAYESP_CMD2, + bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETRXFLOW); + bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_HIBYTE(HAYESP_RXHIWMARK)); - bus_io_write_1(bc, hayespioh, HAYESP_CMD2, + bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_LOBYTE(HAYESP_RXHIWMARK)); - bus_io_write_1(bc, hayespioh, HAYESP_CMD2, + bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_HIBYTE(HAYESP_RXLOWMARK)); - bus_io_write_1(bc, hayespioh, HAYESP_CMD2, + bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_LOBYTE(HAYESP_RXLOWMARK)); } else #endif @@ -852,32 +854,32 @@ comopen(dev, flag, mode, p) * Set the FIFO threshold based on the receive speed. */ for (;;) { - bus_io_write_1(bc, ioh, com_fifo, 0); + bus_space_write_1(iot, ioh, com_fifo, 0); delay(100); - (void) bus_io_read_1(bc, ioh, com_data); - bus_io_write_1(bc, ioh, com_fifo, + (void) bus_space_read_1(iot, ioh, com_data); + bus_space_write_1(iot, ioh, com_fifo, FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | (tp->t_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8)); delay(100); - if(!ISSET(bus_io_read_1(bc, ioh, + if(!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) break; } } /* flush any pending I/O */ - while (ISSET(bus_io_read_1(bc, ioh, com_lsr), LSR_RXRDY)) - (void) bus_io_read_1(bc, ioh, com_data); + while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) + (void) bus_space_read_1(iot, ioh, com_data); /* you turn me on, baby */ sc->sc_mcr = MCR_DTR | MCR_RTS; if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) SET(sc->sc_mcr, MCR_IENABLE); - bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); + bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; - bus_io_write_1(bc, ioh, com_ier, sc->sc_ier); + bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); - sc->sc_msr = bus_io_read_1(bc, ioh, com_msr); + sc->sc_msr = bus_space_read_1(iot, ioh, com_msr); if (ISSET(sc->sc_swflags, COM_SW_SOFTCAR) || DEVCUA(dev) || ISSET(sc->sc_msr, MSR_DCD) || ISSET(tp->t_cflag, MDMBUF)) SET(tp->t_state, TS_CARR_ON); @@ -935,8 +937,8 @@ comclose(dev, flag, mode, p) int unit = DEVUNIT(dev); struct com_softc *sc = pccom_cd.cd_devs[unit]; struct tty *tp = sc->sc_tty; - bus_chipset_tag_t bc = sc->sc_bc; - bus_io_handle_t ioh = sc->sc_ioh; + bus_space_tag_t iot = sc->sc_iot; + bus_space_handle_t ioh = sc->sc_ioh; int s; /* XXX This is for cons.c. */ @@ -948,19 +950,19 @@ comclose(dev, flag, mode, p) if (!ISSET(sc->sc_hwflags, COM_HW_ABSENT|COM_HW_ABSENT_PENDING)) { /* can't do any of this stuff .... */ CLR(sc->sc_lcr, LCR_SBREAK); - bus_io_write_1(bc, ioh, com_lcr, sc->sc_lcr); - bus_io_write_1(bc, ioh, com_ier, 0); + bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); + bus_space_write_1(iot, ioh, com_ier, 0); if (ISSET(tp->t_cflag, HUPCL) && !ISSET(sc->sc_swflags, COM_SW_SOFTCAR)) { /* XXX perhaps only clear DTR */ - bus_io_write_1(bc, ioh, com_mcr, 0); + bus_space_write_1(iot, ioh, com_mcr, 0); } } CLR(tp->t_state, TS_BUSY | TS_FLUSH); /* * FIFO off */ - bus_io_write_1(bc, ioh, com_fifo, 0); + bus_space_write_1(iot, ioh, com_fifo, 0); sc->sc_cua = 0; splx(s); ttyclose(tp); @@ -1053,8 +1055,8 @@ comioctl(dev, cmd, data, flag, p) int unit = DEVUNIT(dev); struct com_softc *sc = pccom_cd.cd_devs[unit]; struct tty *tp = sc->sc_tty; - bus_chipset_tag_t bc = sc->sc_bc; - bus_io_handle_t ioh = sc->sc_ioh; + bus_space_tag_t iot = sc->sc_iot; + bus_space_handle_t ioh = sc->sc_ioh; int error; if (ISSET(sc->sc_hwflags, COM_HW_ABSENT|COM_HW_ABSENT_PENDING)) { @@ -1074,29 +1076,29 @@ comioctl(dev, cmd, data, flag, p) switch (cmd) { case TIOCSBRK: SET(sc->sc_lcr, LCR_SBREAK); - bus_io_write_1(bc, ioh, com_lcr, sc->sc_lcr); + bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); break; case TIOCCBRK: CLR(sc->sc_lcr, LCR_SBREAK); - bus_io_write_1(bc, ioh, com_lcr, sc->sc_lcr); + bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); break; case TIOCSDTR: SET(sc->sc_mcr, sc->sc_dtr); - bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); + bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); break; case TIOCCDTR: CLR(sc->sc_mcr, sc->sc_dtr); - bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); + bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); break; case TIOCMSET: CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); case TIOCMBIS: SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); - bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); + bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); break; case TIOCMBIC: CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data)); - bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); + bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); break; case TIOCMGET: { u_char m; @@ -1116,7 +1118,7 @@ comioctl(dev, cmd, data, flag, p) SET(bits, TIOCM_DSR); if (ISSET(m, MSR_RI | MSR_TERI)) SET(bits, TIOCM_RI); - if (bus_io_read_1(bc, ioh, com_ier)) + if (bus_space_read_1(iot, ioh, com_ier)) SET(bits, TIOCM_LE); *(int *)data = bits; break; @@ -1171,8 +1173,8 @@ comparam(tp, t) struct termios *t; { struct com_softc *sc = pccom_cd.cd_devs[DEVUNIT(tp->t_dev)]; - bus_chipset_tag_t bc = sc->sc_bc; - bus_io_handle_t ioh = sc->sc_ioh; + bus_space_tag_t iot = sc->sc_iot; + bus_space_handle_t ioh = sc->sc_ioh; int ospeed = comspeed(t->c_ospeed); u_char lcr; tcflag_t oldcflag; @@ -1219,7 +1221,7 @@ comparam(tp, t) if (ospeed == 0) { CLR(sc->sc_mcr, MCR_DTR); - bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); + bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); } /* @@ -1252,34 +1254,34 @@ comparam(tp, t) } } - bus_io_write_1(bc, ioh, com_lcr, lcr | LCR_DLAB); - bus_io_write_1(bc, ioh, com_dlbl, ospeed); - bus_io_write_1(bc, ioh, com_dlbh, ospeed >> 8); - bus_io_write_1(bc, ioh, com_lcr, lcr); + bus_space_write_1(iot, ioh, com_lcr, lcr | LCR_DLAB); + bus_space_write_1(iot, ioh, com_dlbl, ospeed); + bus_space_write_1(iot, ioh, com_dlbh, ospeed >> 8); + bus_space_write_1(iot, ioh, com_lcr, lcr); SET(sc->sc_mcr, MCR_DTR); - bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); + bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); } else - bus_io_write_1(bc, ioh, com_lcr, lcr); + bus_space_write_1(iot, ioh, com_lcr, lcr); if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP) && ISSET(sc->sc_hwflags, COM_HW_FIFO)) - bus_io_write_1(bc, ioh, com_fifo, + bus_space_write_1(iot, ioh, com_fifo, FIFO_ENABLE | (t->c_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8)); } else - bus_io_write_1(bc, ioh, com_lcr, lcr); + bus_space_write_1(iot, ioh, com_lcr, lcr); /* When not using CRTSCTS, RTS follows DTR. */ if (!ISSET(t->c_cflag, CRTSCTS)) { if (ISSET(sc->sc_mcr, MCR_DTR)) { if (!ISSET(sc->sc_mcr, MCR_RTS)) { SET(sc->sc_mcr, MCR_RTS); - bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); + bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); } } else { if (ISSET(sc->sc_mcr, MCR_RTS)) { CLR(sc->sc_mcr, MCR_RTS); - bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); + bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); } } sc->sc_dtr = MCR_DTR | MCR_RTS; @@ -1301,7 +1303,7 @@ comparam(tp, t) ISSET(oldcflag, MDMBUF) != ISSET(tp->t_cflag, MDMBUF) && (*linesw[tp->t_line].l_modem)(tp, 0) == 0) { CLR(sc->sc_mcr, sc->sc_dtr); - bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); + bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); } /* Just to be sure... */ @@ -1331,8 +1333,8 @@ comhwiflow(tp, block) int block; { struct com_softc *sc = pccom_cd.cd_devs[DEVUNIT(tp->t_dev)]; - bus_chipset_tag_t bc = sc->sc_bc; - bus_io_handle_t ioh = sc->sc_ioh; + bus_space_tag_t iot = sc->sc_iot; + bus_space_handle_t ioh = sc->sc_ioh; int s; /* @@ -1344,22 +1346,22 @@ comhwiflow(tp, block) /* When not using CRTSCTS, RTS follows DTR. */ if (ISSET(tp->t_cflag, MDMBUF)) { CLR(sc->sc_mcr, (MCR_DTR | MCR_RTS)); - bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); + bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); } else { CLR(sc->sc_mcr, MCR_RTS); - bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); + bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); } } else { /* When not using CRTSCTS, RTS follows DTR. */ if (ISSET(tp->t_cflag, MDMBUF)) { SET(sc->sc_mcr, (MCR_DTR | MCR_RTS)); - bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); + bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); } else { SET(sc->sc_mcr, MCR_RTS); - bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr); + bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr); } } splx(s); @@ -1372,8 +1374,8 @@ comstart(tp) struct tty *tp; { struct com_softc *sc = pccom_cd.cd_devs[DEVUNIT(tp->t_dev)]; - bus_chipset_tag_t bc = sc->sc_bc; - bus_io_handle_t ioh = sc->sc_ioh; + bus_space_tag_t iot = sc->sc_iot; + bus_space_handle_t ioh = sc->sc_ioh; int s, count; s = spltty(); @@ -1408,14 +1410,14 @@ comstart(tp) SET(tp->t_state, TS_BUSY); if (!ISSET(sc->sc_ier, IER_ETXRDY)) { SET(sc->sc_ier, IER_ETXRDY); - bus_io_write_1(bc, ioh, com_ier, sc->sc_ier); + bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); } n = sc->sc_fifolen; if (n > count) n = count; sc->sc_tba = tp->t_outq.c_cf; while (--n >= 0) { - bus_io_write_1(bc, ioh, com_data, *sc->sc_tba++); + bus_space_write_1(iot, ioh, com_data, *sc->sc_tba++); --count; } sc->sc_tbc = count; @@ -1424,7 +1426,7 @@ comstart(tp) stopped: if (ISSET(sc->sc_ier, IER_ETXRDY)) { CLR(sc->sc_ier, IER_ETXRDY); - bus_io_write_1(bc, ioh, com_ier, sc->sc_ier); + bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); } out: splx(s); @@ -1554,7 +1556,7 @@ comsoft() line->l_modem(tp, 1); else if (line->l_modem(tp, 0) == 0) { CLR(sc->sc_mcr, sc->sc_dtr); - bus_io_write_1(sc->sc_bc, + bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); @@ -1580,12 +1582,12 @@ comintr(arg) { struct com_softc *sc = arg; struct tty *tp = sc->sc_tty; - bus_chipset_tag_t bc = sc->sc_bc; - bus_io_handle_t ioh = sc->sc_ioh; + bus_space_tag_t iot = sc->sc_iot; + bus_space_handle_t ioh = sc->sc_ioh; u_char lsr; u_int rxput; - if (ISSET(bus_io_read_1(bc, ioh, com_iir), IIR_NOPEND)) + if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_NOPEND)) return (0); rxput = sc->sc_rxput; @@ -1593,15 +1595,15 @@ comintr(arg) u_char msr, delta; for (;;) { - lsr = bus_io_read_1(bc, ioh, com_lsr); + lsr = bus_space_read_1(iot, ioh, com_lsr); if (!ISSET(lsr, LSR_RCV_MASK)) break; sc->sc_rxbuf[rxput] = lsr; rxput = (rxput + 1) & RBUFMASK; - sc->sc_rxbuf[rxput] = bus_io_read_1(bc, ioh, com_data); + sc->sc_rxbuf[rxput] = bus_space_read_1(iot, ioh, com_data); rxput = (rxput + 1) & RBUFMASK; } - msr = bus_io_read_1(bc, ioh, com_msr); + msr = bus_space_read_1(iot, ioh, com_msr); delta = msr ^ sc->sc_msr; if (!ISSET(delta, MSR_DCD | MSR_CTS | MSR_RI | MSR_DSR)) continue; @@ -1619,7 +1621,7 @@ comintr(arg) rxput = (rxput + 1) & RBUFMASK; sc->sc_rxbuf[rxput] = msr; rxput = (rxput + 1) & RBUFMASK; - } while (!ISSET(bus_io_read_1(bc, ioh, com_iir), IIR_NOPEND)); + } while (!ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_NOPEND)); if (ISSET(lsr, LSR_TXRDY)) { if (sc->sc_tbc > 0) { int n; @@ -1628,7 +1630,7 @@ comintr(arg) if (n > sc->sc_tbc) n = sc->sc_tbc; while (--n >= 0) { - bus_io_write_1(bc, ioh, com_data, *sc->sc_tba++); + bus_space_write_1(iot, ioh, com_data, *sc->sc_tba++); --sc->sc_tbc; } } @@ -1669,16 +1671,16 @@ comcnprobe(cp) struct consdev *cp; { /* XXX NEEDS TO BE FIXED XXX */ - bus_chipset_tag_t bc = 0; - bus_io_handle_t ioh; + bus_space_tag_t iot = 0; + bus_space_handle_t ioh; int found; - if (bus_io_map(bc, CONADDR, COM_NPORTS, &ioh)) { + if (bus_space_map(iot, CONADDR, COM_NPORTS, &ioh)) { cp->cn_pri = CN_DEAD; return; } - found = comprobe1(bc, ioh, CONADDR); - bus_io_unmap(bc, ioh, COM_NPORTS); + found = comprobe1(iot, ioh, CONADDR); + bus_space_unmap(iot, ioh, COM_NPORTS); if (!found) { cp->cn_pri = CN_DEAD; return; @@ -1705,33 +1707,33 @@ comcninit(cp) #if 0 XXX NEEDS TO BE FIXED XXX - comconsbc = ???; + comconsiot = ???; #endif - if (bus_io_map(comconsbc, CONADDR, COM_NPORTS, &comconsioh)) + if (bus_space_map(comconsiot, CONADDR, COM_NPORTS, &comconsioh)) panic("comcninit: mapping failed"); - cominit(comconsbc, comconsioh, comdefaultrate); + cominit(comconsiot, comconsioh, comdefaultrate); comconsaddr = CONADDR; comconsinit = 0; } void -cominit(bc, ioh, rate) - bus_chipset_tag_t bc; - bus_io_handle_t ioh; +cominit(iot, ioh, rate) + bus_space_tag_t iot; + bus_space_handle_t ioh; int rate; { int s = splhigh(); u_char stat; - bus_io_write_1(bc, ioh, com_lcr, LCR_DLAB); + bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); rate = comspeed(comdefaultrate); - bus_io_write_1(bc, ioh, com_dlbl, rate); - bus_io_write_1(bc, ioh, com_dlbh, rate >> 8); - bus_io_write_1(bc, ioh, com_lcr, LCR_8BITS); - bus_io_write_1(bc, ioh, com_ier, IER_ERXRDY | IER_ETXRDY); - bus_io_write_1(bc, ioh, com_fifo, FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_4); - stat = bus_io_read_1(bc, ioh, com_iir); + bus_space_write_1(iot, ioh, com_dlbl, rate); + bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); + bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); + bus_space_write_1(iot, ioh, com_ier, IER_ERXRDY | IER_ETXRDY); + bus_space_write_1(iot, ioh, com_fifo, FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_4); + stat = bus_space_read_1(iot, ioh, com_iir); splx(s); } @@ -1740,14 +1742,14 @@ comcngetc(dev) dev_t dev; { int s = splhigh(); - bus_chipset_tag_t bc = comconsbc; - bus_io_handle_t ioh = comconsioh; + bus_space_tag_t iot = comconsiot; + bus_space_handle_t ioh = comconsioh; u_char stat, c; - while (!ISSET(stat = bus_io_read_1(bc, ioh, com_lsr), LSR_RXRDY)) + while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) ; - c = bus_io_read_1(bc, ioh, com_data); - stat = bus_io_read_1(bc, ioh, com_iir); + c = bus_space_read_1(iot, ioh, com_data); + stat = bus_space_read_1(iot, ioh, com_iir); splx(s); return c; } @@ -1761,8 +1763,8 @@ comcnputc(dev, c) int c; { int s = splhigh(); - bus_chipset_tag_t bc = comconsbc; - bus_io_handle_t ioh = comconsioh; + bus_space_tag_t iot = comconsiot; + bus_space_handle_t ioh = comconsioh; u_char stat; register int timo; @@ -1770,20 +1772,20 @@ comcnputc(dev, c) if (dev != kgdb_dev) #endif if (comconsinit == 0) { - cominit(bc, ioh, comdefaultrate); + cominit(iot, ioh, comdefaultrate); comconsinit = 1; } /* wait for any pending transmission to finish */ timo = 50000; - while (!ISSET(stat = bus_io_read_1(bc, ioh, com_lsr), LSR_TXRDY) && --timo) + while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) ; - bus_io_write_1(bc, ioh, com_data, c); + bus_space_write_1(iot, ioh, com_data, c); /* wait for this transmission to complete */ timo = 1500000; - while (!ISSET(stat = bus_io_read_1(bc, ioh, com_lsr), LSR_TXRDY) && --timo) + while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) ; /* clear any interrupts generated by this transmission */ - stat = bus_io_read_1(bc, ioh, com_iir); + stat = bus_space_read_1(iot, ioh, com_iir); splx(s); } diff --git a/sys/arch/i386/pci/pci_compat.c b/sys/arch/i386/pci/pci_compat.c index 6ef68db2637..7d27bb97136 100644 --- a/sys/arch/i386/pci/pci_compat.c +++ b/sys/arch/i386/pci/pci_compat.c @@ -1,4 +1,5 @@ -/* $NetBSD: pci_compat.c,v 1.1 1996/03/27 04:01:13 cgd Exp $ */ +/* $OpenBSD: pci_compat.c,v 1.2 1996/11/28 23:37:42 niklas Exp $ */ +/* $NetBSD: pci_compat.c,v 1.4 1996/10/21 22:28:54 thorpej Exp $ */ /* * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. @@ -88,13 +89,13 @@ pci_map_io(tag, reg, iobasep) int reg; int *iobasep; { - bus_io_addr_t ioaddr; - bus_io_size_t iosize; - bus_io_handle_t ioh; + bus_addr_t ioaddr; + bus_size_t iosize; + bus_space_handle_t ioh; if (pci_io_find(NULL, tag, reg, &ioaddr, &iosize)) return (1); - if (bus_io_map(NULL, ioaddr, iosize, &ioh)) + if (bus_space_map(I386_BUS_SPACE_IO, ioaddr, iosize, 0, &ioh)) return (1); *iobasep = ioh; @@ -111,14 +112,15 @@ pci_map_mem(tag, reg, vap, pap) int reg; vm_offset_t *vap, *pap; { - bus_mem_addr_t memaddr; - bus_mem_size_t memsize; - bus_mem_handle_t memh; + bus_addr_t memaddr; + bus_size_t memsize; + bus_space_handle_t memh; int cacheable; if (pci_mem_find(NULL, tag, reg, &memaddr, &memsize, &cacheable)) return (1); - if (bus_mem_map(NULL, memaddr, memsize, cacheable, &memh)) + if (bus_space_map(I386_BUS_SPACE_MEM, memaddr, memsize, + cacheable, &memh)) return (1); *vap = (vm_offset_t)memh; diff --git a/sys/arch/i386/pci/pci_machdep.c b/sys/arch/i386/pci/pci_machdep.c index 9f27116fbae..cafdd18922e 100644 --- a/sys/arch/i386/pci/pci_machdep.c +++ b/sys/arch/i386/pci/pci_machdep.c @@ -1,4 +1,5 @@ -/* $NetBSD: pci_machdep.c,v 1.23 1996/04/11 22:15:33 cgd Exp $ */ +/* $OpenBSD: pci_machdep.c,v 1.9 1996/11/28 23:37:42 niklas Exp $ */ +/* $NetBSD: pci_machdep.c,v 1.26 1996/10/24 12:32:29 fvdl Exp $ */ /* * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. @@ -115,7 +116,9 @@ pci_make_tag(pc, bus, device, function) #endif #if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 1) +#ifndef PCI_CONF_MODE mode1: +#endif if (bus >= 256 || device >= 32 || function >= 8) panic("pci_make_tag: bad request"); @@ -125,7 +128,9 @@ mode1: #endif #if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 2) +#ifndef PCI_CONF_MODE mode2: +#endif if (bus >= 256 || device >= 16 || function >= 8) panic("pci_make_tag: bad request"); @@ -156,7 +161,9 @@ pci_conf_read(pc, tag, reg) #endif #if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 1) +#ifndef PCI_CONF_MODE mode1: +#endif outl(PCI_MODE1_ADDRESS_REG, tag.mode1 | reg); data = inl(PCI_MODE1_DATA_REG); outl(PCI_MODE1_ADDRESS_REG, 0); @@ -164,7 +171,9 @@ mode1: #endif #if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 2) +#ifndef PCI_CONF_MODE mode2: +#endif outb(PCI_MODE2_ENABLE_REG, tag.mode2.enable); outb(PCI_MODE2_FORWARD_REG, tag.mode2.forward); data = inl(tag.mode2.port | reg); @@ -193,14 +202,18 @@ pci_conf_write(pc, tag, reg, data) #endif #if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 1) +#ifndef PCI_CONF_MODE mode1: +#endif outl(PCI_MODE1_ADDRESS_REG, tag.mode1 | reg); outl(PCI_MODE1_DATA_REG, data); outl(PCI_MODE1_ADDRESS_REG, 0); #endif #if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 2) +#ifndef PCI_CONF_MODE mode2: +#endif outb(PCI_MODE2_ENABLE_REG, tag.mode2.enable); outb(PCI_MODE2_FORWARD_REG, tag.mode2.forward); outl(tag.mode2.port | reg, data); |