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authorMiod Vallat <miod@cvs.openbsd.org>2024-11-08 08:44:08 +0000
committerMiod Vallat <miod@cvs.openbsd.org>2024-11-08 08:44:08 +0000
commit7a5e859ee7240f673e89e95c811ce0d4ed779539 (patch)
tree3c886929d6308be4ed3da5a8bd51e11515970d0e /sys/arch
parent379eaa32adcade834a53bd880b613da572133a1a (diff)
Implement interrupt depth counter for sparc64.
Diffstat (limited to 'sys/arch')
-rw-r--r--sys/arch/sparc64/sparc64/intr.c5
-rw-r--r--sys/arch/sparc64/sparc64/locore.s11
2 files changed, 9 insertions, 7 deletions
diff --git a/sys/arch/sparc64/sparc64/intr.c b/sys/arch/sparc64/sparc64/intr.c
index b7b71ec8cdd..fcf04502949 100644
--- a/sys/arch/sparc64/sparc64/intr.c
+++ b/sys/arch/sparc64/sparc64/intr.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: intr.c,v 1.67 2024/03/29 21:29:34 miod Exp $ */
+/* $OpenBSD: intr.c,v 1.68 2024/11/08 08:44:07 miod Exp $ */
/* $NetBSD: intr.c,v 1.39 2001/07/19 23:38:11 eeh Exp $ */
/*
@@ -74,6 +74,7 @@ void intr_ack(struct intrhand *);
int
intr_handler(struct trapframe *tf, struct intrhand *ih)
{
+ struct cpu_info *ci = curcpu();
int rc;
#ifdef MULTIPROCESSOR
int need_lock;
@@ -86,7 +87,9 @@ intr_handler(struct trapframe *tf, struct intrhand *ih)
if (need_lock)
KERNEL_LOCK();
#endif
+ ci->ci_idepth++;
rc = (*ih->ih_fun)(ih->ih_arg ? ih->ih_arg : tf);
+ ci->ci_idepth--;
#ifdef MULTIPROCESSOR
if (need_lock)
KERNEL_UNLOCK();
diff --git a/sys/arch/sparc64/sparc64/locore.s b/sys/arch/sparc64/sparc64/locore.s
index 9a00930ce39..4cb25a39b80 100644
--- a/sys/arch/sparc64/sparc64/locore.s
+++ b/sys/arch/sparc64/sparc64/locore.s
@@ -1,4 +1,4 @@
-/* $OpenBSD: locore.s,v 1.228 2024/11/07 07:29:47 miod Exp $ */
+/* $OpenBSD: locore.s,v 1.229 2024/11/08 08:44:07 miod Exp $ */
/* $NetBSD: locore.s,v 1.137 2001/08/13 06:10:10 jdolecek Exp $ */
/*
@@ -3352,9 +3352,9 @@ sparc_interrupt:
* Set handled_intr_level and save the old one so we can restore it
* later.
*/
- ld [%g7 + CI_HANDLED_INTR_LEVEL], %l7
+ ld [%g7 + CI_HANDLED_INTR_LEVEL], %l0
st %l6, [%g7 + CI_HANDLED_INTR_LEVEL]
- st %l7, [%sp + CC64FSZ + BIAS + SAVED_INTR_LEVEL]
+ st %l0, [%sp + CC64FSZ + BIAS + SAVED_INTR_LEVEL]
sparc_intr_retry:
wr %l3, 0, CLEAR_SOFTINT ! (don't clear possible %tick IRQ)
@@ -3410,15 +3410,14 @@ intrcmplt:
* at this level.
*/
mov 1, %l3 ! Ack softint
- rd SOFTINT, %l7 ! %l5 contains #intr handled.
+ rd SOFTINT, %l7
sll %l3, %l6, %l3 ! Generate IRQ mask
btst %l3, %l7 ! leave mask in %l3 for retry code
bnz,pn %icc, sparc_intr_retry
mov 1, %l5 ! initialize intr count for next run
/* Restore old handled_intr_level */
- ld [%sp + CC64FSZ + BIAS + SAVED_INTR_LEVEL], %l7
- st %l7, [%g7 + CI_HANDLED_INTR_LEVEL]
+ st %l0, [%g7 + CI_HANDLED_INTR_LEVEL]
ldub [%sp + CC64FSZ + BIAS + TF_OLDPIL], %l3 ! restore old %pil
wrpr %g0, PSTATE_KERN, %pstate ! Disable interrupts