get ethernet working on the edgerouter lite

- add atphy(4) to configs
- allow separate rx and tx clock settings
- add phy mapping for the erl
- add tx/rx clock settings for erl

ok miod@ bcallah@

5 files changed, 41 insertions, 16 deletions

diff --git a/sys/arch/octeon/conf/GENERIC b/sys/arch/octeon/conf/GENERIC
index b9a43be8aae..abd06ea47b1 100644
--- a/sys/arch/octeon/conf/GENERIC
+++ b/sys/arch/octeon/conf/GENERIC
@@ -1,4 +1,4 @@
-#	$OpenBSD: GENERIC,v 1.9 2011/06/24 02:18:17 yasuoka Exp $
+#	$OpenBSD: GENERIC,v 1.10 2013/09/19 00:15:59 jmatthew Exp $
 #
 # For further information on compiling OpenBSD kernels, see the config(8)
 # man page.
@@ -44,6 +44,7 @@ cnmac*		at cn30xxgmx?
 
 rgephy*		at mii?
 ukphy*		at mii?
+atphy*		at mii?
 
 # IDE Controller
 pciide*		at pci? flags 0x0000
diff --git a/sys/arch/octeon/conf/RAMDISK b/sys/arch/octeon/conf/RAMDISK
index 7b756f24eff..341d909d617 100644
--- a/sys/arch/octeon/conf/RAMDISK
+++ b/sys/arch/octeon/conf/RAMDISK
@@ -1,4 +1,4 @@
-#	$OpenBSD: RAMDISK,v 1.11 2013/03/26 14:23:19 jasper Exp $
+#	$OpenBSD: RAMDISK,v 1.12 2013/09/19 00:15:59 jmatthew Exp $
 #
 # For further information on compiling OpenBSD kernels, see the config(8)
 # man page.
@@ -64,6 +64,7 @@ cnmac*		at cn30xxgmx?
 
 rgephy*		at mii?
 ukphy*		at mii?
+atphy*		at mii?
 
 pseudo-device	loop		1	# network loopback
 pseudo-device	bpfilter	1	# packet filter
diff --git a/sys/arch/octeon/dev/cn30xxasx.c b/sys/arch/octeon/dev/cn30xxasx.c
index ff0d1427b7d..1ba51971729 100644
--- a/sys/arch/octeon/dev/cn30xxasx.c
+++ b/sys/arch/octeon/dev/cn30xxasx.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cn30xxasx.c,v 1.3 2012/12/05 23:20:14 deraadt Exp $	*/
+/*	$OpenBSD: cn30xxasx.c,v 1.4 2013/09/19 00:15:59 jmatthew Exp $	*/
 
 /*
  * Copyright (c) 2007 Internet Initiative Japan, Inc.
@@ -175,10 +175,10 @@ cn30xxasx_enable_intr(struct cn30xxasx_softc *sc, int enable)
 #endif
 
 int
-cn30xxasx_clk_set(struct cn30xxasx_softc *sc, int setting)
+cn30xxasx_clk_set(struct cn30xxasx_softc *sc, int tx_setting, int rx_setting)
 {
-	_ASX_WR8(sc, ASX0_TX_CLK_SET0_OFFSET + 8 * sc->sc_port, setting);
-	_ASX_WR8(sc, ASX0_RX_CLK_SET0_OFFSET + 8 * sc->sc_port, setting);
+	_ASX_WR8(sc, ASX0_TX_CLK_SET0_OFFSET + 8 * sc->sc_port, tx_setting);
+	_ASX_WR8(sc, ASX0_RX_CLK_SET0_OFFSET + 8 * sc->sc_port, rx_setting);
 	return 0;
 }
 
diff --git a/sys/arch/octeon/dev/cn30xxasxvar.h b/sys/arch/octeon/dev/cn30xxasxvar.h
index f32ad4d0cd7..4c881b24fb0 100644
--- a/sys/arch/octeon/dev/cn30xxasxvar.h
+++ b/sys/arch/octeon/dev/cn30xxasxvar.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cn30xxasxvar.h,v 1.1 2011/06/16 11:22:30 syuu Exp $	*/
+/*	$OpenBSD: cn30xxasxvar.h,v 1.2 2013/09/19 00:15:59 jmatthew Exp $	*/
 
 /*
  * Copyright (c) 2007 Internet Initiative Japan, Inc.
@@ -50,7 +50,7 @@ struct cn30xxasx_attach_args {
 void			cn30xxasx_init(struct cn30xxasx_attach_args *,
 			    struct cn30xxasx_softc **);
 int			cn30xxasx_enable(struct cn30xxasx_softc *, int);
-int			cn30xxasx_clk_set(struct cn30xxasx_softc *, int);
+int			cn30xxasx_clk_set(struct cn30xxasx_softc *, int, int);
 uint64_t		cn30xxasx_int_summary(struct cn30xxasx_softc *sc);
 
 #endif
diff --git a/sys/arch/octeon/dev/cn30xxgmx.c b/sys/arch/octeon/dev/cn30xxgmx.c
index 7c9dae16a10..4ddcdb15215 100644
--- a/sys/arch/octeon/dev/cn30xxgmx.c
+++ b/sys/arch/octeon/dev/cn30xxgmx.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cn30xxgmx.c,v 1.6 2013/09/16 20:52:13 jmatthew Exp $	*/
+/*	$OpenBSD: cn30xxgmx.c,v 1.7 2013/09/19 00:15:59 jmatthew Exp $	*/
 
 /*
  * Copyright (c) 2007 Internet Initiative Japan, Inc.
@@ -41,6 +41,7 @@
 
 #include <machine/bus.h>
 #include <machine/octeon_model.h>
+#include <machine/octeonvar.h>
 
 #include <octeon/dev/iobusvar.h>
 #include <octeon/dev/cn30xxciureg.h>
@@ -190,9 +191,19 @@ cn30xxgmx_match(struct device *parent, void *match, void *aux)
 static int
 cn30xxgmx_port_phy_addr(int port)
 {
-	if (port >= nitems(octeon_eth_phy_table))
-		return -1;
-	return octeon_eth_phy_table[port];
+	extern struct boot_info *octeon_boot_info;
+
+	switch (octeon_boot_info->board_type) {
+	case BOARD_TYPE_UBIQUITI_E100:
+		if (port > 2)
+			return -1;
+		return 7 - port;
+
+	default:
+		if (port >= nitems(octeon_eth_phy_table))
+			return -1;
+		return octeon_eth_phy_table[port];
+	}
 }
 
 static void
@@ -977,7 +988,9 @@ cn30xxgmx_rgmii_speed_speed(struct cn30xxgmx_port_softc *sc)
 static int
 cn30xxgmx_rgmii_timing(struct cn30xxgmx_port_softc *sc)
 {
-	int clk_set_setting;
+	extern struct boot_info *octeon_boot_info;
+	int clk_tx_setting;
+	int clk_rx_setting;
 	uint64_t rx_frm_ctl;
 
 	/* RGMII TX Threshold Registers, CN30XX-HM-1.0;
@@ -1022,15 +1035,25 @@ cn30xxgmx_rgmii_timing(struct cn30xxgmx_port_softc *sc)
 		/*
 		 * Table.4-6, Summary of ASX Registers, SEIL_HS_v03;
 		 */
-		clk_set_setting = 0;
+		clk_tx_setting = 0;
+		clk_rx_setting = 0;
 		break;
 	default:
 		/* Default parameter of CN30XX */
-		clk_set_setting = 24;
+		clk_tx_setting = 24;
+		clk_rx_setting = 24;
+		break;
+	}
+	
+	/* board specific overrides */
+	switch (octeon_boot_info->board_type) {
+	case BOARD_TYPE_UBIQUITI_E100:
+		clk_tx_setting = 16;
+		clk_rx_setting = 0;
 		break;
 	}
 
-	cn30xxasx_clk_set(sc->sc_port_asx, clk_set_setting);
+	cn30xxasx_clk_set(sc->sc_port_asx, clk_tx_setting, clk_rx_setting);
 
 	return 0;
 }