diff options
| author | Dave Voutila <dv@cvs.openbsd.org> | 2023-04-14 18:27:32 +0000 |
|---|---|---|
| committer | Dave Voutila <dv@cvs.openbsd.org> | 2023-04-14 18:27:32 +0000 |
| commit | a101fdac6b5d137d0784b8964539a905ddb73659 (patch) | |
| tree | 0d7fac7bad969e0ec4ea7c2e4ac4adf3ef20b6bb /sys/arch | |
| parent | 2b9dace01cec9a28e65bfee1c727b01af651feae (diff) | |
add VMX/VMCS defines for amd64 endbr64 features
"these are fine," mlarkin@
Diffstat (limited to 'sys/arch')
| -rw-r--r-- | sys/arch/amd64/include/specialreg.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/sys/arch/amd64/include/specialreg.h b/sys/arch/amd64/include/specialreg.h index 2dee8d14f24..30ac4e5dcd1 100644 --- a/sys/arch/amd64/include/specialreg.h +++ b/sys/arch/amd64/include/specialreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: specialreg.h,v 1.99 2023/03/26 18:12:45 mlarkin Exp $ */ +/* $OpenBSD: specialreg.h,v 1.100 2023/04/14 18:27:31 dv Exp $ */ /* $NetBSD: specialreg.h,v 1.1 2003/04/26 18:39:48 fvdl Exp $ */ /* $NetBSD: x86/specialreg.h,v 1.2 2003/04/25 21:54:30 fvdl Exp $ */ @@ -1044,6 +1044,7 @@ #define IA32_VMX_SAVE_VMX_PREEMPTION_TIMER (1ULL << 22) #define IA32_VMX_CLEAR_IA32_BNDCFGS_ON_EXIT (1ULL << 23) #define IA32_VMX_CONCEAL_VM_EXITS_FROM_PT (1ULL << 24) +#define IA32_VMX_LOAD_HOST_CET_STATE (1ULL << 28) /* VMX: IA32_VMX_ENTRY_CTLS bits */ #define IA32_VMX_LOAD_DEBUG_CONTROLS (1ULL << 2) @@ -1055,6 +1056,7 @@ #define IA32_VMX_LOAD_IA32_EFER_ON_ENTRY (1ULL << 15) #define IA32_VMX_LOAD_IA32_BNDCFGS_ON_ENTRY (1ULL << 16) #define IA32_VMX_CONCEAL_VM_ENTRIES_FROM_PT (1ULL << 17) +#define IA32_VMX_LOAD_GUEST_CET_STATE (1ULL << 20) /* * VMX : VMCS Fields @@ -1230,6 +1232,7 @@ #define VMCS_GUEST_PENDING_DBG_EXC 0x6822 #define VMCS_GUEST_IA32_SYSENTER_ESP 0x6824 #define VMCS_GUEST_IA32_SYSENTER_EIP 0x6826 +#define VMCS_GUEST_IA32_S_CET 0x6828 /* Natural-width host state fields */ #define VMCS_HOST_IA32_CR0 0x6C00 @@ -1244,6 +1247,7 @@ #define VMCS_HOST_IA32_SYSENTER_EIP 0x6C12 #define VMCS_HOST_IA32_RSP 0x6C14 #define VMCS_HOST_IA32_RIP 0x6C16 +#define VMCS_HOST_IA32_S_CET 0x6C18 #define IA32_VMX_INVVPID_INDIV_ADDR_CTX 0x0 #define IA32_VMX_INVVPID_SINGLE_CTX 0x1 |