diff options
author | Dale Rahn <drahn@cvs.openbsd.org> | 2008-09-16 04:20:43 +0000 |
---|---|---|
committer | Dale Rahn <drahn@cvs.openbsd.org> | 2008-09-16 04:20:43 +0000 |
commit | a15f64b6da518de85dfbf9f633ec9d04f8d76e76 (patch) | |
tree | f27f93db00d51a14dfe6fc48219f1c861b6081e8 /sys/arch | |
parent | 28b1fafca5fb1a8888b84ab98aa5a50a73d115e1 (diff) |
SMP ddb support, with some feedback from kettenis.
Diffstat (limited to 'sys/arch')
-rw-r--r-- | sys/arch/macppc/dev/openpic.c | 74 | ||||
-rw-r--r-- | sys/arch/macppc/include/autoconf.h | 8 | ||||
-rw-r--r-- | sys/arch/macppc/include/db_machdep.h | 3 | ||||
-rw-r--r-- | sys/arch/macppc/include/intr.h | 3 | ||||
-rw-r--r-- | sys/arch/macppc/macppc/db_interface.c | 318 | ||||
-rw-r--r-- | sys/arch/macppc/macppc/machdep.c | 22 | ||||
-rw-r--r-- | sys/arch/powerpc/include/cpu.h | 9 | ||||
-rw-r--r-- | sys/arch/powerpc/include/db_machdep.h | 13 | ||||
-rw-r--r-- | sys/arch/powerpc/include/intr.h | 7 |
9 files changed, 426 insertions, 31 deletions
diff --git a/sys/arch/macppc/dev/openpic.c b/sys/arch/macppc/dev/openpic.c index 436351f36df..a7038df1b34 100644 --- a/sys/arch/macppc/dev/openpic.c +++ b/sys/arch/macppc/dev/openpic.c @@ -1,4 +1,4 @@ -/* $OpenBSD: openpic.c,v 1.47 2008/08/25 03:16:22 todd Exp $ */ +/* $OpenBSD: openpic.c,v 1.48 2008/09/16 04:20:42 drahn Exp $ */ /*- * Copyright (c) 1995 Per Fogelstrom @@ -75,7 +75,14 @@ void openpic_enable_irq_mask(int irq_mask); #define HWIRQ_MASK 0x0fffffff /* IRQ vector used for inter-processor interrupts. */ -#define IPI_VECTOR 64 +#define IPI_VECTOR_NOP 64 +#define IPI_VECTOR_DDB 65 +#ifdef MULTIPROCESSOR +static struct evcount ipi_ddb[PPC_MAXPROCS]; +static struct evcount ipi_nop[PPC_MAXPROCS]; +static int ipi_nopirq = IPI_VECTOR_NOP; +static int ipi_ddbirq = IPI_VECTOR_DDB; +#endif static __inline u_int openpic_read(int); static __inline void openpic_write(int, u_int); @@ -84,6 +91,7 @@ void openpic_enable_irq(int); void openpic_disable_irq(int); void openpic_init(void); void openpic_set_priority(int, int); +void openpic_ipi_ddb(void); static __inline int openpic_read_irq(int); static __inline void openpic_eoi(int); @@ -141,6 +149,9 @@ vaddr_t openpic_base; void * openpic_intr_establish( void * lcv, int irq, int type, int level, int (*ih_fun)(void *), void *ih_arg, char *name); void openpic_intr_disestablish( void *lcp, void *arg); +#ifdef MULTIPROCESSOR +intr_send_ipi_t openpic_send_ipi; +#endif void openpic_collect_preconf_intr(void); int openpic_big_endian; @@ -148,10 +159,6 @@ void openpic_attach(struct device *parent, struct device *self, void *aux) { struct confargs *ca = aux; - extern intr_establish_t *intr_establish_func; - extern intr_disestablish_t *intr_disestablish_func; - extern intr_establish_t *mac_intr_establish_func; - extern intr_disestablish_t *mac_intr_disestablish_func; u_int32_t reg; reg = 0; @@ -171,6 +178,9 @@ openpic_attach(struct device *parent, struct device *self, void *aux) intr_disestablish_func = openpic_intr_disestablish; mac_intr_establish_func = openpic_intr_establish; mac_intr_disestablish_func = openpic_intr_disestablish; +#ifdef MULTIPROCESSOR + intr_send_ipi_func = openpic_send_ipi; +#endif install_extint(ext_intr_openpic); #if 1 @@ -181,6 +191,7 @@ openpic_attach(struct device *parent, struct device *self, void *aux) mac_intr_establish(parent, 0x37, IST_LEVEL, IPL_HIGH, openpic_prog_button, (void *)0x37, "progbutton"); #endif + ppc_intr_enable(1); printf("\n"); @@ -657,9 +668,21 @@ openpic_eoi(int cpu) #ifdef MULTIPROCESSOR void -openpic_send_ipi(int cpu) +openpic_send_ipi(struct cpu_info *ci, int id) { - openpic_write(OPENPIC_IPI(curcpu()->ci_cpuid, 0), 1 << cpu); + switch (id) { + case PPC_IPI_NOP: + id = 0; + break; + case PPC_IPI_DDB: + id = 1; + break; + default: + panic("invalid ipi send to cpu %d %d\n", ci->ci_cpuid, id); + } + + + openpic_write(OPENPIC_IPI(curcpu()->ci_cpuid, id), 1 << ci->ci_cpuid); } #endif @@ -679,11 +702,19 @@ ext_intr_openpic() while (realirq != 255) { #ifdef MULTIPROCESSOR - if (realirq == IPI_VECTOR) { + if (realirq == IPI_VECTOR_NOP) { + ipi_nop[ci->ci_cpuid].ec_count++; openpic_eoi(ci->ci_cpuid); realirq = openpic_read_irq(ci->ci_cpuid); continue; } + if (realirq == IPI_VECTOR_DDB) { + ipi_ddb[ci->ci_cpuid].ec_count++; + openpic_eoi(ci->ci_cpuid); + openpic_ipi_ddb(); + realirq = openpic_read_irq(ci->ci_cpuid); + continue; + } #endif irq = o_virq[realirq]; @@ -759,10 +790,25 @@ openpic_init() #ifdef MULTIPROCESSOR /* Set up inter-processor interrupts. */ + /* IPI0 - NOP */ x = openpic_read(OPENPIC_IPI_VECTOR(0)); x &= ~(OPENPIC_IMASK | OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK); - x |= (15 << OPENPIC_PRIORITY_SHIFT) | IPI_VECTOR; + x |= (15 << OPENPIC_PRIORITY_SHIFT) | IPI_VECTOR_NOP; openpic_write(OPENPIC_IPI_VECTOR(0), x); + /* IPI1 - DDB */ + x = openpic_read(OPENPIC_IPI_VECTOR(1)); + x &= ~(OPENPIC_IMASK | OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK); + x |= (15 << OPENPIC_PRIORITY_SHIFT) | IPI_VECTOR_DDB; + openpic_write(OPENPIC_IPI_VECTOR(1), x); + + evcount_attach(&ipi_nop[0], "ipi_nop0", (void *)&ipi_nopirq, + &evcount_intr); + evcount_attach(&ipi_nop[1], "ipi_nop1", (void *)&ipi_nopirq, + &evcount_intr); + evcount_attach(&ipi_ddb[0], "ipi_ddb0", (void *)&ipi_ddbirq, + &evcount_intr); + evcount_attach(&ipi_ddb[1], "ipi_ddb1", (void *)&ipi_ddbirq, + &evcount_intr); #endif /* XXX set spurious intr vector */ @@ -795,3 +841,11 @@ openpic_prog_button (void *arg) #endif return 1; } + + +void +openpic_ipi_ddb(void) +{ + Debugger(); +} + diff --git a/sys/arch/macppc/include/autoconf.h b/sys/arch/macppc/include/autoconf.h index 4d149bc62b5..6e89313f9df 100644 --- a/sys/arch/macppc/include/autoconf.h +++ b/sys/arch/macppc/include/autoconf.h @@ -1,4 +1,4 @@ -/* $OpenBSD: autoconf.h,v 1.7 2006/02/12 16:50:12 miod Exp $ */ +/* $OpenBSD: autoconf.h,v 1.8 2008/09/16 04:20:42 drahn Exp $ */ /* * Copyright (c) 1997 Per Fogelstrom @@ -102,10 +102,16 @@ typedef int mac_intr_handle_t; typedef void *(intr_establish_t)(void *, mac_intr_handle_t, int, int, int (*func)(void *), void *, char *); typedef void (intr_disestablish_t)(void *, void *); +struct cpu_info; +typedef void (intr_send_ipi_t)(struct cpu_info *, int); intr_establish_t mac_intr_establish; intr_disestablish_t mac_intr_disestablish; extern intr_establish_t *intr_establish_func; extern intr_disestablish_t *intr_disestablish_func; +extern intr_establish_t *mac_intr_establish_func; +extern intr_disestablish_t *mac_intr_disestablish_func; +extern intr_send_ipi_t *intr_send_ipi_func; + #endif /* _MACHINE_AUTOCONF_H_ */ diff --git a/sys/arch/macppc/include/db_machdep.h b/sys/arch/macppc/include/db_machdep.h index 522a7ac6294..7b718faf031 100644 --- a/sys/arch/macppc/include/db_machdep.h +++ b/sys/arch/macppc/include/db_machdep.h @@ -1,3 +1,4 @@ -/* $OpenBSD: db_machdep.h,v 1.5 2002/06/08 16:02:13 miod Exp $ */ +/* $OpenBSD: db_machdep.h,v 1.6 2008/09/16 04:20:42 drahn Exp $ */ +#define DB_MACHINE_COMMANDS #include <powerpc/db_machdep.h> diff --git a/sys/arch/macppc/include/intr.h b/sys/arch/macppc/include/intr.h index a6cc9c24595..5278758ac65 100644 --- a/sys/arch/macppc/include/intr.h +++ b/sys/arch/macppc/include/intr.h @@ -1,10 +1,9 @@ -/* $OpenBSD: intr.h,v 1.3 2008/05/01 08:25:32 kettenis Exp $ */ +/* $OpenBSD: intr.h,v 1.4 2008/09/16 04:20:42 drahn Exp $ */ #include <powerpc/intr.h> #ifndef _LOCORE void softtty(void); -void openpic_send_ipi(int); void openpic_set_priority(int, int); #endif diff --git a/sys/arch/macppc/macppc/db_interface.c b/sys/arch/macppc/macppc/db_interface.c index db288ef2fb9..0a107fcc408 100644 --- a/sys/arch/macppc/macppc/db_interface.c +++ b/sys/arch/macppc/macppc/db_interface.c @@ -1,6 +1,34 @@ -/* $OpenBSD: db_interface.c,v 1.8 2008/08/19 08:26:20 kettenis Exp $ */ +/* $OpenBSD: db_interface.c,v 1.9 2008/09/16 04:20:42 drahn Exp $ */ /* $NetBSD: db_interface.c,v 1.12 2001/07/22 11:29:46 wiz Exp $ */ +/* + * Mach Operating System + * Copyright (c) 1991,1990 Carnegie Mellon University + * All Rights Reserved. + * + * Permission to use, copy, modify and distribute this software and its + * documentation is hereby granted, provided that both the copyright + * notice and this permission notice appear in all copies of the + * software, derivative works or modified versions, and any portions + * thereof, and that both notices appear in supporting documentation. + * + * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" + * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR + * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * + * Carnegie Mellon requests users of this software to return to + * + * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU + * School of Computer Science + * Carnegie Mellon University + * Pittsburgh PA 15213-3890 + * + * any improvements or extensions that they make and grant Carnegie the + * rights to redistribute these changes. + * + * db_interface.c,v 2.4 1991/02/05 17:11:13 mrt (CMU) + */ + #include <sys/param.h> #include <sys/proc.h> #include <sys/systm.h> @@ -9,6 +37,27 @@ #include <machine/db_machdep.h> #include <ddb/db_extern.h> +#include <ddb/db_interface.h> +#include <ddb/db_command.h> +#include <ddb/db_output.h> + +#ifdef MULTIPROCESSOR +struct mutex ddb_mp_mutex = MUTEX_INITIALIZER(IPL_HIGH); +volatile int ddb_state = DDB_STATE_NOT_RUNNING; +volatile cpuid_t ddb_active_cpu; +boolean_t db_switch_cpu; +long db_switch_to_cpu; +#endif + +int db_active; +extern db_regs_t ddb_regs; + +#ifdef MULTIPROCESSOR +void db_cpuinfo_cmd(db_expr_t, int, db_expr_t, char *); +void db_startproc_cmd(db_expr_t, int, db_expr_t, char *); +void db_stopproc_cmd(db_expr_t, int, db_expr_t, char *); +void db_ddbproc_cmd(db_expr_t, int, db_expr_t, char *); +#endif int db_active = 0; @@ -23,26 +72,271 @@ Debugger() int ddb_trap_glue(struct trapframe *frame) { + int s; + if (!(frame->srr1 & PSL_PR) && (frame->exc == EXC_TRC || (frame->exc == EXC_PGM && (frame->srr1 & 0x20000)) || frame->exc == EXC_BPT)) { - bcopy(frame->fixreg, DDB_REGS->tf.fixreg, - 32 * sizeof(u_int32_t)); - DDB_REGS->tf.srr0 = frame->srr0; - DDB_REGS->tf.srr1 = frame->srr1; +#ifdef MULTIPROCESSOR + mtx_enter(&ddb_mp_mutex); + if (ddb_state == DDB_STATE_EXITING) + ddb_state = DDB_STATE_NOT_RUNNING; + mtx_leave(&ddb_mp_mutex); - db_active++; - cnpollc(TRUE); - db_trap(T_BREAKPOINT, 0); - cnpollc(FALSE); - db_active--; + while (db_enter_ddb()) { +#endif + bcopy(frame->fixreg, DDB_REGS->tf.fixreg, + 32 * sizeof(u_int32_t)); + DDB_REGS->tf.srr0 = frame->srr0; + DDB_REGS->tf.srr1 = frame->srr1; - bcopy(DDB_REGS->tf.fixreg, frame->fixreg, - 32 * sizeof(u_int32_t)); + s = splhigh(); + db_active++; + cnpollc(TRUE); + db_trap(T_BREAKPOINT, 0); + cnpollc(FALSE); + db_active--; + splx(s); + bcopy(DDB_REGS->tf.fixreg, frame->fixreg, + 32 * sizeof(u_int32_t)); +#ifdef MULTIPROCESSOR + if (!db_switch_cpu) + ddb_state = DDB_STATE_EXITING; + } +#endif return 1; } return 0; } + +int +db_enter_ddb(void) +{ +#ifdef MULTIPROCESSOR + int i; + struct cpu_info *ci = curcpu(); + + mtx_enter(&ddb_mp_mutex); + +#if 0 + printf("db_enter_ddb %d: state %x pause %x\n", ci->ci_cpuid, + ddb_state, ci->ci_ddb_paused); +#endif + /* If we are first in, grab ddb and stop all other CPUs */ + if (ddb_state == DDB_STATE_NOT_RUNNING) { + ddb_active_cpu = cpu_number(); + ddb_state = DDB_STATE_RUNNING; + ci->ci_ddb_paused = CI_DDB_INDDB; + for (i = 0; i < ncpus; i++) { + if (i != cpu_number() && + cpu_info[i].ci_ddb_paused != CI_DDB_STOPPED) { + cpu_info[i].ci_ddb_paused = CI_DDB_SHOULDSTOP; + ppc_send_ipi(&cpu_info[i], PPC_IPI_DDB); + } + } + mtx_leave(&ddb_mp_mutex); + return (1); + } + + /* Leaving ddb completely. Start all other CPUs and return 0 */ + if (ddb_active_cpu == cpu_number() && ddb_state == DDB_STATE_EXITING) { + for (i = 0; i < ncpus; i++) { + cpu_info[i].ci_ddb_paused = CI_DDB_RUNNING; + } + mtx_leave(&ddb_mp_mutex); + return (0); + } + + /* We are switching to another CPU. ddb_ddbproc_cmd() has made sure + * it is waiting for ddb, we just have to set ddb_active_cpu. */ + if (ddb_active_cpu == cpu_number() && db_switch_cpu) { + ci->ci_ddb_paused = CI_DDB_SHOULDSTOP; + db_switch_cpu = 0; + ddb_active_cpu = db_switch_to_cpu; + cpu_info[db_switch_to_cpu].ci_ddb_paused = CI_DDB_ENTERDDB; + } + + /* Wait until we should enter ddb or resume */ + while (ddb_active_cpu != cpu_number() && + ci->ci_ddb_paused != CI_DDB_RUNNING) { + if (ci->ci_ddb_paused == CI_DDB_SHOULDSTOP) + ci->ci_ddb_paused = CI_DDB_STOPPED; + mtx_leave(&ddb_mp_mutex); + + /* Busy wait without locking, we will confirm with lock later */ + while (ddb_active_cpu != cpu_number() && + ci->ci_ddb_paused != CI_DDB_RUNNING) + ; /* Do nothing */ + + mtx_enter(&ddb_mp_mutex); + } + + /* Either enter ddb or exit */ + if (ddb_active_cpu == cpu_number() && ddb_state == DDB_STATE_RUNNING) { + ci->ci_ddb_paused = CI_DDB_INDDB; + mtx_leave(&ddb_mp_mutex); + return (1); + } else { + mtx_leave(&ddb_mp_mutex); + return (0); + } +#else + return (1); +#endif +} + +#ifdef MULTIPROCESSOR +void +ppc_ipi_db(struct cpu_info *ci) +{ + Debugger(); +} + +void +db_cpuinfo_cmd(db_expr_t addr, int have_addr, db_expr_t count, char *modif) +{ + int i; + + for (i = 0; i < ncpus; i++) { + db_printf("%c%4d: ", (i == cpu_number()) ? '*' : ' ', + cpu_info[i].ci_cpuid); + switch(cpu_info[i].ci_ddb_paused) { + case CI_DDB_RUNNING: + db_printf("running\n"); + break; + case CI_DDB_SHOULDSTOP: + db_printf("stopping\n"); + break; + case CI_DDB_STOPPED: + db_printf("stopped\n"); + break; + case CI_DDB_ENTERDDB: + db_printf("entering ddb\n"); + break; + case CI_DDB_INDDB: + db_printf("ddb\n"); + break; + default: + db_printf("? (%d)\n", + cpu_info[i].ci_ddb_paused); + break; + } + } +} +#endif + +struct db_command db_machine_command_table[] = { +#ifdef MULTIPROCESSOR + { "cpuinfo", db_cpuinfo_cmd, 0, NULL }, + { "startcpu", db_startproc_cmd, 0, NULL }, + { "stopcpu", db_stopproc_cmd, 0, NULL }, + { "ddbcpu", db_ddbproc_cmd, 0, NULL }, +#endif + { (char *)NULL } +}; + +void +db_machine_init(void) +{ +#ifdef MULTIPROCESSOR + int i; +#endif + + db_machine_commands_install(db_machine_command_table); +#ifdef MULTIPROCESSOR + for (i = 0; i < ncpus; i++) { + cpu_info[i].ci_ddb_paused = CI_DDB_RUNNING; + } +#endif +} + +#ifdef MULTIPROCESSOR +void +db_ddbproc_cmd(db_expr_t addr, int have_addr, db_expr_t count, char *modif) +{ + int cpu_n; + + if (have_addr) { + cpu_n = addr; + if (cpu_n >= 0 && cpu_n < ncpus && + cpu_n != cpu_number()) { + db_switch_to_cpu = cpu_n; + db_switch_cpu = 1; +/* db_cmd_loop_done = 1; */ + } else { + db_printf("Invalid cpu %d\n", (int)addr); + } + } else { + db_printf("CPU not specified\n"); + } +} + +void +db_startproc_cmd(db_expr_t addr, int have_addr, db_expr_t count, char *modif) +{ + int cpu_n; + + if (have_addr) { + cpu_n = addr; + if (cpu_n >= 0 && cpu_n < ncpus && + cpu_n != cpu_number()) + db_startcpu(cpu_n); + else + db_printf("Invalid cpu %d\n", (int)addr); + } else { + for (cpu_n = 0; cpu_n < ncpus; cpu_n++) { + if (cpu_n != cpu_number()) { + db_startcpu(cpu_n); + } + } + } +} + +void +db_stopproc_cmd(db_expr_t addr, int have_addr, db_expr_t count, char *modif) +{ + int cpu_n; + + if (have_addr) { + cpu_n = addr; + if (cpu_n >= 0 && cpu_n < ncpus && + cpu_n != cpu_number()) + db_stopcpu(cpu_n); + else + db_printf("Invalid cpu %d\n", (int)addr); + } else { + for (cpu_n = 0; cpu_n < ncpus; cpu_n++) { + if (cpu_n != cpu_number()) { + db_stopcpu(cpu_n); + } + } + } +} + +void +db_startcpu(int cpu) +{ + if (cpu != cpu_number() && cpu < ncpus) { + mtx_enter(&ddb_mp_mutex); + cpu_info[cpu].ci_ddb_paused = CI_DDB_RUNNING; + mtx_leave(&ddb_mp_mutex); + } +} + +void +db_stopcpu(int cpu) +{ + mtx_enter(&ddb_mp_mutex); + if (cpu != cpu_number() && cpu < ncpus && + cpu_info[cpu].ci_ddb_paused != CI_DDB_STOPPED) { + cpu_info[cpu].ci_ddb_paused = CI_DDB_SHOULDSTOP; + mtx_leave(&ddb_mp_mutex); + ppc_send_ipi(&cpu_info[cpu], PPC_IPI_DDB); + } else { + mtx_leave(&ddb_mp_mutex); + } +} +#endif diff --git a/sys/arch/macppc/macppc/machdep.c b/sys/arch/macppc/macppc/machdep.c index b0684add818..befb3f7bd19 100644 --- a/sys/arch/macppc/macppc/machdep.c +++ b/sys/arch/macppc/macppc/machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: machdep.c,v 1.99 2008/06/27 17:22:14 miod Exp $ */ +/* $OpenBSD: machdep.c,v 1.100 2008/09/16 04:20:42 drahn Exp $ */ /* $NetBSD: machdep.c,v 1.4 1996/10/16 19:33:11 ws Exp $ */ /* @@ -82,6 +82,7 @@ #ifdef DDB #include <machine/db_machdep.h> +#include <ddb/db_interface.h> #include <ddb/db_access.h> #include <ddb/db_sym.h> #include <ddb/db_extern.h> @@ -387,6 +388,7 @@ initppc(startkernel, endkernel, args) #ifdef DDB ddb_init(); + db_machine_init(); #endif /* @@ -1022,7 +1024,7 @@ signotify(struct proc *p) aston(p); #ifdef MULTIPROCESSOR if (p->p_cpu != curcpu() && p->p_cpu != NULL) - openpic_send_ipi(p->p_cpu->ci_cpuid); + ppc_send_ipi(p->p_cpu, PPC_IPI_NOP); #endif } @@ -1102,6 +1104,22 @@ ppc_intr_setup(intr_establish_t *establish, intr_disestablish_t *disestablish) intr_disestablish_func = disestablish; } +intr_send_ipi_t ppc_no_send_ipi; +intr_send_ipi_t *intr_send_ipi_func = ppc_no_send_ipi; + +void +ppc_no_send_ipi(struct cpu_info *ci, int id) +{ + panic("ppc_send_ipi called: no ipi function\n"); +} + +void +ppc_send_ipi(struct cpu_info *ci, int id) +{ + (*intr_send_ipi_func)(ci, id); +} + + /* BUS functions */ int bus_space_map(bus_space_tag_t t, bus_addr_t bpa, bus_size_t size, diff --git a/sys/arch/powerpc/include/cpu.h b/sys/arch/powerpc/include/cpu.h index 4a6d2ed2692..2553e3b0183 100644 --- a/sys/arch/powerpc/include/cpu.h +++ b/sys/arch/powerpc/include/cpu.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.h,v 1.38 2008/07/18 23:43:31 art Exp $ */ +/* $OpenBSD: cpu.h,v 1.39 2008/09/16 04:20:42 drahn Exp $ */ /* $NetBSD: cpu.h,v 1.1 1996/09/30 16:34:21 ws Exp $ */ /* @@ -73,6 +73,13 @@ struct cpu_info { volatile u_int64_t ci_nextstatevent; int ci_statspending; + volatile int ci_ddb_paused; +#define CI_DDB_RUNNING 0 +#define CI_DDB_SHOULDSTOP 1 +#define CI_DDB_STOPPED 2 +#define CI_DDB_ENTERDDB 3 +#define CI_DDB_INDDB 4 + u_long ci_randseed; }; diff --git a/sys/arch/powerpc/include/db_machdep.h b/sys/arch/powerpc/include/db_machdep.h index 241c7511fd6..af3a6400e7b 100644 --- a/sys/arch/powerpc/include/db_machdep.h +++ b/sys/arch/powerpc/include/db_machdep.h @@ -1,4 +1,4 @@ -/* $OpenBSD: db_machdep.h,v 1.21 2005/12/17 07:31:26 miod Exp $ */ +/* $OpenBSD: db_machdep.h,v 1.22 2008/09/16 04:20:42 drahn Exp $ */ /* $NetBSD: db_machdep.h,v 1.13 1996/04/29 20:50:08 leo Exp $ */ /* @@ -93,12 +93,23 @@ extern db_regs_t ddb_regs; /* register state */ #ifdef _KERNEL +int db_enter_ddb(void); +void db_startcpu(int); +void db_stopcpu(int); +void ppc_ipi_db(struct cpu_info *); + void kdb_kintr(void *); int kdb_trap(int, void *); void db_save_regs(struct trapframe *frame); void ddb_trap(void); db_expr_t db_dumpframe(u_int32_t pframe, int (*pr)(const char *, ...)); +extern struct mutex ddb_mp_mutex; + +#define DDB_STATE_NOT_RUNNING 0 +#define DDB_STATE_RUNNING 1 +#define DDB_STATE_EXITING 2 + #endif /* _KERNEL */ #endif /* _PPC_DB_MACHDEP_H_ */ diff --git a/sys/arch/powerpc/include/intr.h b/sys/arch/powerpc/include/intr.h index 3e2c206e9ef..f05d41e7189 100644 --- a/sys/arch/powerpc/include/intr.h +++ b/sys/arch/powerpc/include/intr.h @@ -1,4 +1,4 @@ -/* $OpenBSD: intr.h,v 1.34 2007/11/14 20:33:32 thib Exp $ */ +/* $OpenBSD: intr.h,v 1.35 2008/09/16 04:20:42 drahn Exp $ */ /* * Copyright (c) 1997 Per Fogelstrom, Opsycon AB and RTMX Inc, USA. @@ -124,5 +124,10 @@ extern int ppc_configed_intr_cnt; extern struct intrhand ppc_configed_intr[MAX_PRECONF_INTR]; void softnet(int isr); +#define PPC_IPI_NOP 0 +#define PPC_IPI_DDB 1 + +void ppc_send_ipi(struct cpu_info *, int); + #endif /* _LOCORE */ #endif /* _POWERPC_INTR_H_ */ |