Better crime/mace interrupt handling; interrupt information is no longer

specified in the kernel configuration file, but is provided by macebus(4)
as part of the  child device attachment args, and provide both crime and
mace interrupt bitmasks; this allows us to only really enable interrupt
sources we care about, and to avoid invoking interrupt handler we don't need
to for the few mace interrupts multiplexed at the crime level.

17 files changed, 238 insertions, 198 deletions

diff --git a/sys/arch/sgi/conf/GENERIC-IP32 b/sys/arch/sgi/conf/GENERIC-IP32
index 62798a2984e..a7c821e1d83 100644
--- a/sys/arch/sgi/conf/GENERIC-IP32
+++ b/sys/arch/sgi/conf/GENERIC-IP32
@@ -1,4 +1,4 @@
-#	$OpenBSD: GENERIC-IP32,v 1.9 2009/07/16 21:02:54 miod Exp $
+#	$OpenBSD: GENERIC-IP32,v 1.10 2009/10/26 18:00:04 miod Exp $
 #
 # THIS KERNEL IS FOR O2 (IP32) SYSTEMS ONLY.
 #
@@ -46,13 +46,13 @@ macebus0	at mainbus0	# MACE controller localbus.
 gbe0		at mainbus0
 
 # Localbus devices
-mec0		at macebus0 base 0x00280000 irq 4
-mavb0		at macebus0 base 0x00300000 irq 7
-mkbc0		at macebus0 base 0x00320000 irq 6
-com0		at macebus0 base 0x00390000 irq 5
-com1		at macebus0 base 0x00398000 irq 5
+mec0		at macebus0
+mavb0		at macebus0
+mkbc0		at macebus0
+com0		at macebus0 base 0x00390000
+com1		at macebus0 base 0x00398000
 dsrtc0		at macebus0
-power0		at macebus0 irq 6
+power0		at macebus0
 
 #### PCI Bus
 macepcibr0	at macebus0	# MACE controller PCI Bus bridge.
diff --git a/sys/arch/sgi/conf/RAMDISK-IP32 b/sys/arch/sgi/conf/RAMDISK-IP32
index 47e6496f104..4b81b34da3e 100644
--- a/sys/arch/sgi/conf/RAMDISK-IP32
+++ b/sys/arch/sgi/conf/RAMDISK-IP32
@@ -1,4 +1,4 @@
-#	$OpenBSD: RAMDISK-IP32,v 1.7 2009/07/16 21:02:54 miod Exp $
+#	$OpenBSD: RAMDISK-IP32,v 1.8 2009/10/26 18:00:04 miod Exp $
 #
 # THIS KERNEL IS FOR O2 (IP32) SYSTEMS ONLY.
 
@@ -53,10 +53,10 @@ macebus0	at mainbus0	# MACE controller localbus.
 gbe0		at mainbus0
 
 #### Localbus devices
-mec0		at macebus0 base 0x00280000 irq 4
-mkbc0		at macebus0 base 0x00320000 irq 6
-com0		at macebus0 base 0x00390000 irq 5
-com1		at macebus0 base 0x00398000 irq 5
+mec0		at macebus0
+mkbc0		at macebus0
+com0		at macebus0 base 0x00390000
+com1		at macebus0 base 0x00398000
 dsrtc0		at macebus0
 
 #### PCI Bus
diff --git a/sys/arch/sgi/conf/files.sgi b/sys/arch/sgi/conf/files.sgi
index 180edd765c2..d4e242378bb 100644
--- a/sys/arch/sgi/conf/files.sgi
+++ b/sys/arch/sgi/conf/files.sgi
@@ -1,4 +1,4 @@
-#	$OpenBSD: files.sgi,v 1.34 2009/10/21 20:48:45 miod Exp $
+#	$OpenBSD: files.sgi,v 1.35 2009/10/26 18:00:04 miod Exp $
 #
 # maxpartitions must be first item in files.${ARCH}
 #
@@ -55,7 +55,7 @@ attach	clock at mainbus
 #
 #	O2 MACE localbus autoconfiguration devices
 #
-define	macebus {[base = -1], [irq = -1]}
+define	macebus {[base = -1]}
 device	macebus
 attach	macebus at mainbus
 file	arch/sgi/localbus/macebus.c		macebus
diff --git a/sys/arch/sgi/dev/dsrtc.c b/sys/arch/sgi/dev/dsrtc.c
index fb26b20ab09..2a9c482f788 100644
--- a/sys/arch/sgi/dev/dsrtc.c
+++ b/sys/arch/sgi/dev/dsrtc.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: dsrtc.c,v 1.7 2009/10/07 20:39:45 miod Exp $ */
+/*	$OpenBSD: dsrtc.c,v 1.8 2009/10/26 18:00:06 miod Exp $ */
 
 /*
  * Copyright (c) 2001-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -42,7 +42,7 @@
 #include <mips64/dev/clockvar.h>
 
 #include <sgi/dev/dsrtcvar.h>
-#include <sgi/localbus/macebus.h>
+#include <sgi/localbus/macebusvar.h>
 #include <sgi/pci/iocreg.h>
 #include <sgi/pci/iocvar.h>
 #include <sgi/pci/iofvar.h>
@@ -265,10 +265,10 @@ void
 dsrtc_attach_macebus(struct device *parent, struct device *self, void *aux)
 {
 	struct dsrtc_softc *sc = (void *)self;
-	struct confargs *ca = aux;
+	struct macebus_attach_args *maa = aux;
 
-	sc->sc_clkt = ca->ca_iot;
-	if (bus_space_map(sc->sc_clkt, MACE_ISA_RTC_OFFS, 128 * 256, 0,
+	sc->sc_clkt = maa->maa_iot;
+	if (bus_space_map(sc->sc_clkt, maa->maa_baseaddr, 128 * 256, 0,
 	    &sc->sc_clkh)) {
 		printf(": can't map registers\n");
 		return;
diff --git a/sys/arch/sgi/dev/gbe.c b/sys/arch/sgi/dev/gbe.c
index c60030b1c9d..5abf7d22552 100644
--- a/sys/arch/sgi/dev/gbe.c
+++ b/sys/arch/sgi/dev/gbe.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: gbe.c,v 1.8 2009/09/05 14:09:35 miod Exp $ */
+/*	$OpenBSD: gbe.c,v 1.9 2009/10/26 18:00:06 miod Exp $ */
 
 /*
  * Copyright (c) 2007, 2008, 2009 Joel Sing <jsing@openbsd.org>
@@ -34,7 +34,7 @@
 #include <mips64/archtype.h>
 
 #include <sgi/localbus/crimebus.h>
-#include <sgi/localbus/macebus.h>
+#include <sgi/localbus/macebusvar.h>
 
 #include <dev/wscons/wsconsio.h>
 #include <dev/wscons/wsdisplayvar.h>
diff --git a/sys/arch/sgi/dev/if_mec.c b/sys/arch/sgi/dev/if_mec.c
index 1d72594cbcb..c7075dc0e2d 100644
--- a/sys/arch/sgi/dev/if_mec.c
+++ b/sys/arch/sgi/dev/if_mec.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: if_mec.c,v 1.21 2009/08/10 23:57:40 jsing Exp $ */
+/*	$OpenBSD: if_mec.c,v 1.22 2009/10/26 18:00:06 miod Exp $ */
 /*	$NetBSD: if_mec_mace.c,v 1.5 2004/08/01 06:36:36 tsutsui Exp $ */
 
 /*
@@ -106,7 +106,7 @@
 #include <mips64/arcbios.h>
 #include <sgi/dev/if_mecreg.h>
 
-#include <sgi/localbus/macebus.h>
+#include <sgi/localbus/macebusvar.h>
 
 #ifdef MEC_DEBUG
 #define MEC_DEBUG_RESET		0x01
@@ -355,22 +355,22 @@ void
 mec_attach(struct device *parent, struct device *self, void *aux)
 {
 	struct mec_softc *sc = (void *)self;
-	struct confargs *ca = aux;
+	struct macebus_attach_args *maa = aux;
 	struct ifnet *ifp = &sc->sc_ac.ac_if;
 	uint32_t command;
 	struct mii_softc *child;
 	bus_dma_segment_t seg;
 	int i, err, rseg;
 
-	sc->sc_st = ca->ca_iot;
-	if (bus_space_map(sc->sc_st, ca->ca_baseaddr, MEC_NREGS, 0,
+	sc->sc_st = maa->maa_iot;
+	if (bus_space_map(sc->sc_st, maa->maa_baseaddr, MEC_NREGS, 0,
 	    &sc->sc_sh) != 0) {
 		printf(": can't map i/o space\n");
 		return;
 	}
 
 	/* Set up DMA structures. */
-	sc->sc_dmat = ca->ca_dmat;
+	sc->sc_dmat = maa->maa_dmat;
 
 	/*
 	 * Allocate the control data structures, and create and load the
@@ -476,8 +476,8 @@ mec_attach(struct device *parent, struct device *self, void *aux)
 	ether_ifattach(ifp);
 
 	/* Establish interrupt handler. */
-	macebus_intr_establish(NULL, ca->ca_intr, IST_EDGE, IPL_NET,
-	    mec_intr, sc, sc->sc_dev.dv_xname);
+	macebus_intr_establish(maa->maa_intr, maa->maa_mace_intr,
+	    IST_EDGE, IPL_NET, mec_intr, sc, sc->sc_dev.dv_xname);
 
 	return;
 
diff --git a/sys/arch/sgi/dev/mavb.c b/sys/arch/sgi/dev/mavb.c
index 7e67b2ed0f6..f59afd912c5 100644
--- a/sys/arch/sgi/dev/mavb.c
+++ b/sys/arch/sgi/dev/mavb.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: mavb.c,v 1.9 2008/04/21 00:32:42 jakemsr Exp $	*/
+/*	$OpenBSD: mavb.c,v 1.10 2009/10/26 18:00:06 miod Exp $	*/
 
 /*
  * Copyright (c) 2005 Mark Kettenis
@@ -32,6 +32,7 @@
 #include <mips64/archtype.h>
 
 #include <sgi/localbus/macebus.h>
+#include <sgi/localbus/macebusvar.h>
 #include <sgi/dev/mavbreg.h>
 
 #include <dev/ic/ad1843reg.h>
@@ -1062,15 +1063,15 @@ mavb_intr(void *arg)
 int
 mavb_match(struct device *parent, void *match, void *aux)
 {
-	struct confargs *ca = aux;
+	struct macebus_attach_args *maa = aux;
 	bus_space_handle_t ioh;
 	u_int64_t control;
 
-	if (bus_space_map(ca->ca_iot, ca->ca_baseaddr, MAVB_NREGS, 0,
+	if (bus_space_map(maa->maa_iot, maa->maa_baseaddr, MAVB_NREGS, 0,
 	    &ioh) != 0)
 		return (0);
-	control = bus_space_read_8(ca->ca_iot, ioh, MAVB_CONTROL);
-	bus_space_unmap(ca->ca_iot, ioh, MAVB_NREGS);
+	control = bus_space_read_8(maa->maa_iot, ioh, MAVB_CONTROL);
+	bus_space_unmap(maa->maa_iot, ioh, MAVB_NREGS);
 
 	return ((control & MAVB_CONTROL_CODEC_PRESENT) != 0);
 }
@@ -1079,13 +1080,13 @@ void
 mavb_attach(struct device *parent, struct device *self, void *aux)
 {
 	struct mavb_softc *sc = (void *)self;
-	struct confargs *ca = aux;
+	struct macebus_attach_args *maa = aux;
 	bus_dma_segment_t seg;
 	u_int16_t value;
 	int rseg;
 
-	sc->sc_st = ca->ca_iot;
-	if (bus_space_map(sc->sc_st, ca->ca_baseaddr, MAVB_NREGS, 0,
+	sc->sc_st = maa->maa_iot;
+	if (bus_space_map(sc->sc_st, maa->maa_baseaddr, MAVB_NREGS, 0,
 	    &sc->sc_sh) != 0) {
 		printf(": can't map i/o space\n");
 		return;
@@ -1097,7 +1098,7 @@ mavb_attach(struct device *parent, struct device *self, void *aux)
 	    &sc->sc_isash);
 
 	/* Set up DMA structures.  */
-	sc->sc_dmat = ca->ca_dmat;
+	sc->sc_dmat = maa->maa_dmat;
 	if (bus_dmamap_create(sc->sc_dmat, 4 * MAVB_ISA_RING_SIZE, 1,
 	    4 * MAVB_ISA_RING_SIZE, 0, 0, &sc->sc_dmamap)) {
 		printf(": can't create MACE ISA DMA map\n");
@@ -1128,8 +1129,8 @@ mavb_attach(struct device *parent, struct device *self, void *aux)
 	    sc->sc_dmamap->dm_segs[0].ds_addr);
 
 	/* Establish interrupt.  */
-	macebus_intr_establish(NULL, ca->ca_intr, IST_EDGE, IPL_AUDIO,
-	    mavb_intr, sc, sc->sc_dev.dv_xname);
+	macebus_intr_establish(maa->maa_intr, maa->maa_mace_intr,
+	    IST_EDGE, IPL_AUDIO, mavb_intr, sc, sc->sc_dev.dv_xname);
 
 	/* 2. Assert the RESET signal.  */
 	bus_space_write_8(sc->sc_st, sc->sc_sh, MAVB_CONTROL,
diff --git a/sys/arch/sgi/dev/mkbc.c b/sys/arch/sgi/dev/mkbc.c
index ca0bfb40f34..1c2e92f7649 100644
--- a/sys/arch/sgi/dev/mkbc.c
+++ b/sys/arch/sgi/dev/mkbc.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: mkbc.c,v 1.8 2008/10/15 19:12:19 blambert Exp $  */
+/*	$OpenBSD: mkbc.c,v 1.9 2009/10/26 18:00:06 miod Exp $  */
 
 /*
  * Copyright (c) 2006, 2007, Joel Sing
@@ -82,7 +82,7 @@
 #include <mips64/archtype.h>
 
 #include <sgi/localbus/crimebus.h>
-#include <sgi/localbus/macebus.h>
+#include <sgi/localbus/macebusvar.h>
 
 #include <dev/ic/pckbcvar.h>
 #include <dev/pckbc/pckbdvar.h>
@@ -249,16 +249,16 @@ void
 mkbc_attach(struct device *parent, struct device *self, void *aux)
 {
 	struct mkbc_softc *msc = (void*)self;
-	struct confargs *ca = aux;
+	struct macebus_attach_args *maa = aux;
 	struct pckbc_softc *sc = &msc->sc_pckbc;
 	struct pckbc_internal *t;
 
 	if (mkbc_console == 0) {
 
 		/* Setup bus space mapping. */
-		msc->iot = ca->ca_iot;
-		if (bus_space_map(msc->iot, ca->ca_baseaddr, MKBC_PORTSIZE * 2, 0, 
-		    &msc->ioh)) {
+		msc->iot = maa->maa_iot;
+		if (bus_space_map(msc->iot, maa->maa_baseaddr,
+		    MKBC_PORTSIZE * 2, 0, &msc->ioh)) {
 			printf(": unable to map bus space!\n");
 			return;
 		}
@@ -269,7 +269,7 @@ mkbc_attach(struct device *parent, struct device *self, void *aux)
 		t->t_iot = msc->iot;
 		t->t_ioh_d = NULL;
 		t->t_ioh_c = NULL;
-		t->t_addr = ca->ca_baseaddr;
+		t->t_addr = maa->maa_baseaddr;
 		t->t_sc = (struct pckbc_softc *)msc;
 		sc->id = t;
 
@@ -287,8 +287,8 @@ mkbc_attach(struct device *parent, struct device *self, void *aux)
 	}
 
 	/* Establish interrupt handler. */
-	if (macebus_intr_establish(NULL, ca->ca_intr, IST_EDGE, IPL_TTY,
-	    mkbcintr, msc, sc->sc_dv.dv_xname))
+	if (macebus_intr_establish(maa->maa_intr, maa->maa_mace_intr,
+	    IST_EDGE, IPL_TTY, mkbcintr, msc, sc->sc_dv.dv_xname))
 		printf("\n");
 	else
 		printf(": unable to establish interrupt\n");
diff --git a/sys/arch/sgi/dev/power.c b/sys/arch/sgi/dev/power.c
index 12207ae1ad2..87b4dbc1976 100644
--- a/sys/arch/sgi/dev/power.c
+++ b/sys/arch/sgi/dev/power.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: power.c,v 1.9 2009/05/16 16:04:11 deraadt Exp $	*/
+/*	$OpenBSD: power.c,v 1.10 2009/10/26 18:00:06 miod Exp $	*/
 
 /*
  * Copyright (c) 2007 Jasper Lievisse Adriaanse <jasper@openbsd.org>
@@ -28,6 +28,7 @@
 #include <sgi/dev/dsrtcvar.h>
 
 #include <sgi/localbus/macebus.h>
+#include <sgi/localbus/macebusvar.h>
 
 /*
  * Power button driver for the SGI O2.
@@ -42,7 +43,6 @@ struct power_softc {
 void	power_attach(struct device *, struct device *, void *);
 int	power_match(struct device *, void *, void *);
 int	power_intr(void *);
-int	power_intr_macebus(void *);
 
 struct cfdriver power_cd = {
 	NULL, "power", DV_DULL
@@ -62,10 +62,10 @@ void
 power_attach(struct device *parent, struct device *self, void *aux)
 {
 	struct power_softc *sc = (void *)self;
-	struct confargs *ca = aux;
+	struct macebus_attach_args *maa = aux;
 	extern bus_space_handle_t mace_h;
 
-	sc->sc_st = ca->ca_iot;
+	sc->sc_st = maa->maa_iot;
 
 	/* Map subregion to ISA control registers. */
 	if (bus_space_subregion(sc->sc_st, mace_h, 0, 0x80, &sc->sc_sh)) {
@@ -74,28 +74,14 @@ power_attach(struct device *parent, struct device *self, void *aux)
 	}
  	
 	/* Establish interrupt handler. */
-	if (macebus_intr_establish(NULL, ca->ca_intr, IST_EDGE, IPL_TTY,
-	    power_intr_macebus, sc, sc->sc_dev.dv_xname))
+	if (macebus_intr_establish(maa->maa_intr, maa->maa_mace_intr,
+	    IST_EDGE, IPL_TTY, power_intr, sc, sc->sc_dev.dv_xname))
 		printf("\n");
 	else
 		printf(": unable to establish interrupt!\n");
 }
 
 int
-power_intr_macebus(void *arg)
-{
-	struct power_softc *sc = (void *)arg;
-	u_int64_t val;
-
-	/* Check to see if this interrupt is for us. */
-	val = bus_space_read_8(sc->sc_st, sc->sc_sh, MACE_ISA_INT_STAT);
-	if (val & MACE_ISA_INT_RTC)
-		return power_intr(arg);
-
-	return 0;
-}
-
-int
 power_intr(void *unused)
 {
 	extern int kbd_reset;
diff --git a/sys/arch/sgi/include/autoconf.h b/sys/arch/sgi/include/autoconf.h
index 59710f5a3f4..977f073359a 100644
--- a/sys/arch/sgi/include/autoconf.h
+++ b/sys/arch/sgi/include/autoconf.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: autoconf.h,v 1.20 2009/10/16 00:15:48 miod Exp $ */
+/*	$OpenBSD: autoconf.h,v 1.21 2009/10/26 18:00:06 miod Exp $ */
 
 /*
  * Copyright (c) 2001-2003 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -73,12 +73,6 @@ extern struct sys_rec sys_config;
 struct confargs {
 	char		*ca_name;
 	int16_t		 ca_nasid;
-	bus_space_tag_t  ca_iot;
-	bus_dma_tag_t	 ca_dmat;
-	/* XXX the following are macebus-specific */
-	bus_space_tag_t  ca_memt;
-	int32_t		 ca_intr;
-	bus_addr_t	 ca_baseaddr;
 };
 
 void	enaddr_aton(const char *, u_int8_t *);
diff --git a/sys/arch/sgi/localbus/com_lbus.c b/sys/arch/sgi/localbus/com_lbus.c
index 20d1ef6050c..835e05bcba0 100644
--- a/sys/arch/sgi/localbus/com_lbus.c
+++ b/sys/arch/sgi/localbus/com_lbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: com_lbus.c,v 1.10 2009/10/16 14:38:13 miod Exp $ */
+/*	$OpenBSD: com_lbus.c,v 1.11 2009/10/26 18:00:06 miod Exp $ */
 
 /*
  * Copyright (c) 2001-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -41,7 +41,7 @@
 
 #include <mips64/archtype.h>
 
-#include <sgi/localbus/macebus.h>
+#include <sgi/localbus/macebusvar.h>
 
 int	com_macebus_probe(struct device *, void *, void *);
 void	com_macebus_attach(struct device *, struct device *, void *);
@@ -53,19 +53,19 @@ struct cfattach com_macebus_ca = {
 int
 com_macebus_probe(struct device *parent, void *match, void *aux)
 {
-	struct confargs *ca = aux;
+	struct macebus_attach_args *maa = aux;
 	bus_space_handle_t ioh;
 	int rv;
 
 	/* If it's in use as the console, then it's there. */
-	if (ca->ca_baseaddr == comconsaddr && !comconsattached)
+	if (maa->maa_baseaddr == comconsaddr && !comconsattached)
 		return (1);
 
-	if (bus_space_map(ca->ca_iot, ca->ca_baseaddr, COM_NPORTS, 0, &ioh))
+	if (bus_space_map(maa->maa_iot, maa->maa_baseaddr, COM_NPORTS, 0, &ioh))
 		return (0);
 
-	rv = comprobe1(ca->ca_iot, ioh);
-	bus_space_unmap(ca->ca_iot, ioh, COM_NPORTS);
+	rv = comprobe1(maa->maa_iot, ioh);
+	bus_space_unmap(maa->maa_iot, ioh, COM_NPORTS);
 
 	return rv;
 }
@@ -74,22 +74,22 @@ void
 com_macebus_attach(struct device *parent, struct device *self, void *aux)
 {
 	struct com_softc *sc = (void *)self;
-	struct confargs *ca = aux;
+	struct macebus_attach_args *maa = aux;
 
-	sc->sc_iot = ca->ca_iot;
+	sc->sc_iot = maa->maa_iot;
 	sc->sc_hwflags = 0;
 	sc->sc_swflags = 0;
-	sc->sc_iobase = ca->ca_baseaddr;
+	sc->sc_iobase = maa->maa_baseaddr;
 	sc->sc_frequency = 1843200;
 
 	/* If it's in use as the console, then it's there. */
-	if (ca->ca_baseaddr == comconsaddr && !comconsattached) {
+	if (maa->maa_baseaddr == comconsaddr && !comconsattached) {
 		if (comcnattach(sc->sc_iot, sc->sc_iobase, comconsrate,
 		    sc->sc_frequency, (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8))
 			panic("failed to setup serial console!");
 		sc->sc_ioh = comconsioh;
 	} else {
-		if (bus_space_map(sc->sc_iot, ca->ca_baseaddr, COM_NPORTS, 0,
+		if (bus_space_map(sc->sc_iot, maa->maa_baseaddr, COM_NPORTS, 0,
 		    &sc->sc_ioh)) {
 			printf(": can't map i/o space\n");
 			return;
@@ -98,6 +98,6 @@ com_macebus_attach(struct device *parent, struct device *self, void *aux)
 
 	com_attach_subr(sc);
 
-	macebus_intr_establish(NULL, ca->ca_intr, IST_EDGE, IPL_TTY, comintr,
-	    (void *)sc, sc->sc_dev.dv_xname);
+	macebus_intr_establish(maa->maa_intr, maa->maa_mace_intr,
+	    IST_EDGE, IPL_TTY, comintr, (void *)sc, sc->sc_dev.dv_xname);
 }
diff --git a/sys/arch/sgi/localbus/macebus.c b/sys/arch/sgi/localbus/macebus.c
index 98e91dbddcd..1ffba232f99 100644
--- a/sys/arch/sgi/localbus/macebus.c
+++ b/sys/arch/sgi/localbus/macebus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: macebus.c,v 1.51 2009/10/22 22:08:54 miod Exp $ */
+/*	$OpenBSD: macebus.c,v 1.52 2009/10/26 18:00:06 miod Exp $ */
 
 /*
  * Copyright (c) 2000-2004 Opsycon AB  (www.opsycon.se)
@@ -47,17 +47,19 @@
 
 #include <sgi/localbus/crimebus.h>
 #include <sgi/localbus/macebus.h>
+#include <sgi/localbus/macebusvar.h>
 
 int	 macebusmatch(struct device *, void *, void *);
 void	 macebusattach(struct device *, struct device *, void *);
 int	 macebusprint(void *, const char *);
-int	 macebussearch(struct device *, void *, void *);
+int	 macebussubmatch(struct device *, void *, void *);
 
 void	 macebus_intr_makemasks(void);
 void	 macebus_splx(int);
 uint32_t macebus_iointr(uint32_t, struct trap_frame *);
 uint32_t macebus_aux(uint32_t, struct trap_frame *);
-void	mace_setintrmask(int);
+int	 macebus_iointr_skip(struct intrhand *);
+void	 crime_setintrmask(int);
 
 u_int8_t mace_read_1(bus_space_tag_t, bus_space_handle_t, bus_size_t);
 u_int16_t mace_read_2(bus_space_tag_t, bus_space_handle_t, bus_size_t);
@@ -159,17 +161,44 @@ struct machine_bus_dma_tag mace_bus_dma_tag = {
 
 /*
  * CRIME/MACE interrupt handling declarations: 32 CRIME sources, 32 MACE
- * sources (unmanaged); 1 level.
+ * sources (multiplexed by CRIME); 1 level.
  * We define another level for periodic tasks as well.
  */
 
-struct intrhand *mace_intrhand[CRIME_NINTS];
+struct crime_intrhand {
+	struct	intrhand	ih;
+	uint32_t		mace_irqmask;
+};
+struct crime_intrhand *crime_intrhand[CRIME_NINTS];
 
 #define	INTPRI_MACEIO	(INTPRI_CLOCK + 1)
 #define	INTPRI_MACEAUX	(INTPRI_MACEIO + 1)
 
-uint64_t mace_intem;
-uint64_t mace_imask[NIPLS];
+uint64_t crime_intem, mace_intem;
+uint64_t crime_imask[NIPLS];
+
+/*
+ * List of macebus child devices.
+ */
+
+#define	MACEBUSDEV(name, addr, i, i2) \
+	{ name, &macebus_tag, &macebus_tag, &mace_bus_dma_tag, addr, i, i2 }
+struct macebus_attach_args macebus_children[] = {
+	MACEBUSDEV("com", MACE_ISA_SER1_OFFS, 4, MACE_ISA_INT_SERIAL_1),
+	MACEBUSDEV("com", MACE_ISA_SER2_OFFS, 4, MACE_ISA_INT_SERIAL_2),
+	MACEBUSDEV("dsrtc", MACE_ISA_RTC_OFFS, -1, 0),
+#if 0
+	MACEBUSDEV("lpt", MACE_ISA_EPP_OFFS, 4, MACE_ISA_INT_PARALLEL),
+#endif
+	MACEBUSDEV("macepcibr", MACE_PCI_OFFS, 7, 0),
+	MACEBUSDEV("mavb", MACE_IO_AUDIO_OFFS, 6, MACE_ISA_INT_AUDIO),
+	MACEBUSDEV("mec", MACE_ETHERNET_OFFS, 3, 0),
+	MACEBUSDEV("mkbc", MACE_IO_KBC_OFFS, 5,
+	    MACE_ISA_INT_KBD | MACE_ISA_INT_KBD_POLL |
+	    MACE_ISA_INT_MOUSE | MACE_ISA_INT_MOUSE_POLL),
+	MACEBUSDEV("power", 0, 5, MACE_ISA_INT_RTC)
+};
+#undef	MACEBUSDEV
 
 /*
  * Match bus only to targets which have this bus.
@@ -185,49 +214,39 @@ macebusmatch(struct device *parent, void *match, void *aux)
 int
 macebusprint(void *aux, const char *macebus)
 {
-	struct confargs *ca = aux;
+	struct macebus_attach_args *maa = aux;
 
 	if (macebus != NULL)
-		printf("%s at %s", ca->ca_name, macebus);
+		printf("%s at %s", maa->maa_name, macebus);
 
-	if (ca->ca_baseaddr != 0)
-		printf(" base 0x%08x", ca->ca_baseaddr);
-	if (ca->ca_intr != 0)
-		printf(" irq %d", ca->ca_intr);
+	if (maa->maa_baseaddr != 0)
+		printf(" base 0x%08x", maa->maa_baseaddr);
+	if (maa->maa_intr >= 0)
+		printf(" irq %d", maa->maa_intr);
 
 	return (UNCONF);
 }
 
 int
-macebussearch(struct device *parent, void *child, void *args)
+macebussubmatch(struct device *parent, void *vcf, void *args)
 {
-	struct cfdata *cf = child;
-	struct confargs ca;
-
-	ca.ca_name = cf->cf_driver->cd_name;
-	ca.ca_iot = &macebus_tag;
-	ca.ca_memt = &macebus_tag;
-	ca.ca_dmat = &mace_bus_dma_tag;
-	if (cf->cf_loc[0] == -1)
-		ca.ca_baseaddr = 0;
-	else
-		ca.ca_baseaddr = cf->cf_loc[0];
-	if (cf->cf_loc[1] == -1)
-		ca.ca_intr = 0;
-	else
-		ca.ca_intr = cf->cf_loc[1];
-
-	if ((*cf->cf_attach->ca_match)(parent, cf, &ca) == 0)
-		return (0);
-
-	config_attach(parent, cf, &ca, macebusprint);
-	return (1);
+	struct cfdata *cf = vcf;
+	struct macebus_attach_args *maa = args;
+
+	if (strcmp(cf->cf_driver->cd_name, maa->maa_name) != 0)
+		return 0;
+
+	if (cf->cf_loc[0] != -1 && cf->cf_loc[0] != (int)maa->maa_baseaddr)
+		return 0;
+
+	return (*cf->cf_attach->ca_match)(parent, cf, maa);
 }
 
 void
 macebusattach(struct device *parent, struct device *self, void *aux)
 {
 	u_int32_t creg;
+	uint i;
 
 	/*
 	 * Map and setup CRIME control registers.
@@ -257,9 +276,7 @@ macebusattach(struct device *parent, struct device *self, void *aux)
 		return;
 	}
 
-	/* Turn on all MACE interrupts except for MACE compare/timer. */
-	bus_space_write_8(&macebus_tag, mace_h, MACE_ISA_INT_MASK, 
-	    0xffffffff & ~MACE_ISA_INT_TIMER);
+	bus_space_write_8(&macebus_tag, mace_h, MACE_ISA_INT_MASK, 0);
 	bus_space_write_8(&macebus_tag, mace_h, MACE_ISA_INT_STAT, 0);
 
 	/*
@@ -272,7 +289,12 @@ macebusattach(struct device *parent, struct device *self, void *aux)
 	/* Set up a handler called when clock interrupts go off. */
 	set_intr(INTPRI_MACEAUX, CR_INT_5, macebus_aux);
 
-	config_search(macebussearch, self, aux);
+	/*
+	 * Attach subdevices.
+	 */
+	for (i = 0; i < nitems(macebus_children); i++)
+		config_found_sm(self, macebus_children + i,
+		    macebusprint, macebussubmatch);
 }
 
 /*
@@ -455,29 +477,28 @@ macebus_device_to_pa(bus_addr_t addr)
  * XXX in kernel configuration files...
  */
 void *
-macebus_intr_establish(void *icp, u_long irq, int type, int level,
+macebus_intr_establish(int irq, uint32_t mace_irqmask, int type, int level,
     int (*ih_fun)(void *), void *ih_arg, const char *ih_what)
 {
-	struct intrhand **p, *q, *ih;
+	struct crime_intrhand **p, *q, *ih;
 	int s;
 
 #ifdef DIAGNOSTIC
-	if (irq > CRIME_NINTS || irq < 1)
+	if (irq >= CRIME_NINTS || irq < 0)
 		panic("intr_establish: illegal irq %d", irq);
 #endif
 
-	irq -= 1;	/* Adjust for 1 being first (0 is no int) */
-
 	ih = malloc(sizeof *ih, M_DEVBUF, M_NOWAIT);
 	if (ih == NULL)
 		return NULL;
 
-	ih->ih_next = NULL;
-	ih->ih_fun = ih_fun;
-	ih->ih_arg = ih_arg;
-	ih->ih_level = level;
-	ih->ih_irq = irq + 1;
-	evcount_attach(&ih->ih_count, ih_what, (void *)&ih->ih_irq,
+	ih->ih.ih_next = NULL;
+	ih->ih.ih_fun = ih_fun;
+	ih->ih.ih_arg = ih_arg;
+	ih->ih.ih_level = level;
+	ih->ih.ih_irq = irq;
+	ih->mace_irqmask = mace_irqmask;
+	evcount_attach(&ih->ih.ih_count, ih_what, (void *)&ih->ih.ih_irq,
 	    &evcount_intr);
 
 	s = splhigh();
@@ -487,13 +508,21 @@ macebus_intr_establish(void *icp, u_long irq, int type, int level,
 	 * This is O(N^2), but we want to preserve the order, and N is
 	 * generally small.
 	 */
-	for (p = &mace_intrhand[irq]; (q = *p) != NULL; p = &q->ih_next)
+	for (p = &crime_intrhand[irq]; (q = *p) != NULL;
+	    p = (struct crime_intrhand **)&q->ih.ih_next)
 		;
 	*p = ih;
 
-	mace_intem |= 1UL << irq;
+	crime_intem |= 1UL << irq;
 	macebus_intr_makemasks();
 
+	/* enable further MACE sources if necessary */
+	if (mace_irqmask != 0) {
+		mace_intem |= mace_irqmask;
+		bus_space_write_8(&macebus_tag, mace_h, MACE_ISA_INT_MASK,
+		    mace_intem);
+	}
+
 	splx(s);	/* causes hw mask update */
 
 	return (ih);
@@ -519,7 +548,8 @@ macebus_intr_makemasks(void)
 	/* First, figure out which levels each IRQ uses. */
 	for (irq = 0; irq < CRIME_NINTS; irq++) {
 		uint levels = 0;
-		for (q = mace_intrhand[irq]; q; q = q->ih_next)
+		for (q = (struct intrhand *)crime_intrhand[irq];
+		    q != NULL; q = q->ih_next)
 			levels |= 1 << q->ih_level;
 		intrlevel[irq] = levels;
 	}
@@ -530,7 +560,7 @@ macebus_intr_makemasks(void)
 		for (irq = 0; irq < CRIME_NINTS; irq++)
 			if (intrlevel[irq] & (1 << level))
 				irqs |= 1UL << irq;
-		mace_imask[level] = irqs;
+		crime_imask[level] = irqs;
 	}
 
 	/*
@@ -540,16 +570,16 @@ macebus_intr_makemasks(void)
 	 * Enforce a hierarchy that gives slow devices a better chance at not
 	 * dropping data.
 	 */
-	mace_imask[IPL_NET] |= mace_imask[IPL_BIO];
-	mace_imask[IPL_TTY] |= mace_imask[IPL_NET];
-	mace_imask[IPL_VM] |= mace_imask[IPL_TTY];
-	mace_imask[IPL_CLOCK] |= mace_imask[IPL_VM];
+	crime_imask[IPL_NET] |= crime_imask[IPL_BIO];
+	crime_imask[IPL_TTY] |= crime_imask[IPL_NET];
+	crime_imask[IPL_VM] |= crime_imask[IPL_TTY];
+	crime_imask[IPL_CLOCK] |= crime_imask[IPL_VM];
 
 	/*
 	 * These are pseudo-levels.
 	 */
-	mace_imask[IPL_NONE] = 0;
-	mace_imask[IPL_HIGH] = -1UL;
+	crime_imask[IPL_NONE] = 0;
+	crime_imask[IPL_HIGH] = -1UL;
 }
 
 void
@@ -561,7 +591,7 @@ macebus_splx(int newipl)
 	__asm__ (".set noreorder\n");
 	ci->ci_ipl = newipl;
 	__asm__ ("sync\n\t.set reorder\n");
-	mace_setintrmask(newipl);
+	crime_setintrmask(newipl);
 	/* If we still have softints pending trigger processing. */
 	if (ci->ci_softpending != 0 && newipl < IPL_SOFTINT)
 		setsoftintr0();
@@ -581,19 +611,50 @@ do { \
 } while (0)
 #define	INTR_MASKPENDING \
 	bus_space_write_8(&crimebus_tag, crime_h, CRIME_INT_MASK, imr & ~isr)
-#define	INTR_IMASK(ipl)		mace_imask[ipl]
-#define	INTR_HANDLER(bit)	mace_intrhand[bit]
+#define	INTR_IMASK(ipl)		crime_imask[ipl]
+#define	INTR_HANDLER(bit)	(struct intrhand *)crime_intrhand[bit]
 #define	INTR_SPURIOUS(bit) \
 do { \
-	/* XXX +1 because of -1 in intr_establish() */ \
-	if (bit != 4) \
-		printf("spurious crime interrupt %d\n", bit + 1); \
+	uint64_t mace_isr, mace_imr; \
+	mace_isr = bus_space_read_8(&macebus_tag, mace_h, MACE_ISA_INT_STAT); \
+	mace_imr = bus_space_read_8(&macebus_tag, mace_h, MACE_ISA_INT_MASK); \
+	/* serial console processing may clear interrupt condition \
+	   before it fires */ \
+	if (bit != 4 || (mace_isr & mace_imr) != 0) \
+		printf("spurious crime interrupt %d mace isr %p imr %p\n", \
+		    bit, mace_isr, mace_imr); \
 } while (0)
 #define	INTR_MASKRESTORE \
 	bus_space_write_8(&crimebus_tag, crime_h, CRIME_INT_MASK, imr)
 
+#define	INTR_HANDLER_SKIP(ih)	macebus_iointr_skip((void *)ih)
+
 #include <sgi/sgi/intr_template.c>
 
+int
+macebus_iointr_skip(struct intrhand *ih)
+{
+	struct crime_intrhand *mih = (struct crime_intrhand *)ih;
+	uint64_t mace_isr, mace_imr;
+
+	/* do not skip pure CRIME interrupts */
+	if (mih->mace_irqmask == 0)
+		return 0;
+
+	/*
+	 * Several CRIME interrupts (such as superio and miscellaneous) are
+	 * shared by multiple devices, so narrow the selection with the
+	 * MACE interrupt status.
+	 */
+
+	mace_isr = bus_space_read_8(&macebus_tag, mace_h, MACE_ISA_INT_STAT);
+	mace_imr = bus_space_read_8(&macebus_tag, mace_h, MACE_ISA_INT_MASK);
+	if ((mace_isr & mace_imr & mih->mace_irqmask) != 0)
+		return 0;
+
+	return 1;
+}
+
 /*
  * Macebus auxilary functions run each clock interrupt.
  */
@@ -612,7 +673,7 @@ macebus_aux(uint32_t hwpend, struct trap_frame *cf)
 		mask &= ~MACE_ISA_MISC_RLED_OFF;
 	} else if (curproc == NULL ||
 	    curproc == curcpu()->ci_schedstate.spc_idleproc) {
-		mask &= ~MACE_ISA_MISC_GLED_OFF;	
+		mask &= ~MACE_ISA_MISC_GLED_OFF;
 	} else {
 		mask &= ~(MACE_ISA_MISC_RLED_OFF | MACE_ISA_MISC_GLED_OFF);
 	}
@@ -622,8 +683,8 @@ macebus_aux(uint32_t hwpend, struct trap_frame *cf)
 }
 
 void
-mace_setintrmask(int level)
+crime_setintrmask(int level)
 {
 	*(volatile uint64_t *)(PHYS_TO_XKPHYS(CRIMEBUS_BASE, CCA_NC) +
-	    CRIME_INT_MASK) = mace_intem & ~mace_imask[level];
+	    CRIME_INT_MASK) = crime_intem & ~crime_imask[level];
 }
diff --git a/sys/arch/sgi/localbus/macebus.h b/sys/arch/sgi/localbus/macebus.h
index 63ca7f0ffd0..78c35bfe4c2 100644
--- a/sys/arch/sgi/localbus/macebus.h
+++ b/sys/arch/sgi/localbus/macebus.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: macebus.h,v 1.14 2009/10/22 20:51:08 miod Exp $	*/
+/*	$OpenBSD: macebus.h,v 1.15 2009/10/26 18:00:06 miod Exp $	*/
 
 /*
  * Copyright (c) 2003-2004 Opsycon AB (www.opsycon.com).
@@ -26,11 +26,6 @@
  *
  */
 
-#ifndef	_MACEBUS_H_
-#define	_MACEBUS_H_ 1
-
-#include <machine/bus.h>
-
 /*
  *  Physical address of MACEBUS.
  */
@@ -43,6 +38,7 @@
 #define	MACE_VIN1_OFFS		0x00100000
 #define	MACE_VIN2_OFFS		0x00180000
 #define	MACE_VOUT_OFFS		0x00200000
+#define	MACE_ETHERNET_OFFS	0x00280000
 #define	MACE_IO_OFFS		0x00300000
 #define	MACE_IO_SIZE		0x00050000
 #define	MACE_ISAX_OFFS		0x00380000
@@ -79,6 +75,11 @@
 #define	PERR_DATA_PARITY_ADDR_VALID	0x00020000
 #define	PERR_RETRY_ADDR_VALID		0x00010000
 
+/*
+ * MACE IO definitions.
+ */
+#define	MACE_IO_AUDIO_OFFS	(MACE_IO_OFFS+0x00000000)
+#define	MACE_IO_KBC_OFFS	(MACE_IO_OFFS+0x00020000)
 
 /*
  *  MACE ISA definitions.
@@ -118,12 +119,3 @@
 #define	MACE_ISA_SER2_OFFS	(MACE_ISAX_OFFS+0x00018000)
 #define	MACE_ISA_RTC_OFFS	(MACE_ISAX_OFFS+0x00020000)
 #define	MACE_ISA_GAME_OFFS	(MACE_ISAX_OFFS+0x00030000)
-
-extern bus_space_t macebus_tag;
-extern struct machine_bus_dma_tag mace_bus_dma_tag;
-
-void   *macebus_intr_establish(void *, u_long, int, int, int (*)(void *),
-	    void *, const char *);
-void	macebus_intr_disestablish(void *);
-
-#endif	/* _MACEBUS_H_ */
diff --git a/sys/arch/sgi/pci/macepcibridge.c b/sys/arch/sgi/pci/macepcibridge.c
index 22db0511a01..36a9e50dd8b 100644
--- a/sys/arch/sgi/pci/macepcibridge.c
+++ b/sys/arch/sgi/pci/macepcibridge.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: macepcibridge.c,v 1.35 2009/10/22 20:52:39 miod Exp $ */
+/*	$OpenBSD: macepcibridge.c,v 1.36 2009/10/26 18:00:06 miod Exp $ */
 
 /*
  * Copyright (c) 2009 Miodrag Vallat.
@@ -69,6 +69,7 @@
 #include <mips64/archtype.h>
 #include <sgi/localbus/crimebus.h>
 #include <sgi/localbus/macebus.h>
+#include <sgi/localbus/macebusvar.h>
 #include <sgi/pci/macepcibrvar.h>
 
 #include "cardbus.h"
@@ -195,11 +196,9 @@ static int      mace_pcibrprint(void *, const char *pnp);
 int
 mace_pcibrmatch(struct device *parent, void *match, void *aux)
 {
-	static int once = 0;
-
 	switch (sys_config.system_type) {
 	case SGI_O2:
-		return once++ == 0 ? 1 : 0;
+		return 1;
 	default:
 		return 0;
 	}
@@ -210,25 +209,26 @@ mace_pcibrattach(struct device *parent, struct device *self, void *aux)
 {
 	struct mace_pcibr_softc *sc = (struct mace_pcibr_softc *)self;
 	struct pcibus_attach_args pba;
-	struct confargs *ca = aux;
+	struct macebus_attach_args *maa = aux;
 	pcireg_t pcireg;
 
 	sc->sc_mem_bus_space = &mace_pcibbus_mem_tag;
 	sc->sc_io_bus_space = &mace_pcibbus_io_tag;
 
 	/* Map in PCI control registers */
-	sc->sc_memt = ca->ca_memt;
-	if (bus_space_map(sc->sc_memt, MACE_PCI_OFFS, 4096, 0, &sc->sc_memh)) {
+	sc->sc_memt = maa->maa_memt;
+	if (bus_space_map(sc->sc_memt, maa->maa_baseaddr, 4096, 0,
+	    &sc->sc_memh)) {
 		printf(": can't map PCI control registers\n");
 		return;
 	}
 	pcireg = bus_space_read_4(sc->sc_memt, sc->sc_memh, MACE_PCI_REVISION);
 
-	printf(": mace rev %d, host system O2\n", pcireg);
+	printf(": mace rev %d\n", pcireg);
 
 	/* Register the PCI ERROR interrupt handler */
-	macebus_intr_establish(NULL, 8, IST_LEVEL, IPL_HIGH,
-	    mace_pcibr_errintr, (void *)sc, sc->sc_dev.dv_xname);
+	macebus_intr_establish(maa->maa_intr, maa->maa_mace_intr,
+	    IST_LEVEL, IPL_HIGH, mace_pcibr_errintr, sc, sc->sc_dev.dv_xname);
 
 	sc->sc_pc.pc_conf_v = sc;
 	sc->sc_pc.pc_attach_hook = mace_pcibr_attach_hook;
@@ -356,7 +356,7 @@ mace_pcibr_decompose_tag(void *cpv, pcitag_t tag, int *busp, int *devp,
 int
 mace_pcibr_bus_maxdevs(void *cpv, int busno)
 {
-	return busno == 0 ? 4 : 32;
+	return busno == 0 ? 6 : 32;
 }
 
 pcireg_t
@@ -420,13 +420,11 @@ mace_pcibr_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
 	int bus, dev, pin = pa->pa_rawintrpin;
 	static const signed char intrmap[][PCI_INTERRUPT_PIN_MAX] = {
 		{ -1, -1, -1, -1 },
-		{ 9, -1, -1, -1 },	/* ahc0 */
-		{ 10, -1, -1, -1 },	/* ahc1 */
-		{ 11, 14, 15, 16 },	/* slot */
-#ifdef useless
-		{ 12, 16, 14, 15 },	/* no slots... */
-		{ 13, 15, 16, 14 }	/* ... unless you solder them */
-#endif
+		{ 8, -1, -1, -1 },	/* ahc0 */
+		{ 9, -1, -1, -1 },	/* ahc1 */
+		{ 10, 13, 14, 15 },	/* slot */
+		{ 11, 15, 13, 14 },	/* no slots... */
+		{ 12, 14, 15, 13 }	/* ... unless you solder them */
 	};
 
 	*ihp = -1;
@@ -470,8 +468,7 @@ void *
 mace_pcibr_intr_establish(void *lcv, pci_intr_handle_t ih, int level,
     int (*func)(void *), void *arg, const char *name)
 {
-	return
-	    macebus_intr_establish(NULL, ih, IST_LEVEL, level, func, arg, name);
+	return macebus_intr_establish(ih, 0, IST_LEVEL, level, func, arg, name);
 }
 
 void
diff --git a/sys/arch/sgi/sgi/intr_template.c b/sys/arch/sgi/sgi/intr_template.c
index 30ca5ceb517..539c41590f7 100644
--- a/sys/arch/sgi/sgi/intr_template.c
+++ b/sys/arch/sgi/sgi/intr_template.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: intr_template.c,v 1.1 2009/10/22 22:08:54 miod Exp $	*/
+/*	$OpenBSD: intr_template.c,v 1.2 2009/10/26 18:00:06 miod Exp $	*/
 
 /*
  * Copyright (c) 2009 Miodrag Vallat.
@@ -30,6 +30,9 @@
  * INTR_MASKPENDING	logic to mask `isr'
  * INTR_MASKRESTORE	logic to reset `imr'
  * INTR_SPURIOUS(bit)	print a spurious interrupt message for `bit'
+ *
+ * The following macros are optional:
+ * INTR_HANDLER_SKIP(ih)	nonzero to skip intrhand invocation
  */
 
 uint32_t
@@ -87,6 +90,10 @@ INTR_FUNCTIONNAME(uint32_t hwpend, struct trap_frame *frame)
 				rc = 0;
 				for (ih = INTR_HANDLER(bitno); ih != NULL;
 				    ih = ih->ih_next) {
+#if defined(INTR_HANDLER_SKIP)
+					if (INTR_HANDLER_SKIP(ih) != 0)
+						continue;
+#endif
 					splraise(ih->ih_level);
 					ih->frame = frame;
 					if ((*ih->ih_fun)(ih->ih_arg) != 0) {
@@ -118,6 +125,7 @@ INTR_FUNCTIONNAME(uint32_t hwpend, struct trap_frame *frame)
 #undef	INTR_FUNCTIONNAME
 #undef	INTR_GETMASKS
 #undef	INTR_HANDLER
+#undef	INTR_HANDLER_SKIP
 #undef	INTR_IMASK
 #undef	INTR_LOCAL_DECLS
 #undef	INTR_MASKPENDING
diff --git a/sys/arch/sgi/sgi/ip32_machdep.c b/sys/arch/sgi/sgi/ip32_machdep.c
index da93222cc9c..d2bc342e232 100644
--- a/sys/arch/sgi/sgi/ip32_machdep.c
+++ b/sys/arch/sgi/sgi/ip32_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ip32_machdep.c,v 1.9 2009/10/16 14:38:15 miod Exp $ */
+/*	$OpenBSD: ip32_machdep.c,v 1.10 2009/10/26 18:00:06 miod Exp $ */
 
 /*
  * Copyright (c) 2003-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -45,6 +45,7 @@
 
 #include <sgi/localbus/crimebus.h>
 #include <sgi/localbus/macebus.h>
+#include <sgi/localbus/macebusvar.h>
 
 #include <dev/ic/comvar.h>
 
diff --git a/sys/arch/sgi/sgi/wscons_machdep.c b/sys/arch/sgi/sgi/wscons_machdep.c
index 998648a1f7e..9c8575864d9 100644
--- a/sys/arch/sgi/sgi/wscons_machdep.c
+++ b/sys/arch/sgi/sgi/wscons_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: wscons_machdep.c,v 1.3 2008/01/23 16:37:56 jsing Exp $ */
+/*	$OpenBSD: wscons_machdep.c,v 1.4 2009/10/26 18:00:06 miod Exp $ */
 
 /*
  * Copyright (c) 2001 Aaron Campbell
@@ -40,7 +40,7 @@
 #include <mips64/archtype.h>
 
 #include <sgi/localbus/crimebus.h>
-#include <sgi/localbus/macebus.h>
+#include <sgi/localbus/macebusvar.h>
 
 #include <sgi/dev/gbereg.h>
 #include <sgi/dev/mkbcreg.h>