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authorPatrick Wildt <patrick@cvs.openbsd.org>2020-04-27 16:37:37 +0000
committerPatrick Wildt <patrick@cvs.openbsd.org>2020-04-27 16:37:37 +0000
commit16acbb206d625262b60ca91b67378153e2375c87 (patch)
treeade876acca2a78656cb2467e4d83cc9ff885feba /sys/dev/fdt/imxccm_clocks.h
parent5434fbc34e7c41e55b5e59ab0ea73b6070c354ec (diff)
The parent of the i.MX8MM and i.MX8MQ USB_CTRL_ROOTs is USB_BUS,
not USB_CORE_REF.
Diffstat (limited to 'sys/dev/fdt/imxccm_clocks.h')
-rw-r--r--sys/dev/fdt/imxccm_clocks.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/sys/dev/fdt/imxccm_clocks.h b/sys/dev/fdt/imxccm_clocks.h
index 735c526475e..9016ae9d8b2 100644
--- a/sys/dev/fdt/imxccm_clocks.h
+++ b/sys/dev/fdt/imxccm_clocks.h
@@ -380,7 +380,7 @@ struct imxccm_gate imx8mm_gates[] = {
[IMX8MM_CLK_UART2_ROOT] = { 0x44a0, 0, IMX8MM_CLK_UART2 },
[IMX8MM_CLK_UART3_ROOT] = { 0x44b0, 0, IMX8MM_CLK_UART3 },
[IMX8MM_CLK_UART4_ROOT] = { 0x44c0, 0, IMX8MM_CLK_UART4 },
- [IMX8MM_CLK_USB1_CTRL_ROOT] = { 0x44d0, 0, IMX8MM_CLK_USB_CORE_REF },
+ [IMX8MM_CLK_USB1_CTRL_ROOT] = { 0x44d0, 0, IMX8MM_CLK_USB_BUS },
[IMX8MM_CLK_USDHC1_ROOT] = { 0x4510, 0, IMX8MM_CLK_USDHC1 },
[IMX8MM_CLK_USDHC2_ROOT] = { 0x4520, 0, IMX8MM_CLK_USDHC2 },
[IMX8MM_CLK_USDHC3_ROOT] = { 0x45e0, 0, IMX8MM_CLK_USDHC3 },
@@ -588,8 +588,8 @@ struct imxccm_gate imx8mq_gates[] = {
[IMX8MQ_CLK_UART2_ROOT] = { 0x44a0, 0, IMX8MQ_CLK_UART2 },
[IMX8MQ_CLK_UART3_ROOT] = { 0x44b0, 0, IMX8MQ_CLK_UART3 },
[IMX8MQ_CLK_UART4_ROOT] = { 0x44c0, 0, IMX8MQ_CLK_UART4 },
- [IMX8MQ_CLK_USB1_CTRL_ROOT] = { 0x44d0, 0, IMX8MQ_CLK_USB_CORE_REF },
- [IMX8MQ_CLK_USB2_CTRL_ROOT] = { 0x44e0, 0, IMX8MQ_CLK_USB_CORE_REF },
+ [IMX8MQ_CLK_USB1_CTRL_ROOT] = { 0x44d0, 0, IMX8MQ_CLK_USB_BUS },
+ [IMX8MQ_CLK_USB2_CTRL_ROOT] = { 0x44e0, 0, IMX8MQ_CLK_USB_BUS },
[IMX8MQ_CLK_USB1_PHY_ROOT] = { 0x44f0, 0, IMX8MQ_CLK_USB_PHY_REF },
[IMX8MQ_CLK_USB2_PHY_ROOT] = { 0x4500, 0, IMX8MQ_CLK_USB_PHY_REF },
[IMX8MQ_CLK_USDHC1_ROOT] = { 0x4510, 0, IMX8MQ_CLK_USDHC1 },