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authorMark Kettenis <kettenis@cvs.openbsd.org>2020-04-03 22:03:46 +0000
committerMark Kettenis <kettenis@cvs.openbsd.org>2020-04-03 22:03:46 +0000
commit05ac8be6f074867994874c1f5fd55b58e7acbf96 (patch)
tree7b9dbd94ce070a8ef428e215765edec4db3c494d /sys/dev/fdt
parent8baf0724dd1235767b077ddafd31352ebaa84da7 (diff)
Put back the code to enable and set the output tap delay. Tis fixes
the eMMC module on my rockpro64 and doesn't break the eMMC on the rk3399-q7 board I have. Sadly the eMMC on my firefly-rk3399 died, which may or may not have something to do with the fact that there were issues with enabling the output tap delay on that board. ok patrick@
Diffstat (limited to 'sys/dev/fdt')
-rw-r--r--sys/dev/fdt/rkemmcphy.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/sys/dev/fdt/rkemmcphy.c b/sys/dev/fdt/rkemmcphy.c
index c452b97842f..229108c5af0 100644
--- a/sys/dev/fdt/rkemmcphy.c
+++ b/sys/dev/fdt/rkemmcphy.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: rkemmcphy.c,v 1.2 2020/01/11 10:32:16 kettenis Exp $ */
+/* $OpenBSD: rkemmcphy.c,v 1.3 2020/04/03 22:03:45 kettenis Exp $ */
/*
* Copyright (c) 2019 Patrick Wildt <patrick@blueri.se>
*
@@ -165,6 +165,11 @@ rkemmcphy_enable(void *cookie, uint32_t *cells)
HWRITE4(sc, GRF_EMMCPHY_CON6, GRF_EMMCPHY_CON6_DR_CLR | impedance);
+ HWRITE4(sc, GRF_EMMCPHY_CON0,
+ GRF_EMMCPHY_CON0_OTAPDLYENA_CLR | GRF_EMMCPHY_CON0_OTAPDLYENA_EN);
+ HWRITE4(sc, GRF_EMMCPHY_CON0,
+ GRF_EMMCPHY_CON0_OTAPDLYSEL_CLR | GRF_EMMCPHY_CON0_OTAPDLYSEL_4);
+
HWRITE4(sc, GRF_EMMCPHY_CON6,
GRF_EMMCPHY_CON6_PDB_CLR | GRF_EMMCPHY_CON6_PDB_OFF |
GRF_EMMCPHY_CON6_ENDLL_CLR | GRF_EMMCPHY_CON6_ENDLL_OFF);