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authorMark Kettenis <kettenis@cvs.openbsd.org>2018-05-26 12:49:17 +0000
committerMark Kettenis <kettenis@cvs.openbsd.org>2018-05-26 12:49:17 +0000
commit8eba25f4886c267dc0274c3d3cae1f6b3a54022a (patch)
tree2ca356c59f279c4dfef1d8c91bddc6ee10958f02 /sys/dev/fdt
parent5257ebe4f57984d53b75bd79fbcfe5c4df9b1a64 (diff)
Add clocks for RK3399 SDIO controller.
Diffstat (limited to 'sys/dev/fdt')
-rw-r--r--sys/dev/fdt/rkclock.c31
-rw-r--r--sys/dev/fdt/rkclock_clocks.h1
2 files changed, 31 insertions, 1 deletions
diff --git a/sys/dev/fdt/rkclock.c b/sys/dev/fdt/rkclock.c
index 505f97d0e18..128d0c0a2f8 100644
--- a/sys/dev/fdt/rkclock.c
+++ b/sys/dev/fdt/rkclock.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: rkclock.c,v 1.22 2018/02/25 20:42:13 kettenis Exp $ */
+/* $OpenBSD: rkclock.c,v 1.23 2018/05/26 12:49:16 kettenis Exp $ */
/*
* Copyright (c) 2017, 2018 Mark Kettenis <kettenis@openbsd.org>
*
@@ -1074,6 +1074,35 @@ rk3399_get_frequency(void *cookie, uint32_t *cells)
}
return rk3399_get_frequency(sc, &idx) / (div_con + 1);
break;
+ case RK3399_CLK_SDIO:
+ reg = HREAD4(sc, RK3399_CRU_CLKSEL_CON(15));
+ mux = (reg >> 8) & 0x7;
+ div_con = reg & 0x7f;
+ switch (mux) {
+ case 0:
+ idx = RK3399_PLL_CPLL;
+ break;
+ case 1:
+ idx = RK3399_PLL_GPLL;
+ break;
+ case 2:
+ idx = RK3399_PLL_NPLL;
+ break;
+#ifdef notyet
+ case 3:
+ idx = RK3399_PLL_PPLL;
+ break;
+ case 4:
+ idx = RK3399_USB_480M;
+ break;
+#endif
+ case 5:
+ return 24000000 / (div_con + 1);
+ default:
+ return 0;
+ }
+ return rk3399_get_frequency(sc, &idx) / (div_con + 1);
+ break;
case RK3399_CLK_UART0:
reg = HREAD4(sc, RK3399_CRU_CLKSEL_CON(33));
mux = (reg >> 8) & 0x3;
diff --git a/sys/dev/fdt/rkclock_clocks.h b/sys/dev/fdt/rkclock_clocks.h
index 3bdc4f0c107..46d4dbc9dda 100644
--- a/sys/dev/fdt/rkclock_clocks.h
+++ b/sys/dev/fdt/rkclock_clocks.h
@@ -76,6 +76,7 @@
#define RK3399_CLK_I2C6 69
#define RK3399_CLK_I2C7 70
#define RK3399_CLK_SDMMC 76
+#define RK3399_CLK_SDIO 77
#define RK3399_CLK_EMMC 78
#define RK3399_CLK_TSADC 79
#define RK3399_CLK_UART0 81