Contrary to e. g. the xHCI specification, the AHCI rev. 1.3 spec

does not say anything about which type (snoopable/uncached etc.) of
bus transactions are issued by HBAs on accesses to the descriptors.
Thus, the right assumption would be "classical" concurrent accesses
by both CPU/driver as well as hardware to the descriptors and their
DMA memory backings respectively, which is also confirmed by actual
testing. Consequently, switch to BUS_DMA_COHERENT mappings for said
DMA memory as otherwise corruption of descriptors is seen.

From Marius Strobl

tested by awolk (amd64), bluhm (amd64, i386), myself (amd64, armv7)
ok jmatthew@

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