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authorFederico G. Schwindt <fgsch@cvs.openbsd.org>1999-05-02 22:35:41 +0000
committerFederico G. Schwindt <fgsch@cvs.openbsd.org>1999-05-02 22:35:41 +0000
commitcfda8b8847afc6a44e952fa3a892e806823a7257 (patch)
treedd351927090d64e44d7d1b657b7936319dbacb4d /sys/dev/ic/i82365.c
parent90818f1a628cce299c28451fe18ca8718e6b4a7f (diff)
Add support for Vadem PCMCIA controllers.
Diffstat (limited to 'sys/dev/ic/i82365.c')
-rw-r--r--sys/dev/ic/i82365.c63
1 files changed, 54 insertions, 9 deletions
diff --git a/sys/dev/ic/i82365.c b/sys/dev/ic/i82365.c
index 1e4db8972a2..191bdcbe4b3 100644
--- a/sys/dev/ic/i82365.c
+++ b/sys/dev/ic/i82365.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: i82365.c,v 1.6 1999/02/13 09:58:38 fgsch Exp $ */
+/* $OpenBSD: i82365.c,v 1.7 1999/05/02 22:35:40 fgsch Exp $ */
/* $NetBSD: i82365.c,v 1.10 1998/06/09 07:36:55 thorpej Exp $ */
/*
@@ -57,8 +57,11 @@
#define PCIC_VENDOR_UNKNOWN 0
#define PCIC_VENDOR_I82365SLR0 1
#define PCIC_VENDOR_I82365SLR1 2
-#define PCIC_VENDOR_CIRRUS_PD6710 3
-#define PCIC_VENDOR_CIRRUS_PD672X 4
+#define PCIC_VENDOR_I82365SLR2 3
+#define PCIC_VENDOR_CIRRUS_PD6710 4
+#define PCIC_VENDOR_CIRRUS_PD672X 5
+#define PCIC_VENDOR_VADEM_VG468 6
+#define PCIC_VENDOR_VADEM_VG469 7
/*
* Individual drivers will allocate their own memory and io regions. Memory
@@ -109,7 +112,7 @@ int
pcic_vendor(h)
struct pcic_handle *h;
{
- int reg;
+ int vendor, reg;
/*
* the chip_id of the cirrus toggles between 11 and 00 after a write.
@@ -132,12 +135,42 @@ pcic_vendor(h)
reg = pcic_read(h, PCIC_IDENT);
- if ((reg & PCIC_IDENT_REV_MASK) == PCIC_IDENT_REV_I82365SLR0)
- return (PCIC_VENDOR_I82365SLR0);
- else
- return (PCIC_VENDOR_I82365SLR1);
+ switch (reg) {
+ case PCIC_IDENT_REV_I82365SLR0:
+ vendor = PCIC_VENDOR_I82365SLR0;
+ break;
+ case PCIC_IDENT_REV_I82365SLR1:
+ vendor = PCIC_VENDOR_I82365SLR1;
+ break;
+ case PCIC_IDENT_REV_I82365SLR2:
+ vendor = PCIC_VENDOR_I82365SLR2;
+ break;
+ default:
+ vendor = PCIC_VENDOR_UNKNOWN;
+ break;
+ }
+
+ pcic_write(h, 0x0e, -1);
+ pcic_write(h, 0x37, -1);
- return (PCIC_VENDOR_UNKNOWN);
+ reg = pcic_read(h, PCIC_VG468_MISC);
+ reg |= PCIC_VG468_MISC_VADEMREV;
+ pcic_write(h, PCIC_VG468_MISC, reg);
+
+ reg = pcic_read(h, PCIC_IDENT);
+
+ if (reg & PCIC_IDENT_VADEM_MASK) {
+ if ((reg & 7) >= 4)
+ vendor = PCIC_VENDOR_VADEM_VG469;
+ else
+ vendor = PCIC_VENDOR_VADEM_VG468;
+
+ reg = pcic_read(h, PCIC_VG468_MISC);
+ reg &= ~PCIC_VG468_MISC_VADEMREV;
+ pcic_write(h, PCIC_VG468_MISC, reg);
+ }
+
+ return (vendor);
}
char *
@@ -149,10 +182,16 @@ pcic_vendor_to_string(vendor)
return ("Intel 82365SL Revision 0");
case PCIC_VENDOR_I82365SLR1:
return ("Intel 82365SL Revision 1");
+ case PCIC_VENDOR_I82365SLR2:
+ return ("Intel 82365SL Revision 2");
case PCIC_VENDOR_CIRRUS_PD6710:
return ("Cirrus PD6710");
case PCIC_VENDOR_CIRRUS_PD672X:
return ("Cirrus PD672X");
+ case PCIC_VENDOR_VADEM_VG468:
+ return ("Vadem VG468");
+ case PCIC_VENDOR_VADEM_VG469:
+ return ("Vadem VG469");
}
return ("Unknown controller");
@@ -1116,6 +1155,12 @@ pcic_chip_socket_enable(pch)
*/
delay((300 + 100) * 1000);
+ if (h->vendor == PCIC_VENDOR_VADEM_VG469) {
+ reg = pcic_read(h, PCIC_VG469_VSELECT);
+ reg &= ~PCIC_VG469_VSELECT_VCC;
+ pcic_write(h, PCIC_VG469_VSELECT, reg);
+ }
+
/* power up the socket */
pcic_write(h, PCIC_PWRCTL, PCIC_PWRCTL_DISABLE_RESETDRV