diff options
| author | Jonathan Gray <jsg@cvs.openbsd.org> | 2006-01-05 05:36:07 +0000 |
|---|---|---|
| committer | Jonathan Gray <jsg@cvs.openbsd.org> | 2006-01-05 05:36:07 +0000 |
| commit | 275e5a4c78f35d4b0aa9cfd4d9e5346e8fc0c513 (patch) | |
| tree | 527d6cd0c62bd6832bfbcc175c85430b51f5c3de /sys/dev/ic/rtwreg.h | |
| parent | 5b2a424ce2d437402a1b7084e2b02add0c5a4f5e (diff) | |
part of rev 1.58 of rtw.c David Young comitted to NetBSD:
Miscellaneous Realtek RTL8180L driver improvements:
3 Revamp handling of transmit descriptor rings.
4 Reliably IFF_OACTIVE when transmit descriptors are available, to
stop the transmit section of the driver from freezing up.
5 Fix beacon transmission in adhoc and hostap modes. XXX There is
a wart in hostap mode, where beacons are transmitted at 1/2 the
correct rate. Load beacon descriptors when the RTW_INTR_BINT
interrupt arrives; schedule RTW_INTR_BINT 1ms ahead of the target
beacon time.
6 Recover more gracefully from tx/rx errors: avoid
transmitter/receiver/chip resets. Try to re-synchronize software
state with hardware state---e.g., load next descriptor pointer
from hardware.
7 Activate the transmit watchdog timer for beacons as well as other
packets.
8 Introduce rtw_idle() that waits for transmit DMA to finish; call
it before resetting the transmitter.
Diffstat (limited to 'sys/dev/ic/rtwreg.h')
| -rw-r--r-- | sys/dev/ic/rtwreg.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/sys/dev/ic/rtwreg.h b/sys/dev/ic/rtwreg.h index bf1b3b9d187..f4efc6b1f1e 100644 --- a/sys/dev/ic/rtwreg.h +++ b/sys/dev/ic/rtwreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: rtwreg.h,v 1.11 2005/11/20 09:49:06 jsg Exp $ */ +/* $OpenBSD: rtwreg.h,v 1.12 2006/01/05 05:36:06 jsg Exp $ */ /* $NetBSD: rtwreg.h,v 1.12 2005/01/16 11:50:43 dyoung Exp $ */ /*- * Copyright (c) 2004, 2005 David Young. All rights reserved. @@ -231,7 +231,7 @@ #define RTW_INTR_TX (RTW_INTR_TLPDER|RTW_INTR_TLPDOK|RTW_INTR_THPDER|\ RTW_INTR_THPDOK|RTW_INTR_TNPDER|RTW_INTR_TNPDOK|\ RTW_INTR_TBDER|RTW_INTR_TBDOK) -#define RTW_INTR_BEACON (RTW_INTR_BCNINT) +#define RTW_INTR_BEACON (RTW_INTR_BCNINT|RTW_INTR_TBDER|RTW_INTR_TBDOK) #define RTW_INTR_IOERROR (RTW_INTR_TXFOVW|RTW_INTR_RXFOVW|RTW_INTR_RDU) #define RTW_TCR 0x40 /* Transmit Configuration Register, 32b */ @@ -883,6 +883,8 @@ /* Start all queues. */ #define RTW_TPPOLL_ALL (RTW_TPPOLL_BQ | RTW_TPPOLL_HPQ | \ RTW_TPPOLL_NPQ | RTW_TPPOLL_LPQ) +/* Check all queues' activity. */ +#define RTW_TPPOLL_ACTIVE RTW_TPPOLL_ALL /* Stop all queues. */ #define RTW_TPPOLL_SALL (RTW_TPPOLL_SBQ | RTW_TPPOLL_SHPQ | \ RTW_TPPOLL_SNPQ | RTW_TPPOLL_SLPQ) |