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authorJason Wright <jason@cvs.openbsd.org>2000-10-17 15:59:11 +0000
committerJason Wright <jason@cvs.openbsd.org>2000-10-17 15:59:11 +0000
commit29c18391994ae09b253c7e73e4d5227c1cfbddcd (patch)
tree992feeb0ab7e37805d82c67708bb1261f18f869b /sys/dev/mii
parent553d0e61cf255f490b685bad14614b74b45e9c43 (diff)
driver for amphy from freebsd; aaron ok
Diffstat (limited to 'sys/dev/mii')
-rw-r--r--sys/dev/mii/amphy.c249
-rw-r--r--sys/dev/mii/amphyreg.h86
-rw-r--r--sys/dev/mii/files.mii6
3 files changed, 340 insertions, 1 deletions
diff --git a/sys/dev/mii/amphy.c b/sys/dev/mii/amphy.c
new file mode 100644
index 00000000000..b986d83de8f
--- /dev/null
+++ b/sys/dev/mii/amphy.c
@@ -0,0 +1,249 @@
+/* $OpenBSD: amphy.c,v 1.1 2000/10/17 15:59:09 jason Exp $ */
+
+/*
+ * Copyright (c) 1997, 1998, 1999
+ * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Bill Paul.
+ * 4. Neither the name of the author nor the names of any co-contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $FreeBSD: src/sys/dev/mii/amphy.c,v 1.3 2000/04/19 14:57:29 phk Exp $
+ */
+
+/*
+ * driver for AMD AM79c873 PHYs
+ * This driver also works for the Davicom DM9101 PHY, which appears to
+ * be an AM79c873 workalike.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/device.h>
+#include <sys/malloc.h>
+#include <sys/socket.h>
+
+#include <net/if.h>
+#include <net/if_media.h>
+
+#include <dev/mii/mii.h>
+#include <dev/mii/miivar.h>
+#include <dev/mii/miidevs.h>
+
+#include <dev/mii/amphyreg.h>
+
+int amphymatch __P((struct device *, void *, void *));
+void amphyattach __P((struct device *, struct device *, void *));
+
+struct cfattach amphy_ca = {
+ sizeof(struct mii_softc), amphymatch, amphyattach, mii_phy_detach,
+ mii_phy_activate
+};
+
+struct cfdriver amphy_cd = {
+ NULL, "amphy", DV_DULL
+};
+
+int amphy_service __P((struct mii_softc *, struct mii_data *, int));
+void amphy_status __P((struct mii_softc *));
+
+int
+amphymatch(parent, match, aux)
+ struct device *parent;
+ void *match, *aux;
+{
+ struct mii_attach_args *ma = aux;
+
+ if ((MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxAMD &&
+ MII_MODEL(ma->mii_id2) == MII_MODEL_xxAMD_79C873) ||
+ (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxDAVICOM ||
+ MII_MODEL(ma->mii_id2) == MII_MODEL_xxDAVICOM_DM9101))
+ return(10);
+
+ return(0);
+}
+
+void
+amphyattach(parent, self, aux)
+ struct device *parent, *self;
+ void *aux;
+{
+ struct mii_softc *sc = (struct mii_softc *)self;
+ struct mii_attach_args *ma = aux;
+ struct mii_data *mii = ma->mii_data;
+
+ printf(": %s, rev. %d\n", MII_STR_xxAMD_79C873,
+ MII_REV(ma->mii_id2));
+
+ sc->mii_inst = mii->mii_instance;
+ sc->mii_phy = ma->mii_phyno;
+ sc->mii_service = amphy_service;
+ sc->mii_status = amphy_status;
+ sc->mii_pdata = mii;
+ sc->mii_flags = mii->mii_flags;
+
+ sc->mii_flags |= MIIF_NOISOLATE;
+
+ mii_phy_reset(sc);
+
+ sc->mii_capabilities =
+ PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
+ if (sc->mii_capabilities & BMSR_MEDIAMASK)
+ mii_phy_add_media(sc);
+}
+
+int
+amphy_service(sc, mii, cmd)
+ struct mii_softc *sc;
+ struct mii_data *mii;
+ int cmd;
+{
+ struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
+ int reg;
+
+ switch (cmd) {
+ case MII_POLLSTAT:
+ /*
+ * If we're not polling our PHY instance, just return.
+ */
+ if (IFM_INST(ife->ifm_media) != sc->mii_inst)
+ return (0);
+ break;
+
+ case MII_MEDIACHG:
+ /*
+ * If the media indicates a different PHY instance,
+ * isolate ourselves.
+ */
+ if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
+ reg = PHY_READ(sc, MII_BMCR);
+ PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
+ return (0);
+ }
+
+ /*
+ * If the interface is not up, don't do anything.
+ */
+ if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
+ break;
+
+ mii_phy_setmedia(sc);
+ break;
+
+ case MII_TICK:
+ /*
+ * If we're not currently selected, just return.
+ */
+ if (IFM_INST(ife->ifm_media) != sc->mii_inst)
+ return (0);
+
+ if (mii_phy_tick(sc) == EJUSTRETURN)
+ return (0);
+ break;
+ case MII_DOWN:
+ mii_phy_down(sc);
+ return (0);
+ }
+
+ /* Update the media status. */
+ amphy_status(sc);
+
+ /* Callback if something changed. */
+ mii_phy_update(sc, cmd);
+ return (0);
+}
+
+void
+amphy_status(sc)
+ struct mii_softc *sc;
+{
+ struct mii_data *mii = sc->mii_pdata;
+ struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
+ int bmsr, bmcr, par, anlpar;
+
+ mii->mii_media_status = IFM_AVALID;
+ mii->mii_media_active = IFM_ETHER;
+
+ bmsr = PHY_READ(sc, MII_BMSR) |
+ PHY_READ(sc, MII_BMSR);
+ if (bmsr & BMSR_LINK)
+ mii->mii_media_status |= IFM_ACTIVE;
+
+ bmcr = PHY_READ(sc, MII_BMCR);
+ if (bmcr & BMCR_ISO) {
+ mii->mii_media_active |= IFM_NONE;
+ mii->mii_media_status = 0;
+ return;
+ }
+
+ if (bmcr & BMCR_LOOP)
+ mii->mii_media_active |= IFM_LOOP;
+
+ if (bmcr & BMCR_AUTOEN) {
+ /*
+ * The PAR status bits are only valid of autonegotiation
+ * has completed (or it's disabled).
+ */
+ if ((bmsr & BMSR_ACOMP) == 0) {
+ /* Erg, still trying, I guess... */
+ mii->mii_media_active |= IFM_NONE;
+ return;
+ }
+
+ if (PHY_READ(sc, MII_ANER) & ANER_LPAN) {
+ anlpar = PHY_READ(sc, MII_ANAR) &
+ PHY_READ(sc, MII_ANLPAR);
+ if (anlpar & ANLPAR_T4)
+ mii->mii_media_active |= IFM_100_T4;
+ else if (anlpar & ANLPAR_TX_FD)
+ mii->mii_media_active |= IFM_100_TX|IFM_FDX;
+ else if (anlpar & ANLPAR_TX)
+ mii->mii_media_active |= IFM_100_TX;
+ else if (anlpar & ANLPAR_10_FD)
+ mii->mii_media_active |= IFM_10_T|IFM_FDX;
+ else if (anlpar & ANLPAR_10)
+ mii->mii_media_active |= IFM_10_T;
+ else
+ mii->mii_media_active |= IFM_NONE;
+ return;
+ }
+
+ /*
+ * Link partner is not capable of autonegotiation.
+ */
+ par = PHY_READ(sc, MII_AMPHY_DSCSR);
+ if (par & DSCSR_100FDX)
+ mii->mii_media_active |= IFM_100_TX|IFM_FDX;
+ else if (par & DSCSR_100HDX)
+ mii->mii_media_active |= IFM_100_TX;
+ else if (par & DSCSR_10FDX)
+ mii->mii_media_active |= IFM_10_T|IFM_HDX;
+ else if (par & DSCSR_10HDX)
+ mii->mii_media_active |= IFM_10_T;
+ } else
+ mii->mii_media_active = ife->ifm_media;
+}
diff --git a/sys/dev/mii/amphyreg.h b/sys/dev/mii/amphyreg.h
new file mode 100644
index 00000000000..f7d75c60f77
--- /dev/null
+++ b/sys/dev/mii/amphyreg.h
@@ -0,0 +1,86 @@
+/* $OpenBSD: amphyreg.h,v 1.1 2000/10/17 15:59:10 jason Exp $ */
+
+/*
+ * Copyright (c) 1997, 1998, 1999
+ * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Bill Paul.
+ * 4. Neither the name of the author nor the names of any co-contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $FreeBSD: src/sys/dev/mii/amphyreg.h,v 1.1 1999/09/06 05:27:55 wpaul Exp $
+ */
+
+#ifndef _DEV_MII_AMTPHYREG_H_
+#define _DEV_MII_AMTPHYREG_H_
+
+/*
+ * AMD Am79C873 registers.
+ */
+
+
+#define MII_AMPHY_DSCR 0x10 /* Specified configuration register */a
+#define DSCR_BP4B5B 0x8000 /* Bypass 4B5B encoding */
+#define DSCR_BPSCR 0x4000 /* Bypass scrambler */
+#define DSCR_BPALIGN 0x2000 /* Bypass symbol alignment */
+#define DSCR_REPEATER 0x0800 /* Repeater mode */
+#define DSCR_TX 0x0400 /* TX/FX mode control */
+#define DSCR_UTP 0x0200 /* UTP/STP mode control */
+#define DSCR_CLK25MDIS 0x0100 /* CLK25M disable */
+#define DSCR_FGLNKTX 0x0080 /* Force good link at 100baseTX */
+#define DSCR_LINKLEDCTL 0x0020 /* Link LED control */
+#define DSCR_FDXLEDCTL 0x0010 /* FDX LED control */
+#define DSCR_SMRTS 0x0008 /* Reset state machine */
+#define DSCR_MFPSC 0x0004 /* Preamble surpression control */
+#define DSCR_SLEEP 0x0002 /* Sleep mode */
+#define DSCR_RLOUT 0x0001 /* Remote loopout control */
+
+#define MII_AMPHY_DSCSR 0x11 /* Specified configuration and status */
+#define DSCSR_100FDX 0x8000 /* 100MBps full duplex */
+#define DSCSR_100HDX 0x4000 /* 100Mbps half duplex */
+#define DSCSR_10FDX 0x2000 /* 10Mbps full duplex */
+#define DSCSR_10HDX 0x1000 /* 10Mbps half duplex */
+#define DSCSR_PADDR 0x01F0 /* PHY address */
+#define DSCSR_ASTAT 0x000F /* Autonegotiation status */
+
+#define ASTAT_COMPLETE 0x8
+#define ASTAT_PDLINK_READY_FAIL 0x7
+#define ASTAT_PDLINK_READY 0x6
+#define ASTAT_CONSTMATCH_FAIL 0x5
+#define ASTAT_CONSTMATCH 0x4
+#define ASTAT_ACKMATCH_FAIL 0x3
+#define ASTAT_ACKMATCH 0x2
+#define ASTAT_ABILITYMATCH 0x1
+#define ASTAT_IDLE 0x0
+
+#define MII_AMPHY_T10CSRSCR 0x12 /* 10baseT configuration/status */
+#define T10CSRSCR_LPEN 0x4000 /* Link pulse enable */
+#define T10CSRSCR_HBE 0x2000 /* Heartbeat enable */
+#define T10CSRSCR_JABEN 0x0800 /* Jabber enable */
+#define T10CSRSCR_SER 0x0400 /* Serial mode enable */
+#define T10CSRSCR_POLR 0x0001 /* Polarity reversed */
+
+#endif /* _DEV_MII_AMTPHYREG_H_ */
diff --git a/sys/dev/mii/files.mii b/sys/dev/mii/files.mii
index 2637349d94f..ebbe5b30b37 100644
--- a/sys/dev/mii/files.mii
+++ b/sys/dev/mii/files.mii
@@ -1,4 +1,4 @@
-# $OpenBSD: files.mii,v 1.12 2000/08/28 13:41:33 jason Exp $
+# $OpenBSD: files.mii,v 1.13 2000/10/17 15:59:10 jason Exp $
# $NetBSD: files.mii,v 1.13 1998/11/05 00:36:48 thorpej Exp $
file dev/mii/mii.c mii
@@ -84,3 +84,7 @@ file dev/mii/brgphy.c brgphy
device xmphy: mii_phy
attach xmphy at mii
file dev/mii/xmphy.c xmphy
+
+device amphy: mii_phy
+attach amphy at mii
+file dev/mii/amphy.c amphy