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authorOwain Ainsworth <oga@cvs.openbsd.org>2008-07-12 17:31:07 +0000
committerOwain Ainsworth <oga@cvs.openbsd.org>2008-07-12 17:31:07 +0000
commit210331eb1cf317ef7f319200d68f4a74bc4881a0 (patch)
treefa073e5dbc91380e210743c91bd7e8325cacb705 /sys/dev/pci/agpvar.h
parentb1993d180a1e04dc9fc813dd8b8eeeafde798727 (diff)
Right now agp_generic_enable() is wrong. It has been since 2006. It
assumes that the display device and the agp bridge are the same device. In almost all cases this is incorrect. In order to correctly enable the agp device with the correct mode, we need to set the AGP_COMMAND register on both the display and the bridge with the right bits. Since agp is currently attaching at vga(4), due to the problems with the intel integrated graphics (a problem that I still need to solve, to be honest), for now just provide both pci_attach_args to the agp init, and get what we need from there to do the enable. This fixes the "agp bug" which i have been known to rant about, a lot. So agp radeons now work with dri without needing to be forced to pci mode. This wasn't detected before, since the only non-drm consumer of agp is the intel X driver, the i810 agp driver has its own enable function. tested by many. ok kettenis@.
Diffstat (limited to 'sys/dev/pci/agpvar.h')
-rw-r--r--sys/dev/pci/agpvar.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/sys/dev/pci/agpvar.h b/sys/dev/pci/agpvar.h
index 8f80f7769eb..f363ae5e5a9 100644
--- a/sys/dev/pci/agpvar.h
+++ b/sys/dev/pci/agpvar.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: agpvar.h,v 1.13 2008/05/06 19:19:02 oga Exp $ */
+/* $OpenBSD: agpvar.h,v 1.14 2008/07/12 17:31:06 oga Exp $ */
/* $NetBSD: agpvar.h,v 1.4 2001/10/01 21:54:48 fvdl Exp $ */
/*-
@@ -45,6 +45,7 @@
struct agpbus_attach_args {
struct pci_attach_args apa_pci_args;
+ struct pci_attach_args apa_vga_args;
};
enum agp_acquire_state {
@@ -134,6 +135,9 @@ struct agp_softc {
pcireg_t sc_id;
pci_chipset_tag_t sc_pc;
+ pci_chipset_tag_t sc_vgapc;
+ pcitag_t sc_vgapcitag;
+
struct agp_methods *sc_methods;
void *sc_chipc; /* chipset-dependent state */